SN54ACT245J [TI]
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS; 八路总线收发器与3态输出
| 型号： | SN54ACT245J |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 文件： | 总5页 (文件大小：77K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54ACT245, SN74ACT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000
SN54ACT245 . . . J OR W PACKAGE
SN74ACT245 . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
Inputs Are TTL-Voltage Compatible
EPIC (Enhanced-Performance Implanted
CMOS) 1- m Process
DIR
A1
A2
A3
A4
A5
A6
A7
A8
V
CC
19 OE
1
2
3
4
5
6
7
8
9
20
Package Options Include Plastic
Small-Outline (DW) Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPs
18 B1
17
B2
16 B3
15 B4
14 B5
13 B6
12 B7
11 B8
description
These octal bus transceivers are designed for
asynchronous two-way communication between
data buses. The control-function implementation
minimizes external timing requirements.
GND 10
SN54ACT245 . . . FK PACKAGE
(TOP VIEW)
When the output-enable (OE) is low, the device
passes noninverted data from the A bus to the B
bus or from the B bus to the A bus, depending
upon the logic level at the direction-control (DIR)
input. A high on OE disables the device so that the
buses are effectively isolated.
3
2
1
20 19
18
4
5
6
7
8
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
17
16
15
14
The SN54ACT245 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74ACT245 is characterized for
operation from –40°C to 85°C.
9 10 11 12 13
FUNCTION TABLE
(each transceiver)
INPUTS
OPERATION
OE
L
DIR
L
B data to A bus
A data to B bus
Isolation
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 2000, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ACT245, SN74ACT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000
†
logic symbol
logic diagram (positive logic)
19
1
G3
OE
DIR
1
DIR
3EN1[BA]
3EN2[AB]
19
18
OE
B1
2
18
A1
B1
1
2
A1
2
3
4
5
6
7
8
9
17
16
15
14
13
12
11
A2
A3
A4
A5
A6
A7
A8
B2
B3
B4
B5
B6
B7
B8
To Seven Other Channels
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
JA
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ACT245, SN74ACT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000
recommended operating conditions (see Note 3)
SN54ACT245 SN74ACT245
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
V
Supply voltage
5.5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
0.8
0.8
V
0
0
V
V
0
0
V
V
V
I
CC
CC
Output voltage
V
O
CC
CC
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
–24
24
–24
24
8
mA
mA
ns/V
°C
OH
I
OL
t/ v
0
8
0
T
–55
125
–40
85
A
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
TYP
SN54ACT245 SN74ACT245
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
4.4
MAX
MIN
4.4
MAX
MIN
4.4
MAX
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
4.49
I
I
= – 50
A
OH
5.4
5.49
5.4
5.4
3.88
4.86
3.7
3.76
4.76
V
OH
= – 24 mA
V
OH
4.7
†
I
I
= –50 mA
= –75 mA
3.85
OH
†
3.85
OH
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 A
OL
OL
0.36
0.36
0.5
0.44
0.44
V
OL
I
= 24 mA
V
0.5
†
†
I
I
= 50 mA
1.65
OL
= 75 mA
1.65
±5
OL
‡
I
I
I
A or B ports
OE or DIR
V
= V or GND
CC
±0.5
±0.1
4
±10
±1
A
A
A
OZ
O
V = V
or GND
or GND,
±1
I
I
CC
CC
V = V
I = 0
O
80
40
CC
I
One input at 3.4 V,
Other inputs at GND or V
§
5.5 V
0.6
1.6
1.5
mA
I
CC
CC
C
C
V = V
or GND
5 V
5 V
4.5
15
pF
pF
i
I
CC
= V or GND
CC
V
O
io
†
‡
§
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
For I/O ports, the parameter I includes the input leakage current.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
OZ
.
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ACT245, SN74ACT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
CC
T = 25°C
A
SN54ACT245 SN74ACT245
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
ns
MIN
1
TYP
4
MAX
7.5
8
MIN
1
MAX
9
MIN
1.5
1
MAX
8
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
A or B
B or A
A or B
A or B
1
4
1
10
12
13
12
12
9
1
5
10
1
1.5
1.5
1
11
12
11
11
ns
OE
OE
1
5.5
5.5
5
10
1
1
10
1
ns
1
10
1
1.5
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
TYP
UNIT
C
Power dissipation capacitance
C
= 50 pF,
f = 1 MHz
45
pF
pd
L
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
Open
TEST
S1
S1
500 Ω
t
/t
Open
From Output
Under Test
PLH PHL
t
/t
2 × V
CC
Open
PLZ PZL
t
/t
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
Output
Control
(low-level
enabling)
3 V
0 V
1.5 V
1.5 V
LOAD CIRCUIT
t
t
PLZ
PZL
Output
Waveform 1
3 V
0 V
≈V
CC
Input
1.5 V
1.5 V
50% V
CC
S1 at 2 × V
(see Note B)
CC
V + 0.3 V
OL
V
OL
t
t
PHL
PLH
t
t
PZH
PHZ
Output
Waveform 2
S1 at Open
(see Note B)
V
V
OH
OH
V
OH
– 0.3 V
50% V
CC
50% V
50% V
Output
CC
CC
V
OL
≈0 V
VOLTAGE WAVEFORMS
C includes probe and jig capacitance.
L
VOLTAGE WAVEFORMS
NOTES: A.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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Copyright 2000, Texas Instruments Incorporated
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