SN54AHC00_15 [TI]

QUADRUPLE 2-INPUT POSITIVE-NAND GATES;
SN54AHC00_15
型号: SN54AHC00_15
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

输入元件
文件: 总23页 (文件大小:1071K)
中文:  中文翻译
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SN54AHC00, SN74AHC00  
QUADRUPLE 2-INPUT POSITIVE-NAND GATES  
SCLS227I – OCTOBER 1995 – REVISED JULY 2003  
Operating Range 2-V to 5.5-V V  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
– 1000-V Charged-Device Model (C101)  
SN54AHC00 . . . FK PACKAGE  
(TOP VIEW)  
SN74AHC00 . . . RGY PACKAGE  
(TOP VIEW)  
SN54AHC00 . . . J OR W PACKAGE  
SN74AHC00 . . . D, DB, DGV, N, NS,  
OR PW PACKAGE  
(TOP VIEW)  
1
14  
3
2
1
20 19  
18  
1A  
1B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
4A  
NC  
4Y  
1Y  
NC  
2A  
4
5
6
7
8
1B  
1Y  
2A  
2B  
2Y  
13 4B  
12 4A  
2
3
4
5
6
4B  
4A  
4Y  
17  
16  
1Y  
11  
10  
9
4Y  
3B  
3A  
2A  
15 NC  
14  
9 10 11 12 13  
NC  
2B  
2B  
10 3B  
3B  
9
8
2Y  
3A  
3Y  
7
8
GND  
NC – No internal connection  
description/ordering information  
The ’AHC00 devices perform the Boolean function Y  
A B or Y  
A
B in positive logic.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
QFN – RGY  
PDIP – N  
Tape and reel  
Tube  
SN74AHC00RGYR  
SN74AHC00N  
HA00  
SN74AHC00N  
Tube  
SN74AHC00D  
SOIC – D  
AHC00  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SN74AHC00DR  
SN74AHC00NSR  
SN74AHC00DBR  
SN74AHC00PW  
SN74AHC00PWR  
SN74AHC00DGVR  
SNJ54AHC00J  
–40°C to 85°C  
SOP – NS  
AHC00  
HA00  
SSOP – DB  
TSSOP – PW  
HA00  
Tape and reel  
Tape and reel  
Tube  
TVSOP – DGV  
CDIP – J  
HA00  
SNJ54AHC00J  
SNJ54AHC00W  
SNJ54AHC00FK  
–55°C to 125°C  
CFP – W  
Tube  
SNJ54AHC00W  
SNJ54AHC00FK  
LCCC – FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AHC00, SN74AHC00  
QUADRUPLE 2-INPUT POSITIVE-NAND GATES  
SCLS227I OCTOBER 1995 REVISED JULY 2003  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
B
H
X
L
H
L
L
H
H
X
logic diagram, each gate (positive logic)  
A
B
Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V  
+ 0.5 V  
O
CC  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
Output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA  
Continuous current through V  
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
JA  
(see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W  
(see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W  
(see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W  
(see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W  
(see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W  
(see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
3. The package thermal impedance is calculated in accordance with JESD 51-5.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AHC00, SN74AHC00  
QUADRUPLE 2-INPUT POSITIVE-NAND GATES  
SCLS227I OCTOBER 1995 REVISED JULY 2003  
recommended operating conditions (see Note 4)  
SN54AHC00  
SN74AHC00  
UNIT  
MIN  
2
MAX  
MIN  
2
MAX  
V
V
Supply voltage  
5.5  
5.5  
V
CC  
V
V
V
V
V
V
= 2 V  
1.5  
2.1  
3.85  
1.5  
2.1  
3.85  
CC  
CC  
CC  
CC  
CC  
CC  
High-level input voltage  
= 3 V  
V
V
IH  
= 5.5 V  
= 2 V  
0.5  
0.9  
0.5  
0.9  
V
IL  
Low-level input voltage  
= 3 V  
= 5.5 V  
1.65  
5.5  
1.65  
5.5  
V
V
Input voltage  
0
0
0
0
V
V
A
I
Output voltage  
V
V
CC  
O
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
50  
4  
8  
50  
4
50  
4  
8  
50  
4
I
High-level output current  
Low-level output current  
= 3.3 V ± 0.3 V  
= 5 V ± 0.5 V  
= 2 V  
OH  
OL  
mA  
A
I
= 3.3 V ± 0.3 V  
= 5 V ± 0.5 V  
= 3.3 V ± 0.3 V  
= 5 V ± 0.5 V  
mA  
8
8
100  
20  
125  
100  
20  
85  
t/v  
Input transition rise or fall rate  
Operating free-air temperature  
ns/V  
T
A
55  
40  
°C  
NOTE 4: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
A
= 25°C  
TYP  
2
SN54AHC00  
SN74AHC00  
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
1.9  
MAX  
MIN  
1.9  
MAX  
MIN  
1.9  
MAX  
2 V  
3 V  
I
= 50  
A
2.9  
3
2.9  
2.9  
OH  
V
4.5 V  
3 V  
4.4  
4.5  
4.4  
4.4  
V
OH  
OL  
I
I
= 4 mA  
2.58  
3.94  
2.48  
3.8  
2.48  
3.8  
OH  
= 8 mA  
4.5 V  
2 V  
OH  
0.1  
0.1  
0.1  
0.1  
0.1  
0.5  
0.5  
±1*  
20  
0.1  
0.1  
0.1  
0.44  
0.44  
±1  
I
= 50  
A
3 V  
OL  
V
4.5 V  
3 V  
0.1  
V
I
I
= 4 mA  
= 8 mA  
0.36  
0.36  
±0.1  
2
OL  
4.5 V  
0 V to 5.5 V  
5.5 V  
5 V  
OL  
I
I
V = 5.5 V or GND  
A
A
I
I
V = V  
or GND,  
or GND  
I = 0  
O
20  
CC  
I
CC  
CC  
C
V = V  
2
10  
10  
pF  
i
I
* On products compliant to MIL-PRF-38535, this parameter is not production tested at V  
CC  
= 0 V.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AHC00, SN74AHC00  
QUADRUPLE 2-INPUT POSITIVE-NAND GATES  
SCLS227I OCTOBER 1995 REVISED JULY 2003  
switching characteristics over recommended operating free-air temperature range,  
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
5.5*  
5.5*  
8
SN54AHC00  
SN74AHC00  
FROM  
(INPUT)  
TO  
(OUTPUT)  
LOAD  
CAPACITANCE  
PARAMETER  
UNIT  
ns  
MIN  
MAX  
7.9*  
7.9*  
11.4  
11.4  
MIN  
1*  
1*  
1
MAX  
9.5*  
9.5*  
13  
MIN  
1
MAX  
9.5  
9.5  
13  
t
t
t
t
PLH  
PHL  
PLH  
PHL  
A or B  
A or B  
Y
Y
C
C
= 15 pF  
= 50 pF  
L
L
1
1
ns  
8
1
13  
1
13  
* On products compliant to MIL-PRF-38535, this parameter is not production tested.  
switching characteristics over recommended operating free-air temperature range,  
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
3.7*  
3.7*  
5.2  
SN54AHC00  
SN74AHC00  
FROM  
(INPUT)  
TO  
(OUTPUT)  
LOAD  
CAPACITANCE  
PARAMETER  
UNIT  
ns  
MIN  
MAX  
5.5*  
5.5*  
7.5  
MIN  
1*  
1*  
1
MAX  
6.5*  
6.5*  
8.5  
MIN  
1
MAX  
6.5  
t
t
t
t
PLH  
PHL  
PLH  
PHL  
A or B  
A or B  
Y
Y
C
C
= 15 pF  
= 50 pF  
L
L
1
6.5  
1
8.5  
ns  
5.2  
7.5  
1
8.5  
1
8.5  
* On products compliant to MIL-PRF-38535, this parameter is not production tested.  
noise characteristics, V  
= 5 V, C = 50 pF, T = 25°C (see Note 5)  
CC  
L
A
SN74AHC00  
PARAMETER  
UNIT  
MIN  
TYP  
0.3  
MAX  
0.8  
V
V
V
V
V
Quiet output, maximum dynamic V  
V
V
V
V
V
OL(P)  
OL(V)  
OH(V)  
IH(D)  
IL(D)  
OL  
Quiet output, minimum dynamic V  
Quiet output, minimum dynamic V  
High-level dynamic input voltage  
Low-level dynamic input voltage  
0.3  
4.6  
0.8  
OL  
OH  
3.5  
1.5  
NOTE 5: Characteristics are for surface-mount packages only.  
operating characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
TEST CONDITIONS  
No load, f = 1 MHz  
TYP  
UNIT  
C
Power dissipation capacitance  
9.5  
pF  
pd  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AHC00, SN74AHC00  
QUADRUPLE 2-INPUT POSITIVE-NAND GATES  
SCLS227I OCTOBER 1995 REVISED JULY 2003  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
Open  
GND  
S1  
R
= 1 kΩ  
L
TEST  
S1  
From Output  
Under Test  
Test  
Point  
From Output  
Under Test  
t
t
/t  
Open  
PLH PHL  
/t  
C
C
L
t
V
CC  
L
PLZ PZL  
/t  
(see Note A)  
(see Note A)  
GND  
PHZ PZH  
Open Drain  
V
CC  
LOAD CIRCUIT FOR  
LOAD CIRCUIT FOR  
TOTEM-POLE OUTPUTS  
3-STATE AND OPEN-DRAIN OUTPUTS  
V
CC  
50% V  
CC  
Timing Input  
0 V  
t
w
t
h
t
su  
V
CC  
V
CC  
50% V  
50% V  
CC  
Input  
CC  
50% V  
50% V  
CC  
Data Input  
CC  
0 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
V
V
CC  
CC  
Output  
Control  
50% V  
50% V  
50% V  
50% V  
t
Input  
CC  
CC  
CC  
CC  
0 V  
0 V  
t
PZL  
t
t
t
PLZ  
PLH  
PHL  
Output  
Waveform 1  
V
OH  
V  
CC  
In-Phase  
Output  
50% V  
50% V  
CC  
50% V  
CC  
CC  
V
S1 at V  
(see Note B)  
V
OL  
+ 0.3 V  
CC  
V
OL  
OL  
t
t
t
PHL  
PLH  
PZH  
PHZ  
Output  
Waveform 2  
S1 at GND  
V
V
OH  
OH  
Out-of-Phase  
Output  
V
OH  
0.3 V  
50% V  
50% V  
50% V  
CC  
CC  
CC  
V
0 V  
(see Note B)  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. includes probe and jig capacitance.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t 3 ns, t 3 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
E. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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Copyright © 2007, Texas Instruments Incorporated  
PACKAGE OPTION ADDENDUM  
www.ti.com  
9-Oct-2007  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
LCCC  
CDIP  
CFP  
Drawing  
5962-9682201Q2A  
5962-9682201QCA  
5962-9682201QDA  
SN74AHC00D  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
FK  
J
20  
14  
14  
14  
1
1
1
TBD  
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
A42 SNPB  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
W
D
SOIC  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74AHC00DBLE  
SN74AHC00DBR  
OBSOLETE  
ACTIVE  
SSOP  
SSOP  
DB  
DB  
14  
14  
TBD  
Call TI  
Call TI  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74AHC00DBRE4  
SN74AHC00DBRG4  
SN74AHC00DE4  
SN74AHC00DG4  
SN74AHC00DGVR  
SN74AHC00DGVRE4  
SN74AHC00DGVRG4  
SN74AHC00DR  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
SOIC  
SOIC  
TVSOP  
TVSOP  
TVSOP  
SOIC  
SOIC  
SOIC  
PDIP  
DB  
DB  
D
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DGV  
DGV  
DGV  
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74AHC00DRE4  
SN74AHC00DRG4  
SN74AHC00N  
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
N
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN74AHC00NE4  
SN74AHC00NSR  
SN74AHC00NSRE4  
SN74AHC00NSRG4  
SN74AHC00PW  
PDIP  
N
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SO  
NS  
NS  
NS  
PW  
PW  
PW  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74AHC00PWE4  
SN74AHC00PWG4  
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74AHC00PWLE  
SN74AHC00PWR  
OBSOLETE TSSOP  
PW  
PW  
14  
14  
TBD  
Call TI  
Call TI  
ACTIVE  
TSSOP  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74AHC00PWRE4  
ACTIVE  
TSSOP  
PW  
14  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
9-Oct-2007  
Orderable Device  
SN74AHC00PWRG4  
SN74AHC00RGYR  
SN74AHC00RGYRG4  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
TSSOP  
PW  
14  
14  
14  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
QFN  
QFN  
RGY  
RGY  
1000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
1000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
SNJ54AHC00FK  
SNJ54AHC00J  
SNJ54AHC00W  
ACTIVE  
ACTIVE  
ACTIVE  
LCCC  
CDIP  
CFP  
FK  
J
20  
14  
14  
1
1
1
TBD  
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
A42 SNPB  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
W
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
19-Mar-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
SN74AHC00DBR  
SN74AHC00DGVR  
SN74AHC00DR  
SSOP  
TVSOP  
SOIC  
SO  
DB  
DGV  
D
14  
14  
14  
14  
14  
14  
2000  
2000  
2500  
2000  
2000  
1000  
330.0  
330.0  
330.0  
330.0  
330.0  
180.0  
16.4  
12.4  
16.4  
16.4  
12.4  
12.4  
8.2  
6.8  
6.5  
8.2  
7.0  
3.85  
6.6  
4.0  
2.5  
1.6  
2.1  
2.5  
1.6  
1.35  
12.0  
8.0  
16.0  
12.0  
16.0  
16.0  
12.0  
12.0  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
9.0  
8.0  
SN74AHC00NSR  
SN74AHC00PWR  
SN74AHC00RGYR  
NS  
10.5  
5.6  
12.0  
8.0  
TSSOP  
QFN  
PW  
RGY  
3.85  
8.0  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
19-Mar-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74AHC00DBR  
SN74AHC00DGVR  
SN74AHC00DR  
SSOP  
TVSOP  
SOIC  
SO  
DB  
DGV  
D
14  
14  
14  
14  
14  
14  
2000  
2000  
2500  
2000  
2000  
1000  
346.0  
346.0  
346.0  
346.0  
346.0  
190.5  
346.0  
346.0  
346.0  
346.0  
346.0  
212.7  
33.0  
29.0  
33.0  
33.0  
29.0  
31.8  
SN74AHC00NSR  
SN74AHC00PWR  
SN74AHC00RGYR  
NS  
TSSOP  
QFN  
PW  
RGY  
Pack Materials-Page 2  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MLCC006B – OCTOBER 1996  
FK (S-CQCC-N**)  
LEADLESS CERAMIC CHIP CARRIER  
28 TERMINAL SHOWN  
A
B
NO. OF  
TERMINALS  
**  
18 17 16 15 14 13 12  
MIN  
MAX  
MIN  
MAX  
0.342  
(8,69)  
0.358  
(9,09)  
0.307  
(7,80)  
0.358  
(9,09)  
19  
20  
11  
10  
9
20  
28  
44  
52  
68  
84  
0.442  
(11,23)  
0.458  
(11,63)  
0.406  
(10,31)  
0.458  
(11,63)  
21  
B SQ  
22  
0.640  
(16,26)  
0.660  
(16,76)  
0.495  
(12,58)  
0.560  
(14,22)  
8
A SQ  
23  
0.739  
(18,78)  
0.761  
(19,32)  
0.495  
(12,58)  
0.560  
(14,22)  
7
24  
25  
6
0.938  
(23,83)  
0.962  
(24,43)  
0.850  
(21,6)  
0.858  
(21,8)  
5
1.141  
(28,99)  
1.165  
(29,59)  
1.047  
(26,6)  
1.063  
(27,0)  
26 27 28  
1
2
3
4
0.080 (2,03)  
0.064 (1,63)  
0.020 (0,51)  
0.010 (0,25)  
0.020 (0,51)  
0.010 (0,25)  
0.055 (1,40)  
0.045 (1,14)  
0.045 (1,14)  
0.035 (0,89)  
0.045 (1,14)  
0.035 (0,89)  
0.028 (0,71)  
0.022 (0,54)  
0.050 (1,27)  
4040140/D 10/96  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. This package can be hermetically sealed with a metal lid.  
D. The terminals are gold plated.  
E. Falls within JEDEC MS-004  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000  
DGV (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
24 PINS SHOWN  
0,23  
0,13  
M
0,07  
0,40  
24  
13  
0,16 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
0°ā8°  
0,75  
1
12  
0,50  
A
Seating Plane  
0,08  
0,15  
0,05  
1,20 MAX  
PINS **  
14  
16  
20  
24  
38  
48  
56  
DIM  
A MAX  
A MIN  
3,70  
3,50  
3,70  
3,50  
5,10  
4,90  
5,10  
4,90  
7,90  
7,70  
9,80  
9,60  
11,40  
11,20  
4073251/E 08/00  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.  
D. Falls within JEDEC: 24/48 Pins – MO-153  
14/16/20/56 Pins – MO-194  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are  
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
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Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all  
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amplifier.ti.com  
dataconverter.ti.com  
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