SN54AHC541J [TI]

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS; 八路缓冲器/驱动器,具有三态输出
SN54AHC541J
型号: SN54AHC541J
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
八路缓冲器/驱动器,具有三态输出

驱动器 输出元件
文件: 总18页 (文件大小:567K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN54AHC541, SN74AHC541  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS261M – DECEMBER 1995 – REVISED JULY 2003  
SN54AHC541 . . . J OR W PACKAGE  
SN74AHC541 . . . DB, DGV, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
Operating Range 2-V to 5.5-V V  
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
OE1  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
19 OE2  
1
2
3
4
5
6
7
8
9
10  
20  
description/ordering information  
18  
17  
16  
15  
14  
13  
12  
11  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
Y8  
The ’AHC541 octal buffers/drivers are ideal for  
driving bus lines or buffer memory address  
registers. These devices feature inputs and  
outputs on opposite sides of the package to  
facilitate printed circuit board layout.  
The 3-state control gate is a two-input AND gate  
with active-low inputs so that if either  
output-enable (OE1 or OE2) input is high, all  
corresponding outputs are in the high-impedance  
state. The outputs provide noninverted data when  
they are not in the high-impedance state.  
GND  
SN54AHC541 . . . FK PACKAGE  
(TOP VIEW)  
To ensure the high-impedance state during power  
up or power down, OE should be tied to V  
CC  
through a pullup resistor; the minimum value of  
the resistor is determined by the current-sinking  
capability of the driver.  
3
2
1 20 19  
18  
Y1  
Y2  
Y3  
Y4  
Y5  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
15  
14  
9 10 11 12 13  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – N  
Tube  
SN74AHC541N  
SN74AHC541N  
Tube  
SN74AHC541DW  
SN74AHC541DWR  
SN74AHC541NSR  
SN74AHC541DBR  
SN74AHC541PW  
SN74AHC541PWR  
SOIC – DW  
AHC541  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP – NS  
AHC541  
HA541  
–40°C to 85°C  
SSOP – DB  
TSSOP – PW  
HA541  
Tape and reel  
Tape and reel  
Tube  
TVSOP – DGV  
CDIP – J  
SN74AHC541DGVR  
SNJ54AHC541J  
HA541  
SNJ54AHC541J  
SNJ54AHC541W  
SNJ54AHC541FK  
–55°C to 125°C  
CFP – W  
Tube  
SNJ54AHC541W  
SNJ54AHC541FK  
LCCC – FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AHC541, SN74AHC541  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS261M DECEMBER 1995 REVISED JULY 2003  
FUNCTION TABLE  
(each buffer/driver)  
INPUTS  
OUTPUT  
Y
OE1  
L
OE2  
L
A
L
L
H
Z
Z
L
L
H
X
X
H
X
X
H
logic diagram (positive logic)  
1
OE1  
OE2  
19  
2
18  
A1  
Y1  
To Seven Other Channels  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V  
+ 0.5 V  
O
CC  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
Output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA  
Continuous current through V  
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA  
JA  
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AHC541, SN74AHC541  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS261M DECEMBER 1995 REVISED JULY 2003  
recommended operating conditions (see Note 3)  
SN54AHC541 SN74AHC541  
UNIT  
MIN  
MAX  
MIN  
MAX  
V
V
Supply voltage  
2
5.5  
2
5.5  
V
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
1.5  
2.1  
3.85  
1.5  
2.1  
3.85  
High-level input voltage  
= 3 V  
IH  
= 5.5 V  
= 2 V  
0.5  
0.9  
0.5  
0.9  
V
IL  
Low-level input voltage  
= 3 V  
V
= 5.5 V  
1.65  
5.5  
1.65  
5.5  
V
V
Input voltage  
0
0
0
0
V
V
I
Output voltage  
V
V
CC  
O
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
50  
4  
8  
50  
4
50  
4  
8  
50  
4
A
I
High-level output current  
Low-level output current  
= 3.3 V ± 0.3 V  
= 5 V ± 0.5 V  
= 2 V  
OH  
OL  
mA  
A
I
= 3.3 V ± 0.3 V  
= 5 V ± 0.5 V  
= 3.3 V ± 0.3 V  
= 5 V ± 0.5 V  
mA  
8
8
100  
20  
125  
100  
20  
85  
t/∆v  
Input transition rise or fall rate  
Operating free-air temperature  
ns/V  
T
55  
40  
°C  
A
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
A
= 25°C  
TYP  
2
SN54AHC541 SN74AHC541  
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
1.9  
MAX  
MIN  
1.9  
MAX  
MIN  
1.9  
MAX  
2 V  
3 V  
I
= 50  
A
2.9  
3
2.9  
2.9  
OH  
4.5 V  
3 V  
4.4  
4.5  
4.4  
4.4  
V
V
V
OH  
2.58  
3.94  
2.48  
3.8  
2.48  
3.8  
I
I
= 4 mA  
OH  
4.5 V  
2 V  
= 8 mA  
OH  
0.1  
0.1  
0.1  
0.1  
0.1  
0.5  
0.5  
±1*  
0.1  
0.1  
I
= 50  
A
3 V  
OL  
4.5 V  
3 V  
0.1  
0.1  
V
OL  
0.36  
0.36  
±0.1  
0.44  
0.44  
±1  
I
I
= 4 mA  
= 8 mA  
OL  
4.5 V  
0 V to 5.5 V  
OL  
I
I
V = 5.5 V or GND  
A
A
I
V
= V  
or GND,  
O
I
CC  
V (OE) = V or V  
IH  
5.5 V  
±0.25  
±2.5  
±2.5  
I
OZ  
IL  
I
V = V  
or GND,  
or GND  
I = 0  
O
5.5 V  
5 V  
4
40  
40  
10  
A
pF  
pF  
CC  
I
CC  
CC  
C
C
V = V  
I
2
4
10  
i
V
O
= V or GND  
CC  
5 V  
o
* On products compliant to MIL-PRF-38535, this parameter is not production tested at V  
CC  
= 0 V.  
For input and ouput, I  
includes the input leakage current.  
OZ  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AHC541, SN74AHC541  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS261M DECEMBER 1995 REVISED JULY 2003  
switching characteristics over recommended operating free-air temperature range,  
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
5*  
SN54AHC541 SN74AHC541  
FROM  
(INPUT)  
TO  
(OUTPUT)  
LOAD  
CAPACITANCE  
PARAMETER  
UNIT  
ns  
MIN  
MAX  
7*  
MIN  
1*  
1*  
1*  
1*  
1*  
1*  
1
MAX  
8.5*  
8.5*  
11*  
11*  
12*  
12*  
12  
MIN  
1
MAX  
8.5  
8.5  
11  
t
t
t
t
t
t
t
t
t
t
t
t
t
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
sk(o)  
A
Y
Y
Y
Y
Y
Y
C
C
C
C
C
= 15 pF  
= 15 pF  
= 15 pF  
= 50 pF  
= 50 pF  
L
L
L
L
L
5*  
7*  
1
6* 10.5*  
6* 10.5*  
1
ns  
OE  
OE  
A
1
11  
7*  
7*  
7.5  
7.5  
8
11*  
11*  
1
12  
ns  
1
12  
10.5  
10.5  
14  
1
12  
ns  
1
12  
1
12  
1
16  
1
16  
ns  
OE  
OE  
8
14  
1
16  
1
16  
9
15.4  
15.4  
1.5**  
1
17.5  
17.5  
1
17.5  
17.5  
1.5  
C
C
= 50 pF  
= 50 pF  
ns  
ns  
L
L
9
1
1
On products compliant to MIL-PRF-38535, this parameter is not production tested.  
On products compliant to MIL-PRF-38535, this parameter does not apply.  
switching characteristics over recommended operating free-air temperature range,  
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
3.5*  
3.5*  
4.7*  
4.7*  
5*  
SN54AHC541 SN74AHC541  
FROM  
(INPUT)  
TO  
(OUTPUT)  
LOAD  
CAPACITANCE  
PARAMETER  
UNIT  
ns  
MIN  
MAX  
5*  
MIN  
1*  
1*  
1*  
1*  
1*  
1*  
1
MAX  
6*  
MIN  
1
MAX  
6
t
t
t
t
t
t
t
t
t
t
t
t
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A
Y
Y
Y
Y
Y
Y
C
C
C
C
C
= 15 pF  
= 15 pF  
= 15 pF  
= 50 pF  
= 50 pF  
L
L
L
L
L
5*  
6*  
1
6
7.2*  
7.2*  
7.5*  
7.5*  
7
8.5*  
8.5*  
8*  
1
8.5  
8.5  
8
ns  
OE  
OE  
A
1
1
ns  
5*  
8*  
1
8
5
8
1
8
ns  
5
7
1
8
1
8
6.2  
6.2  
6
9.2  
9.2  
8.8  
8.8  
1
10.5  
10.5  
10  
1
10.5  
10.5  
10  
10  
ns  
OE  
OE  
1
1
1
1
C
C
= 50 pF  
= 50 pF  
ns  
ns  
L
L
6
1
10  
1
t
1**  
1
sk(o)  
On products compliant to MIL-PRF-38535, this parameter is not production tested.  
On products compliant to MIL-PRF-38535, this parameter does not apply.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AHC541, SN74AHC541  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS261M DECEMBER 1995 REVISED JULY 2003  
noise characteristics, V  
= 5 V, C = 50 pF, T = 25°C (see Note 4)  
CC  
L
A
SN74AHC541  
UNIT  
PARAMETER  
MIN  
MAX  
V
V
V
V
V
Quiet output, maximum dynamic V  
0.8  
V
V
V
V
V
OL(P)  
OL(V)  
OH(V)  
IH(D)  
IL(D)  
OL  
Quiet output, minimum dynamic V  
Quiet output, minimum dynamic V  
High-level dynamic input voltage  
Low-level dynamic input voltage  
0.8  
OL  
4.7  
3.5  
OH  
1.5  
NOTE 4: Characteristics are for surface-mount packages only.  
operating characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
TEST CONDITIONS  
No load, f = 1 MHz  
TYP  
UNIT  
C
Power dissipation capacitance  
12  
pF  
pd  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AHC541, SN74AHC541  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS261M DECEMBER 1995 REVISED JULY 2003  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
Open  
GND  
S1  
R
= 1 kΩ  
L
TEST  
S1  
From Output  
Under Test  
Test  
Point  
From Output  
Under Test  
t
t
/t  
Open  
PLH PHL  
/t  
C
C
L
t
V
CC  
L
PLZ PZL  
/t  
(see Note A)  
(see Note A)  
GND  
PHZ PZH  
Open Drain  
V
CC  
LOAD CIRCUIT FOR  
LOAD CIRCUIT FOR  
TOTEM-POLE OUTPUTS  
3-STATE AND OPEN-DRAIN OUTPUTS  
V
CC  
50% V  
CC  
Timing Input  
0 V  
t
w
t
h
t
su  
V
CC  
V
CC  
50% V  
50% V  
CC  
Input  
CC  
50% V  
50% V  
CC  
Data Input  
CC  
0 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
V
V
CC  
CC  
Output  
Control  
50% V  
50% V  
50% V  
50% V  
t
Input  
CC  
CC  
CC  
CC  
0 V  
0 V  
t
PZL  
t
t
t
PLZ  
PLH  
PHL  
Output  
Waveform 1  
V
OH  
V  
CC  
In-Phase  
Output  
50% V  
50% V  
CC  
50% V  
CC  
CC  
V
S1 at V  
(see Note B)  
V
OL  
+ 0.3 V  
CC  
V
OL  
OL  
t
t
t
PHL  
PLH  
PZH  
PHZ  
Output  
Waveform 2  
S1 at GND  
V
V
OH  
OH  
Out-of-Phase  
Output  
V
OH  
0.3 V  
50% V  
50% V  
50% V  
CC  
CC  
CC  
V
0 V  
(see Note B)  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. includes probe and jig capacitance.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t 3 ns, t 3 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
E. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Mar-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
LCCC  
CDIP  
CFP  
Drawing  
5962-9685701Q2A  
5962-9685701QRA  
5962-9685701QSA  
SN74AHC541DBLE  
SN74AHC541DBR  
ACTIVE  
ACTIVE  
FK  
J
20  
20  
20  
20  
20  
1
1
1
TBD  
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
Level-NC-NC-NC  
Level-NC-NC-NC  
Level-NC-NC-NC  
Call TI  
ACTIVE  
W
OBSOLETE  
ACTIVE  
SSOP  
SSOP  
DB  
DB  
2000  
2000  
25  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-260C-1 YEAR/  
Level-1-235C-UNLIM  
SN74AHC541DGVR  
SN74AHC541DW  
SN74AHC541DWR  
SN74AHC541N  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
TVSOP  
SOIC  
SOIC  
PDIP  
DGV  
DW  
DW  
N
20  
20  
20  
20  
20  
20  
Pb-Free  
(RoHS)  
CU NIPDAU Level-1-250C-UNLIM  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-250C-1 YEAR/  
Level-1-235C-UNLIM  
2000  
20  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-250C-1 YEAR/  
Level-1-235C-UNLIM  
Pb-Free  
(RoHS)  
CU NIPDAU Level-NC-NC-NC  
SN74AHC541NSR  
SN74AHC541PW  
SO  
NS  
2000  
70  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-260C-1 YEAR/  
Level-1-235C-UNLIM  
TSSOP  
PW  
Pb-Free  
(RoHS)  
CU NIPDAU Level-1-250C-UNLIM  
SN74AHC541PWLE  
SN74AHC541PWR  
OBSOLETE TSSOP  
PW  
PW  
20  
20  
TBD  
Call TI  
Call TI  
ACTIVE  
TSSOP  
2000  
Pb-Free  
(RoHS)  
CU NIPDAU Level-1-250C-UNLIM  
SNJ54AHC541FK  
SNJ54AHC541J  
SNJ54AHC541W  
ACTIVE  
ACTIVE  
ACTIVE  
LCCC  
CDIP  
CFP  
FK  
J
20  
20  
20  
1
1
1
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Level-NC-NC-NC  
Level-NC-NC-NC  
Level-NC-NC-NC  
W
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Mar-2005  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
MECHANICAL DATA  
MLCC006B – OCTOBER 1996  
FK (S-CQCC-N**)  
LEADLESS CERAMIC CHIP CARRIER  
28 TERMINAL SHOWN  
A
B
NO. OF  
TERMINALS  
**  
18 17 16 15 14 13 12  
MIN  
MAX  
MIN  
MAX  
0.342  
(8,69)  
0.358  
(9,09)  
0.307  
(7,80)  
0.358  
(9,09)  
19  
20  
11  
10  
9
20  
28  
44  
52  
68  
84  
0.442  
(11,23)  
0.458  
(11,63)  
0.406  
(10,31)  
0.458  
(11,63)  
21  
B SQ  
22  
0.640  
(16,26)  
0.660  
(16,76)  
0.495  
(12,58)  
0.560  
(14,22)  
8
A SQ  
23  
0.739  
(18,78)  
0.761  
(19,32)  
0.495  
(12,58)  
0.560  
(14,22)  
7
24  
25  
6
0.938  
(23,83)  
0.962  
(24,43)  
0.850  
(21,6)  
0.858  
(21,8)  
5
1.141  
(28,99)  
1.165  
(29,59)  
1.047  
(26,6)  
1.063  
(27,0)  
26 27 28  
1
2
3
4
0.080 (2,03)  
0.064 (1,63)  
0.020 (0,51)  
0.010 (0,25)  
0.020 (0,51)  
0.010 (0,25)  
0.055 (1,40)  
0.045 (1,14)  
0.045 (1,14)  
0.035 (0,89)  
0.045 (1,14)  
0.035 (0,89)  
0.028 (0,71)  
0.022 (0,54)  
0.050 (1,27)  
4040140/D 10/96  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. This package can be hermetically sealed with a metal lid.  
D. The terminals are gold plated.  
E. Falls within JEDEC MS-004  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000  
DGV (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
24 PINS SHOWN  
0,23  
0,13  
M
0,07  
0,40  
24  
13  
0,16 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
0°ā8°  
0,75  
1
12  
0,50  
A
Seating Plane  
0,08  
0,15  
0,05  
1,20 MAX  
PINS **  
14  
16  
20  
24  
38  
48  
56  
DIM  
A MAX  
A MIN  
3,70  
3,50  
3,70  
3,50  
5,10  
4,90  
5,10  
4,90  
7,90  
7,70  
9,80  
9,60  
11,40  
11,20  
4073251/E 08/00  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.  
D. Falls within JEDEC: 24/48 Pins – MO-153  
14/16/20/56 Pins – MO-194  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to discontinue  
any product or service without notice. Customers should obtain the latest relevant information before placing  
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms  
and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
deems necessary to support this warranty. Except where mandated by government requirements, testing of all  
parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for  
their products and applications using TI components. To minimize the risks associated with customer products  
and applications, customers should provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,  
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Use of such information may require a license from a third party under the patents or other intellectual property  
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Applications  
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Amplifiers  
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www.ti.com/digitalcontrol  
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Copyright 2005, Texas Instruments Incorporated  

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