SN54ALS175FKR [TI]
ALS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20, CERAMIC, LCC-20;
| 型号： | SN54ALS175FKR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | ALS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20, CERAMIC, LCC-20 触发器 |
| 文件： | 总21页 (文件大小：598K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B
SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B
HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SDAS207E - APRIL 1982 - REVISED MAY 2002
’ALS174 and ’AS174 Contain Six Flip-Flops
With Single-Rail Outputs
Applications Include:
– Buffer/Storage Registers
– Shift Registers
’ALS175 and ’AS175B Contain Four
Flip-Flops With Double-Rail Outputs
– Pattern Generators
Fully Buffered Outputs for Maximum
Isolation From External Disturbances
(’AS Only)
Buffered Clock and Direct-Clear Inputs
SN54ALS174 . . . J OR W PACKAGE
SN54AS174 . . . J PACKAGE
SN54ALS175 . . . J OR W PACKAGE
SN54AS175B . . . J PACKAGE
SN74ALS174, SN74AS174 . . . D , N, OR NS PACKAGE
(TOP VIEW)
SN74ALS175, SN74AS175B . . . D, N, OR NS PACKAGE
(TOP VIEW)
CLR
1Q
1Q
1D
2D
2Q
2Q
GND
V
CC
CLR
1Q
1D
2D
2Q
3D
3Q
GND
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
4Q
4Q
4D
3D
3Q
3Q
CLK
6Q
6D
5D
5Q
4D
4Q
CLK
SN54ALS174, SN54AS174 . . . FK PACKAGE
(TOP VIEW)
SN54ALS175 . . . FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18 6D
3
2
1
20 19
18 4Q
1D
2D
NC
2Q
3D
1Q
1D
NC
2D
2Q
4
5
6
7
8
4
5
6
7
8
17
16
15
14
17
16
15
14
5D
NC
5Q
4D
4D
NC
3D
3Q
9 10 11 12 13
9 10 11 12 13
NC – No internal connection
description
These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a
direct-clear (CLR) input. The ’ALS175 and ’AS175B feature complementary outputs from each flip-flop.
Information at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the
positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly
related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low
level, the D-input signal has no effect at the output.
These circuits are fully compatible for use with most TTL circuits.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
unless otherwise noted. On all other products, production
testing of all parameters.
processing does not necessarily include testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B
SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B
HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SDAS207E - APRIL 1982 - REVISED MAY 2002
ORDERING INFORMATION
ORDERABLE
TOP-SIDE
MARKING
†
PACKAGE
T
A
PART NUMBER
SN74ALS174N
SN74AS174N
SN74ALS174N
SN74AS174N
SN74ALS175N
SN74AS175BN
PDIP – N
Tube
SN74ALS175N
SN74AS175BN
SN74ALS174D
SN74ALS174DR
SN74AS174D
Tube
ALS174
AS174
Tape and reel
Tube
Tape and reel
Tube
SN74AS174DR
SN74ALS175D
SN74ALS175DR
SN74AS175BD
SN74AS175BDR
SN74ALS174NSR
SN74AS174NSR
SN74ALS175NSR
SN74AS175BNSR
SNJ54ALS174J
SNJ54AS174J
0°C to 70°C
SOIC – D
ALS175
AS175B
Tape and reel
Tube
Tape and reel
ALS174
74AS174
SOP – NS
CDIP – J
Tape and reel
ALS175
74AS175B
SNJ54ALS174J
SNJ54AS174J
SNJ54ALS175J
SNJ54AS175BJ
SNJ54ALS174W
SNJ54ALS175W
SNJ54ALS174FK
SNJ54AS174FK
SNJ54ALS175FK
Tube
SNJ54ALS175J
SNJ54AS175BJ
SNJ54ALS174W
SNJ54ALS175W
SNJ54ALS174FK
–55°C to 125°C
CFP – W
Tube
Tube
‡
LCCC – FK
SNJ54AS174FK
SNJ54ALS175FK
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
This orderable is not recommended for new designs.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUTS
§
Q
CLR
L
CLK
D
X
H
L
Q
L
X
↑
H
H
H
L
L
H
↑
H
H
L
X
Q
Q
0
0
§
’ALS175 and ’AS175B only
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B
SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B
HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SDAS207E - APRIL 1982 - REVISED MAY 2002
logic diagrams (positive logic)
’ALS174, ’AS174
’ALS175, ’AS175B
9
1
CLK
CLR
1
9
CLR
CLK
4
3
2
1D
C1
1D
1D
C1
1D
1Q
1Q
2
1Q
3
R
R
To Five Other Channels
To Three Other Channels
Pin numbers shown are for the D, J, N, NS, and W packages.
absolute maximum ratings over operating free-air temperature range, SN54/74ALS174,
†
SN54/74ALS175 (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Package thermal impedance, θ (see Note 1): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
SN54ALS174
SN54ALS175
SN74ALS174
SN74ALS175
UNIT
MIN NOM MAX
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
IH
0.8
–0.4
4
0.8
–0.4
8
V
IL
I
I
mA
mA
°C
OH
OL
T
A
–55
125
0
70
NOTE 2: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B
SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B
HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SDAS207E - APRIL 1982 - REVISED MAY 2002
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS174
SN54ALS175
SN74ALS174
SN74ALS175
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = –18 mA
–1.5
–1.5
V
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
= –0.4 mA
= 4 mA
V
CC
–2
V
CC
–2
OH
OL
CC
OH
OL
OL
0.25
0.4
0.25
0.35
0.4
0.5
V
V
CC
= 4.5 V
V
= 8 mA
I
I
V
V
= 5.5 V,
= 5.5 V,
V = 7 V
0.1
20
0.1
mA
I
CC
I
V = 2.7 V
I
20
µA
IH
IL
CC
All others
CLK
–0.1
–0.15
–112
19
–0.1
I
I
I
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
V = 0.4 V
I
mA
mA
mA
‡
V
O
= 2.25 V
–20
–30
–112
19
O
’ALS174
’ALS175
11
8
11
9
See Note 3
CC
14
14
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, I
.
OS
NOTE 3:
I
is measured with D inputs and CLR grounded, and CLK at 4.5 V.
CC
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
SN54ALS174
SN54ALS175
SN74ALS174
SN74ALS175
UNIT
MIN
MAX
MIN
MAX
f
t
Clock frequency
Pulse duration
40
50
MHz
clock
15
12.5
12.5
15
10
10
10
10
6
CLR low
CLK high
CLK low
Data
ns
w
t
t
ns
ns
Setup time before CLK↑
su
CLR inactive
8
Hold time, data after CLK↑
0
0
h
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
§
FROM
TO
(OUTPUT)
T
A
= MIN to MAX
PARAMETER
(INPUT)
UNIT
SN54ALS174
SN54ALS175
SN74ALS174
SN74ALS175
MIN
40
3
MAX
MIN
50
5
MAX
f
t
t
t
t
MHz
ns
max
PLH
PHL
PLH
PHL
20
30
20
24
18
23
15
17
Any Q
(or Q, ’ALS175)
CLR
CLK
5
8
3
3
Any Q
(or Q, ’ALS175)
ns
5
5
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B
SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B
HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SDAS207E - APRIL 1982 - REVISED MAY 2002
absolute maximum ratings over operating free-air temperature range, SN54/74AS174,
†
SN54/74AS175B (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Package thermal impedance, θ (see Note 1): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
SN54AS174
SN74AS174
SN54AS175B
SN74AS175B
UNIT
MIN NOM MAX
MIN NOM MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
IH
0.8
–2
0.8
–2
20
70
V
IL
I
I
mA
mA
°C
OH
20
OL
T
A
–55
125
0
NOTE 2: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS174
SN74AS174
SN54AS175B
SN74AS175B
PARAMETER
TEST CONDITIONS
UNIT
‡
‡
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
V
V
V
V
V
V
= 4.5 V,
I = –18 mA
–1.2
–1.2
V
V
IK
CC
CC
CC
CC
CC
CC
CC
I
= 4.5 V to 5.5 V,
= 4.5 V,
I
= –2 mA
V
CC
–2
V
CC
–2
OH
OL
OH
OL
I
= 20 mA
0.35
0.5
0.1
0.35
0.5
0.1
V
I
I
I
I
= 5.5 V,
V = 7 V
I
mA
µA
mA
mA
I
= 5.5 V,
V = 2.7 V
I
20
20
IH
IL
= 5.5 V,
V = 0.4 V
I
–0.5
–112
45
–0.5
–112
45
§
= 5.5 V,
V
O
= 2.25 V
–30
–30
O
’AS174
30
30
I
V
CC
= 5.5 V,
See Note 4
mA
CC
’AS175B
22.5
34
22.5
34
‡
§
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, I
.
OS
NOTE 4:
I
is measured with D inputs, CLR, and CLK grounded.
CC
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B
SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B
HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SDAS207E - APRIL 1982 - REVISED MAY 2002
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
SN54AS174
SN74AS174
SN54AS175B
SN74AS175B
UNIT
MIN
MAX
MIN
MAX
f
*
Clock frequency
Pulse duration
100
100
MHz
clock
5.5
4
5
4
6
5
4
3
6
1
CLR low
CLK high
CLK low
CLK low
t *
w
ns
’AS174
6
’AS175B
’AS174
5
4
Data
t
su
*
Setup time before CLK↑
’AS175B
3
ns
ns
CLR inactive
6
t *
h
Hold time, data after CLK↑
1
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data, but is not production tested.
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
(INPUT)
TO
(OUTPUT)
†
PARAMETER
UNIT
T
A
= MIN to MAX
SN54AS174
SN74AS174
MIN
100
5
MAX
MIN
100
5
MAX
f
t
t
t
*
MHz
ns
max
Any Q
Any Q
15
9.5
14
8
CLR
CLK
PHL
PLH
PHL
3.5
4.5
3.5
4.5
ns
11.5
10
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data, but is not production tested.
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
TO
(OUTPUT)
†
PARAMETER
(INPUT)
UNIT
T
A
= MIN to MAX
SN54AS175B
SN74AS175B
MIN
100
4
MAX
MIN
100
4
MAX
f
t
t
t
t
*
MHz
ns
max
10
15
9
13
PLH
PHL
PLH
PHL
CLR
CLK
Any Q or Q
Any Q or Q
4.5
3
4.5
3
8.5
11
7.5
10
ns
3
3
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data, but is not production tested.
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B
SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B
HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SDAS207E - APRIL 1982 - REVISED MAY 2002
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
V
CC
R
= R1 = R2
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
t
w
h
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
≈3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
V
OL
0.3 V
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
0.3 V
≈0 V
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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practice. TI is not responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would
reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement
specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications
of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related
requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any
applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its
representatives against any damages arising out of the use of TI products in such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is
solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in
connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products
are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any
non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Applications
Audio
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/audio
Automotive
Broadband
Digital Control
Military
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
interface.ti.com
logic.ti.com
Logic
Power Mgmt
Microcontrollers
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
microcontroller.ti.com
www.ti.com/lpw
Low Power
Wireless
Telephony
www.ti.com/telephony
Video & Imaging
Wireless
www.ti.com/video
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
LCCC
CDIP
CFP
Drawing
5962-9553701Q2A
5962-9553701QEA
83019012A
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
OBSOLETE
ACTIVE
ACTIVE
FK
J
20
16
20
16
16
20
16
16
20
16
20
16
16
16
16
16
16
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
FK
J
8301901EA
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
8301901FA
W
FK
J
83019022A
LCCC
CDIP
CFP
POST-PLATE N / A for Pkg Type
8301902EA
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
8301902FA
W
FK
J
JM38510/37201B2A
JM38510/37201BEA
JM38510/37202B2A
JM38510/37202BEA
SN54ALS174J
SN54ALS175J
SN54AS174J
LCCC
CDIP
LCCC
CDIP
CDIP
CDIP
CDIP
CDIP
SOIC
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
FK
J
A42 SNPB
A42 SNPB
A42 SNPB
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
J
J
J
SN54AS175BJ
SN74ALS174D
J
1
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALS174DE4
SN74ALS174DG4
SN74ALS174DR
SN74ALS174DRE4
SN74ALS174DRG4
SN74ALS174N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
D
D
D
D
D
N
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS174N3
SN74ALS174NE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
16
16
TBD
Call TI
Call TI
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS174NSR
SN74ALS174NSRE4
SN74ALS174NSRG4
SN74ALS175D
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
SO
NS
NS
NS
D
16
16
16
16
16
16
16
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALS175DE4
SN74ALS175DG4
SN74ALS175DR
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
SN74ALS175DRE4
SN74ALS175DRG4
SN74ALS175N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
PDIP
PDIP
SO
D
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS175NE4
SN74ALS175NSR
SN74ALS175NSRE4
SN74ALS175NSRG4
SN74AS174D
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
NS
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
40 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SN74AS174DE4
SN74AS174DG4
SN74AS174DR
D
40 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
40 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SN74AS174DRE4
SN74AS174DRG4
SN74AS174N
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74AS174NE4
SN74AS174NSR
SN74AS174NSRE4
SN74AS174NSRG4
SN74AS175BD
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
NS
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AS175BDE4
SN74AS175BDG4
SN74AS175BDR
SN74AS175BDRE4
SN74AS175BDRG4
SN74AS175BN
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
Orderable Device
SN74AS175BNE4
SN74AS175BNSR
SN74AS175BNSRE4
SN74AS175BNSRG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
PDIP
N
16
16
16
16
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SO
SO
SO
NS
NS
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SNJ54ALS174FK
SNJ54ALS174J
SNJ54ALS174W
SNJ54ALS175FK
SNJ54ALS175J
SNJ54ALS175W
SNJ54AS174FK
SNJ54AS174J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
NRND
LCCC
CDIP
CFP
FK
J
20
16
16
20
16
16
20
16
20
16
1
1
1
1
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
W
FK
J
LCCC
CDIP
CFP
POST-PLATE N / A for Pkg Type
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
W
FK
J
LCCC
CDIP
LCCC
CDIP
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
NRND
SNJ54AS175BFK
SNJ54AS175BJ
ACTIVE
ACTIVE
FK
J
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Jun-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Jun-2007
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
330
330
330
330
330
330
330
(mm)
16
SN74ALS174DR
SN74ALS174NSR
SN74ALS175DR
SN74ALS175NSR
SN74AS174DR
D
NS
D
16
16
16
16
16
16
16
16
FMX
MLA
FMX
MLA
FMX
MLA
FMX
MLA
6.5
8.2
6.5
8.2
6.5
8.2
6.5
8.2
10.3
10.5
10.3
10.5
10.3
10.5
10.3
10.5
2.1
2.5
2.1
2.5
2.1
2.5
2.1
2.5
8
12
8
16
16
16
16
16
16
16
16
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
16
16
NS
D
16
12
8
16
SN74AS174NSR
SN74AS175BDR
SN74AS175BNSR
NS
D
16
12
8
16
NS
16
12
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74ALS174DR
SN74ALS174NSR
SN74ALS175DR
SN74ALS175NSR
SN74AS174DR
D
NS
D
16
16
16
16
16
16
16
16
FMX
MLA
FMX
MLA
FMX
MLA
FMX
MLA
342.9
342.9
342.9
342.9
342.9
342.9
342.9
342.9
336.6
336.6
336.6
336.6
336.6
336.6
336.6
336.6
28.58
28.58
28.58
28.58
28.58
28.58
28.58
28.58
NS
D
SN74AS174NSR
SN74AS175BDR
SN74AS175BNSR
NS
D
NS
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Jun-2007
Pack Materials-Page 3
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,
improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s
standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should
provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask
work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services
are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such
products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under
the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an
unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties
may be subject to additional restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service
voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business
practice. TI is not responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would
reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement
specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications
of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related
requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any
applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its
representatives against any damages arising out of the use of TI products in such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is
solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in
connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products
are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any
non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Applications
Audio
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/audio
Automotive
Broadband
Digital Control
Military
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
interface.ti.com
logic.ti.com
Logic
Power Mgmt
Microcontrollers
RFID
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lpw
Telephony
Low Power
Wireless
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated
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