SN54ALS74AJ [TI]
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET; 双上升沿触发的D型触发器具有清零和预设
| 型号： | SN54ALS74AJ |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET |
| 文件： | 总7页 (文件大小：116K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS143C – APRIL 1982 – REVISED AUGUST 1995
SN54ALS74A, SN54AS74A . . . J PACKAGE
SN74ALS74A, SN74AS74A . . . D OR N PACKAGE
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
(TOP VIEW)
1CLR
1D
1CLK
1PRE
1Q
V
CC
2CLR
1
2
3
4
5
6
7
14
13
12
11
10
9
TYPICAL MAXIMUM
CLOCK FREQUENCY
TYPICAL POWER
DISSIPATION
PER FLIP-FLOP
(mW)
2D
TYPE
2CLK
2PRE
2Q
(C = 50 pF)
L
(MHz)
50
′ALS74A
′AS74A
6
1Q
GND
2Q
8
134
26
description
SN54ALS74A, SN54AS74A . . . FK PACKAGE
(TOP VIEW)
These devices contain two independent
positive-edge-triggered D-type flip-flops. A low
level at the preset (PRE) or clear (CLR) inputs sets
or resets the outputs regardless of the levels of the
other inputs. When PRE and CLR are inactive
(high), data at the data (D) input meeting the
setup-time requirements are transferred to the
outputs on the positive-going edge of the clock
(CLK) pulse. Clock triggering occurs at a voltage
level and is not directly related to the rise time of
CLK. Following the hold-time interval, data at the
D input can be changed without affecting the
levels at the outputs.
3
2
1
20 19
18
1CLK
NC
2D
17 NC
4
5
6
7
8
16
15
14
1PRE
NC
2CLK
NC
1Q
2PRE
9 10 11 12 13
NC – No internal connection
The SN54ALS74A and SN54AS74A are
characterized for operation over the full military
temperature range of –55°C to 125°C. The
SN74ALS74AandSN74AS74Aarecharacterized
for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OUTPUTS
PRE
L
CLR
CLK
X
D
X
X
X
H
L
Q
H
L
Q
L
H
L
H
X
H
†
†
H
L
L
X
H
H
H
H
H
↑
H
L
L
H
↑
H
H
L
X
Q
Q
0
0
†
The output levels in this configuration are not
specifiedtomeettheminimumlevelsforV ifthe
OH
lows at PRE and CLR are near V maximum.
IL
Furthermore, this configuration is nonstable; that
is, it does not persist when PRE or CLR returns to
its inactive (high) level.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS143C – APRIL 1982 – REVISED AUGUST 1995
†
logic symbol
4
5
6
9
8
S
1PRE
1CLK
1D
1Q
1Q
2Q
2Q
3
2
1
C1
1D
R
1CLR
10
11
12
13
2PRE
2CLK
2D
2CLR
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
logic diagram (positive logic)
PRE
CLR
Q
Q
CLK
D
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Operating free-air temperature range, T : SN54ALS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74ALS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS143C – APRIL 1982 – REVISED AUGUST 1995
recommended operating conditions
SN54ALS74A
MIN NOM MAX
SN74ALS74A
MIN NOM MAX
UNIT
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Clock frequency
IH
0.7
–0.4
4
0.8
–0.4
8
V
IL
I
I
f
mA
mA
MHz
OH
OL
clock
0
15
25
0
15
34
PRE or CLR low
CLK high
t
w
Pulse duration
17.5
17.5
16
14.5
14.5
15
ns
CLK low
Data
t
t
ns
Setup time before CLK↑
su
PRE or CLR inactive
Data
10
10
Hold time after CLK↑
2
0
ns
h
T
A
Operating free-air temperature
–55
125
0
70
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS74A
SN74ALS74A
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = –18 mA
–1.5
–1.5
V
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
= –2 mA
= 4 mA
= 8 mA
V
CC
–2
V
CC
–2
OH
CC
OH
OL
OL
0.25
0.4
0.25
0.35
0.4
0.5
V
OL
V
CC
V
CC
V
CC
V
CC
= 4.5 V
= 4.5 V,
= 4.5 V,
= 4.5 V,
V
CLK or D
0.1
0.2
0.1
I
I
I
V = 7 V
I
mA
µA
mA
I
PRE or CLR
CLK or D
0.2
20
20
V = 2.7 V
I
IH
IL
PRE or CLR
CLK or D
40
40
–0.2
–0.4
–112
4
–0.2
–0.4
–112
4
V = 0.4 V
I
PRE or CLR
‡
I
I
V
V
= 5.5 V,
= 5.5 V,
V = 2.25 V
O
–20
–30
mA
mA
O
CC
See Note 1
2.4
2.4
CC
CC
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
NOTE 1:
I
is measured with D, CLK, and PRE grounded, then with D, CLK, and CLR grounded.
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS143C – APRIL 1982 – REVISED AUGUST 1995
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
(INPUT)
TO
(OUTPUT)
†
PARAMETER
UNIT
T
A
= MIN to MAX
SN54ALS74A SN74ALS74A
MIN
25
3
MAX
MIN
34
3
MAX
f
t
t
t
t
MHz
ns
max
PLH
PHL
PLH
PHL
18
17
23
20
13
15
16
18
PRE or CLR
CLK
Q or Q
Q or Q
5
5
5
5
ns
5
5
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Operating free-air temperature range, T : SN54AS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74AS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS74A
MIN NOM
SN74AS74A
MIN NOM
UNIT
MAX
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Clock frequency
IH
0.8
–2
20
90
0.8
–2
V
IL
I
I
f
mA
mA
MHz
OH
OL
clock
20
*
0
4
0
4
105
PRE or CLR low
CLK high
t *
w
Pulse duration
4
4
ns
CLK low
5.5
4.5
2
5.5
4.5
2
Data
t *
su
ns
Setup time before CLK↑
PRE or CLR inactive
Data
t *
h
Hold time after CLK↑
0
0
ns
T
A
Operating free-air temperature
–55
125
0
70
°C
* On products compliant to MIL-STD-833, Class B, this parameter is based on characterization data but is not production tested.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS143C – APRIL 1982 – REVISED AUGUST 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS74A
SN74AS74A
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
CC
V
CC
V
CC
V
CC
= 4.5 V,
I = –18 mA
–1.2
–1.2
V
V
IK
I
= 4.5 V to 5.5 V,
= 4.5 V,
I
= –2 mA
= 20 mA
V
CC
–2
V
CC
–2
OH
OL
OH
OL
I
0.25
0.5
0.1
0.25
0.5
0.1
V
I
I
= 5.5 V,
V = 7 V
I
mA
CLK or D
20
20
I
V
= 5.5 V,
= 5.5 V,
V = 2.7 V
µA
IH
IL
CC
CC
I
PRE or CLR
CLK or D
40
40
–0.5
–1.8
–112
16
–0.5
–1.8
–112
16
I
V
V = 0.4 V
I
mA
PRE or CLR
‡
I
I
V
V
= 5.5 V,
= 5.5 V,
V = 2.25 V
O
–30
–30
mA
mA
O
CC
See Note 1
10.5
10.5
CC
CC
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
NOTE 1:
I
is measured with D, CLK, and PRE grounded, then with D, CLK, and CLR grounded.
CC
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
TO
(OUTPUT)
§
PARAMETER
(INPUT)
UNIT
T
A
= MIN to MAX
SN54AS74A
SN74AS74A
MIN
90
MAX
MIN
105
2
MAX
f
t
t
t
t
*
MHz
ns
max
2
9
11.5
10
7.5
10.5
8
PLH
PHL
PLH
PHL
PRE or CLR
CLK
Q or Q
Q or Q
2.5
2.5
3.5
2.5
3
ns
10.5
3
9
* On products compliant to MIL-STD-833, Class B, this parameter is based on characterization data but is not production tested.
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS143C – APRIL 1982 – REVISED AUGUST 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
h
t
w
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
0.3 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
0.3 V
V
OL
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
0.3 V
V
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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Copyright 1998, Texas Instruments Incorporated
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