SN54F74FK [TI]
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET; 双上升沿触发的D型触发器具有清零和预设
| 型号： | SN54F74FK |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET |
| 文件： | 总6页 (文件大小：100K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54F74, SN74F74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SDFS046A – MARCH 1987 – REVISED OCTOBER 1993
SN54F74 . . . J PACKAGE
SN74F74 . . . D OR N PACKAGE
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
(TOP VIEW)
1CLR
1D
1CLK
1PRE
1Q
V
CC
2CLR
1
2
3
4
5
6
7
14
13
12
11
10
9
description
2D
These devices contain two independent positive-
edge-triggered D-type flip-flops. A low level at the
preset (PRE) or clear (CLR) inputs sets or resets
the outputs regardless of the levels of the other
inputs. When PRE and CLR are inactive (high),
data at the data (D) input meeting the setup time
requirements is transferred to the outputs on the
positive-going edge of the clock pulse. Clock
triggering occurs at a voltage level and is not
directly related to the rise time of the clock pulse.
Following the hold-time interval, data at the
D input may be changed without affecting the
levels at the outputs.
2CLK
2PRE
2Q
1Q
GND
2Q
8
SN54F74 . . . FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
1CLK
NC
2D
17 NC
4
5
6
7
8
16
15
14
1PRE
NC
2CLK
NC
The SN54F74 is characterized for operation over
the full military temperature range of –55°C to
125°C. The SN74F74 is characterized for
operation from 0°C to 70°C.
1Q
2PRE
9 10 11 12 13
FUNCTION TABLE
INPUTS
OUTPUTS
NC – No internal connection
PRE
L
CLR
CLK
X
D
X
X
X
H
L
Q
H
L
Q
L
H
L
H
X
H
†
†
H
L
L
X
H
H
H
H
H
↑
H
L
L
H
↑
H
H
L
X
Q
Q
0
0
†
The output levels are not guaranteed to meet the
minimum levels for Furthermore, this
V
OH
.
configuration is nonstable; that is, it will not persist
when PRE or CLR returns to its inactive (high)
level.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F74, SN74F74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SDFS046A – MARCH 1987 – REVISED OCTOBER 1993
†
logic symbol
4
5
6
9
8
S
1PRE
1CLK
1D
1Q
1Q
2Q
2Q
3
2
1
C1
1D
R
1CLR
10
11
12
13
2PRE
2CLK
2D
2CLR
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
logic diagram, each flip-flop (positive logic)
PRE
C
TG
C
CLK
C
C
Q
C
TG
C
C
TG
C
C
D
TG
C
Q
CLR
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 7 V
I
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA to 5 mA
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
CC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
Operating free-air temperature range: SN54F74 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
SN74F74 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F74, SN74F74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SDFS046A – MARCH 1987 – REVISED OCTOBER 1993
recommended operating conditions
SN54F74
SN74F74
UNIT
MIN NOM
MAX
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input clamp current
0.8
–18
– 1
0.8
–18
– 1
20
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
Operating free-air temperature
OH
OL
20
T
A
–55
125
0
70
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54F74
SN74F74
PARAMETER
TEST CONDITIONS
UNIT
V
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.5 V,
= 4.5 V,
= 4.75 V,
= 4.5 V,
= 5.5 V,
= 5.5 V,
I = –18 mA
I
–1.2
–1.2
IK
I
I
I
= – 1 mA
= – 1 mA
= 20 mA
2.5
3.4
0.3
2.5
2.7
3.4
0.3
OH
OH
OL
V
OH
OL
0.5
0.1
0.5
0.1
V
I
I
V = 7 V
I
mA
µA
I
IH
V = 2.7 V
I
20
20
Data, CLK
– 0.6
– 1.8
–150
16
– 0.6
– 1.8
–150
16
I
V
= 5.5 V,
V = 0.5 V
mA
IL
CC
I
PRE or CLR
‡
I
I
V
V
= 5.5 V,
= 5.5 V,
V = 0
O
–60
–60
mA
mA
OS
CC
CC
See Note 2
10.5
10.5
CC
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 2:
I
is measured with D, CLK, and PRE grounded then with D, CLK, and CLR grounded.
CC
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
V
T
= 5 V,
= 25°C
CC
A
SN54F74
SN74F74
UNIT
′F74
MIN
0
MAX
MIN
0
MAX
80
MIN
0
MAX
100
f
t
Clock frequency
Pulse duration
100
MHz
ns
clock
CLK high, PRE or CLR low
4
4
4
w
CLK low
5
6
5
High
2
3
2
Setup time, data before CLK↑
Setup time, inactive-state before CLK↑
Hold time, data after CLK↑
Low
3
4
3
t
t
ns
ns
su
§
PRE or CLR to CLK
2
3
2
High
Low
1
2
1
h
1
2
1
§
Inactive-state setup time is also referred to as recovery time.
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F74, SN74F74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SDFS046A – MARCH 1987 – REVISED OCTOBER 1993
switching characteristics (see Note 3)
V
C
R
= 5 V,
= 50 pF,
= 500 Ω,
= 25°C
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
CC
L
L
= 500Ω,
FROM
(INPUT)
TO
(OUTPUT)
†
PARAMETER
UNIT
T
A
T
A
= MIN to MAX
′F74
TYP
145
4.9
SN54F74
SN74F74
MIN
100
3
MAX
MIN
80
MAX
MIN
100
3
MAX
f
MHz
ns
max
PLH
PHL
PLH
PHL
t
t
t
t
6.8
8
3.8
4.4
3.2
3.5
8.5
10.5
8
7.8
9.2
CLK
Q or Q
Q or Q
3.6
2.4
2.7
5.8
3.6
2.4
2.7
4.2
6.1
9
7.1
PRE or CLR
ns
6.6
11.5
10.5
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 3: Load circuits and waveforms are shown in Section 1.
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
28-Feb-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CFP
Drawing
5962-9759201Q2A
5962-9759201QCA
5962-9759201QDA
JM38510/34101B2A
JM38510/34101BCA
JM38510/34101BDA
SN54F74J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
J
20
14
14
20
14
14
14
14
1
1
None
None
None
None
None
None
None
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Call TI
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Call TI
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
W
FK
J
1
LCCC
CDIP
CFP
1
1
W
J
1
CDIP
SOIC
1
SN74F74D
D
50
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74F74DR
SN74F74N
ACTIVE
ACTIVE
SOIC
PDIP
D
N
14
14
2500
25
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74F74N3
OBSOLETE
ACTIVE
PDIP
SO
N
14
14
None
Call TI
Call TI
SN74F74NSR
NS
2000
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SNJ54F74FK
SNJ54F74J
SNJ54F74W
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
J
20
14
14
1
1
1
None
None
None
Call TI
Call TI
Call TI
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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Post Office Box 655303 Dallas, Texas 75265
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