SN54HC365W [TI]
HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS; HEX缓冲器和线路驱动器，具有三态输出
| 型号： | SN54HC365W |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS |
| 文件： | 总14页 (文件大小：441K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SCLS308D − JANUARY 1996 − REVISED OCTOBER 2003
SN54HC365 . . . J OR W PACKAGE
SN74HC365 . . . D, N, NS, OR PW PACKAGE
(TOP VIEW)
D
D
Wide Operating Voltage Range of 2 V to 6 V
High-Current 3-State Outputs Drive Bus
Lines, Buffer-Memory Address Registers,
or Drive Up To 15 LSTTL Loads
OE1
A1
V
CC
OE2
A6
1
2
3
4
5
6
7
8
16
15
14
13
D
D
D
D
D
True Outputs
Y1
Low Power Consumption, 80-µA Max I
CC
A2
Y6
Typical t = 10 ns
pd
6-mA Output Drive at 5 V
Y2
12 A5
11
10
9
A3
Y5
A4
Y4
Low Input Current of 1 µA Max
Y3
GND
description/ordering information
SN54HC365 . . . FK PACKAGE
(TOP VIEW)
These hex buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. The ’HC365 devices contain six
independent buffers/drivers with dual-gated
output-enable (OE1 and OE2) inputs. When OE1
and OE2 are both low, the devices pass
noninverted data from the A inputs to the
Y outputs. If either (or both) output-enable
terminal(s) is high, the outputs are in the
high-impedance state.
3
2
1
20 19
18
A6
Y6
NC
Y1
A2
NC
Y2
A3
4
5
6
7
8
17
16
15 A5
14
9 10 11 12 13
Y5
NC − No internal connection
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
Tube of 25
Tube of 40
Reel of 2500
Reel of 250
Reel of 2000
Reel of 90
SN74HC365N
SN74HC365N
SN74HC365D
SN74HC365DR
SN74HC365DT
SN74HC365NSR
SN74HC365PW
SN74HC365PWR
SN74HC365PWT
SNJ54HC365J
SNJ54HC365W
SNJ54HC365FK
SOIC − D
SOP − NS
HC365
HC365
−40°C to 85°C
Reel of 2000
Reel of 250
Tube of 25
Tube of 150
Tube of 55
TSSOP − PW
HC365
CDIP − J
CFP − W
LCCC − FK
SNJ54HC365J
SNJ54HC365W
SNJ54HC365FK
−55°C to 125°C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
ꢘ ꢛ ꢦ ꢞ ꢝꢩ ꢤꢣ ꢡꢢ ꢣꢝ ꢟꢦ ꢨꢚ ꢠꢛ ꢡ ꢡꢝ ꢰꢓ ꢒꢗ ꢙꢏ ꢎ ꢗꢆꢱꢂ ꢆꢂꢈ ꢠꢨꢨ ꢦꢠ ꢞ ꢠ ꢟꢥ ꢡꢥꢞ ꢢ ꢠ ꢞ ꢥ ꢡꢥ ꢢꢡꢥ ꢩ
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢄ ꢊꢋ ꢌ ꢍꢎ ꢎ ꢊ ꢏꢀ ꢐꢁ ꢑ ꢒꢓ ꢁ ꢊ ꢑꢏ ꢓ ꢔꢊ ꢏꢀ
ꢕꢓ ꢖ ꢄ ꢆ ꢗꢀꢖꢐꢖ ꢊ ꢘꢍꢖ ꢙ ꢍꢖꢀ
SCLS308D − JANUARY 1996 − REVISED OCTOBER 2003
FUNCTION TABLE
(each buffer/driver)
INPUTS
OUTPUT
Y
OE1
OE2
X
A
X
X
H
L
H
X
L
Z
Z
H
L
H
L
L
L
logic diagram (positive logic)
1
OE1
OE2
15
2
3
A1
Y1
To Five Other Channels
Pin numbers shown are for the D, J, N, NS, PW, and W packages.
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCLS308D − JANUARY 1996 − REVISED OCTOBER 2003
recommended operating conditions (see Note 3)
SN54HC365
MIN NOM
SN74HC365
MIN NOM
UNIT
MAX
MAX
V
V
Supply voltage
2
1.5
5
6
2
1.5
5
6
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
= 4.5 V
= 6 V
3.15
4.2
3.15
4.2
High-level input voltage
V
V
IH
= 2 V
0.5
1.35
1.8
0.5
1.35
1.8
= 4.5 V
= 6 V
V
IL
Low-level input voltage
V
V
Input voltage
0
0
V
V
0
0
V
V
V
V
I
CC
CC
Output voltage
O
CC
CC
V
CC
V
CC
V
CC
= 2 V
1000
500
400
125
1000
500
400
85
= 4.5 V
= 6 V
∆t/∆v
Input transition rise/fall time
ns
T
A
Operating free-air temperature
−55
−40
°C
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54HC365
SN74HC365
A
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
TYP
MAX
MIN
1.9
4.4
5.9
3.7
5.2
MAX
MIN
1.9
MAX
2 V
4.5 V
6 V
1.9 1.998
4.4 4.499
5.9 5.999
4.4
I
= −20 µA
OH
5.9
V
V = V or V
IH
V
OH
OL
I
IL
IL
I
I
= −6 mA
4.5 V
6 V
3.98
5.48
4.3
5.8
3.84
5.34
OH
= −7.8 mA
OH
2 V
0.002
0.001
0.001
0.17
0.15
0.1
0.1
0.1
0.1
0.26
0.26
100
0.5
8
0.1
0.1
0.1
0.1
4.5 V
6 V
I
= 20 µA
OL
0.1
0.1
V
V = V or V
V
I
IH
I
I
= 6 mA
4.5 V
6 V
0.4
0.33
0.33
1000
5
OL
= 7.8 mA
0.4
OL
I
I
I
V = V
I
or 0
6 V
1000
10
nA
µA
µA
pF
I
CC
V
O
= V
or 0
6 V
0.01
OZ
CC
CC
V = V
I
or 0,
I
O
= 0
6 V
160
10
80
CC
C
2 V to 6 V
3
10
10
i
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢇ ꢂꢈ ꢀꢁ ꢉ ꢃ ꢄꢅꢆ ꢇ ꢂ
ꢄ ꢊꢋ ꢌ ꢍꢎ ꢎ ꢊ ꢏꢀ ꢐꢁ ꢑ ꢒꢓ ꢁ ꢊ ꢑꢏ ꢓ ꢔꢊ ꢏꢀ
ꢕꢓ ꢖ ꢄ ꢆ ꢗꢀꢖꢐꢖ ꢊ ꢘꢍꢖ ꢙ ꢍꢖꢀ
SCLS308D − JANUARY 1996 − REVISED OCTOBER 2003
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
50
SN54HC365
SN74HC365
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
CC
MIN
MAX
95
MIN
MAX
145
29
MIN
MAX
120
24
2 V
4.5 V
6 V
12
19
t
t
t
t
A
Y
Y
ns
pd
en
dis
t
10
16
25
20
2 V
100
26
190
38
285
57
238
48
4.5 V
6 V
OE
OE
ns
ns
ns
21
32
48
41
2 V
50
175
35
265
53
240
48
4.5 V
6 V
21
Y
19
30
45
41
2 V
28
60
90
75
Any
4.5 V
6 V
8
12
18
15
6
10
15
13
switching characteristics over recommended operating free-air temperature range, C = 150 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
70
SN54HC365
SN74HC365
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
CC
MIN
MAX
120
24
MIN
MAX
180
36
MIN
MAX
150
30
2 V
4.5 V
6 V
17
t
t
t
A
Y
Y
ns
pd
en
t
14
20
31
25
2 V
140
30
230
46
345
69
285
57
4.5 V
6 V
OE
ns
ns
28
39
59
48
2 V
45
210
42
315
63
265
53
Any
4.5 V
6 V
17
13
36
53
45
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
TYP
UNIT
C
Power dissipation capacitance per buffer/driver
No load
35
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢕ ꢓꢖ ꢄ ꢆ ꢗꢀꢖꢐꢖ ꢊ ꢘ ꢍꢖ ꢙꢍ ꢖ
SCLS308D − JANUARY 1996 − REVISED OCTOBER 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
PARAMETER
R
C
L
S1
S2
L
t
50 pF
or
150 pF
S1
S2
PZH
Open
Closed
Closed
Open
Test
Point
t
t
1 kΩ
1 kΩ
en
R
t
L
PZL
From Output
Under Test
t
t
PHZ
PLZ
Open
Closed
Open
50 pF
C
dis
L
Closed
(see Note A)
50 pF
or
150 pF
t
or t
−−
Open
Open
pd
t
LOAD CIRCUIT
V
CC
Input
50%
50%
0 V
t
t
PLH
PHL
90%
V
V
OH
In-Phase
Output
90%
50%
10%
50%
10%
OL
t
Output
Control
(Low-Level
Enabling)
t
r
f
f
V
CC
t
t
PLH
PHL
90%
50%
50%
V
V
OH
90%
t
0 V
Out-of-Phase
Output
50%
10%
50%
10%
t
t
PLZ
PZL
OL
t
≈V
CC
≈V
CC
r
Output
Waveform 1
(See Note B)
50%
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
10%
V
OL
OH
t
t
PZH
PHZ
V
CC
V
Output
Waveform 2
(See Note B)
90%
t
90%
90%
Input
50%
10%
50%
10%
50%
0 V
≈0 V
t
r
f
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
NOTES: A.
C includes probe and test-fixture capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
pd
PLH
PLZ
PZL
PHL
PHZ
PZH
are the same as t
are the same as t .
.
dis
en
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CDIP
CDIP
SOIC
Drawing
85001012A
8500101EA
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
J
20
16
16
16
16
1
1
1
1
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
JM38510/65706BEA
SN54HC365J
J
J
SN74HC365D
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC365DE4
SN74HC365DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
D
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC365DRE4
SN74HC365DT
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC365DTE4
SN74HC365N
SOIC
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
N
25
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74HC365NSR
SN74HC365NSRE4
SN74HC365PW
SO
NS
NS
PW
PW
PW
PW
PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC365PWE4
SN74HC365PWR
SN74HC365PWRE4
SN74HC365PWT
SN74HC365PWTE4
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SNJ54HC365FK
SNJ54HC365J
ACTIVE
ACTIVE
LCCC
CDIP
FK
J
20
16
1
1
TBD
TBD
Call TI
Call TI
Level-NC-NC-NC
Level-NC-NC-NC
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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