SN54HCT139FK [TI]
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS; 双路2号线至4线解码器/多路解复用器型号: | SN54HCT139FK |
厂家: | TEXAS INSTRUMENTS |
描述: | DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS |
文件: | 总5页 (文件大小:96K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN54HCT139, SN74HCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS066B – MARCH 1982 – REVISED MAY 1997
SN54HCT139 . . . J OR W PACKAGE
SN74HCT139 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
Inputs Are TTL-Voltage Compatible
Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
1G
1A
V
CC
2G
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
1B
2A
1Y0
1Y1
1Y2
1Y3
GND
2B
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Ceramic Flat (W) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
2Y0
2Y1
2Y2
2Y3
SN54HCT139 . . . FK PACKAGE
(TOP VIEW)
description
The ’HCT139 are designed for high-performance
memory-decoding or data-routing applications
requiring very short propagation delay times. In
high-performance memory systems, these
decoders can minimize the effects of system
decoding. When employed with high-speed
memories utilizing a fast enable circuit, the delay
time of these decoders and the enable time of the
memory are usually less than the typical access
time of the memory. This means that the effective
system delay introduced by the decoders is
negligible.
3
2
1
20 19
18
2A
2B
NC
1B
1Y0
NC
4
5
6
7
8
17
16
15 2Y0
14
9 10 11 12 13
1Y1
1Y2
2Y1
NC – No internal connection
The ’HCT139 comprise two individual 2-line to
4-line decoders in a single package. The
active-low enable (G) input can be used as a data
line in demultiplexing applications. These
decoders/demultiplexers feature fully buffered
inputs, each of which represents only one
normalized load to its driving circuit.
The SN54HCT139 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74HCT139 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUTS
SELECT
G
B
X
L
A
X
L
Y0
H
L
Y1
H
H
L
Y2
H
H
H
L
Y3
H
H
H
H
L
H
L
L
L
L
L
H
L
H
H
H
H
H
H
H
H
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HCT139, SN74HCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS066B – MARCH 1982 – REVISED MAY 1997
†
logic symbols (alternatives)
X/Y
DMUX
4
4
0
1Y0
0
1Y0
2
3
1
2
3
1
1A
1B
1G
1
1A
1B
1G
0
1
5
6
7
5
6
7
0
G
1
2
3
1Y1
1Y2
1Y3
1
2
3
1Y1
1Y2
1Y3
3
2
EN
12
11
10
12
11
10
14
13
15
14
13
15
2Y0
2Y1
2Y2
2Y0
2Y1
2Y2
2A
2B
2G
2A
2B
2G
9
9
2Y3
2Y3
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
logic diagram (positive logic)
4
5
6
7
1Y0
1Y1
1Y2
1Y3
1
1G
2
1A
3
1B
12
11
10
9
2Y0
2Y1
15
2G
2Y2
2Y3
14
2A
13
2B
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HCT139, SN74HCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS066B – MARCH 1982 – REVISED MAY 1997
†
absolute maximum ratings over operating free-air temperature range
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
recommended operating conditions
SN54HCT139
MIN NOM MAX
SN74HCT139
MIN NOM MAX
UNIT
V
V
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
I
High-level input voltage
Low-level input voltage
Input voltage
V
V
= 4.5 V to 5.5 V
= 4.5 V to 5.5 V
CC
0
0.8
0
0.8
V
CC
0
V
V
0
V
V
V
CC
CC
Output voltage
0
0
V
O
CC
CC
t
Input transition (rise and fall) time
Operating free-air temperature
0
500
125
0
500
85
ns
°C
t
T
–55
–40
A
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54HCT139 SN74HCT139
A
PARAMETER
TEST CONDITIONS
V
UNIT
V
CC
MIN
TYP
MAX
MIN
4.4
MAX
MIN
4.4
MAX
I
I
I
I
= –20 µA
= –4 mA
= 20 µA
= 4 mA
4.4 4.499
OH
OH
OL
OL
V
V = V or V
IH
4.5 V
4.5 V
OH
OL
I
IL
IL
3.98
4.3
0.001
0.17
3.7
3.84
0.1
0.26
±100
8
0.1
0.4
0.1
0.33
V
V = V or V
V
I
IH
I
I
V = V
I
or 0
5.5 V
5.5 V
±0.1
±1000
160
±1000
80
nA
I
CC
CC
V = V
I
or 0,
I
O
= 0
µA
CC
One input at 0.5 V or 2.4 V,
Other inputs at 0 or V
‡
5.5 V
1.4
3
2.4
10
3
2.9
mA
pF
∆I
CC
CC
4.5 V
to 5.5 V
C
10
10
i
‡
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
CC
.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HCT139, SN74HCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS066B – MARCH 1982 – REVISED MAY 1997
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
14
SN54HCT139 SN74HCT139
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
ns
CC
MIN
MAX
34
MIN
MAX
51
MIN
MAX
43
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
A or B
G
Y
Y
Y
12
30
50
40
t
pd
t
11
34
51
43
10
30
50
40
8
15
22
19
t
ns
6
14
21
17
operating characteristics, T = 25°C
A
PARAMETER
Power dissipation capacitance per decoder
TEST CONDITIONS
TYP
UNIT
C
No load
25
pF
pd
PARAMETER MEASUREMENT INFORMATION
3 V
0 V
From Output
Under Test
Test
Point
Input
1.3 V
1.3 V
C
= 50 pF
L
t
t
PLH
PHL
90%
(see Note A)
V
V
OH
In-Phase
Output
90%
t
1.3 V
10%
1.3 V
LOAD CIRCUIT
10%
t
OL
r
f
f
t
t
PLH
PHL
90%
3 V
0 V
V
V
OH
2.7 V
2.7 V
Input
1.3 V
0.3 V
1.3 V
0.3 V
90%
t
Out-of-Phase
Output
1.3 V
10%
1.3 V
10%
OL
t
t
t
r
f
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES
NOTES: A.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
C includes probe and test-fixture capacitance.
L
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
D. and t are the same as t
t
.
pd
PLH
PHL
Figure 1. Load Circuit and Voltage Waveforms
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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