SN54LS05J-00 [TI]
IC LS SERIES, HEX 1-INPUT INVERT GATE, CDIP14, Gate;
| 型号： | SN54LS05J-00 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IC LS SERIES, HEX 1-INPUT INVERT GATE, CDIP14, Gate 栅 CD 输入元件 逻辑集成电路 |
| 文件： | 总22页 (文件大小：904K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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The SN5405 is obsolete
and no longer is supplied.
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SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
D
Package Options Include Plastic
D
Dependable Texas Instrument Quality and
Reliability
Small-Outline (D, NS), Shrink Small-Outline
(DB), and Ceramic Flat (W) Packages,
Ceramic Chip Carriers (FK), and Standard
Plastic (N) and Ceramic (J) DIPs
SN54LS05, SN54S05 . . . FK PACKAGE
(TOP VIEW)
SN5405, SN54LS05, SN54S05 . . . J PACKAGE
SN7405 . . . N PACKAGE
SN74LS05 . . . D, DB, N, OR NS PACKAGE
SN74S05 . . . D, N, OR NS PACKAGE
(TOP VIEW)
SN54LS05, SN54S05 . . . W PACKAGE
(TOP VIEW)
3
2
1
20 19
18
6Y
NC
5A
NC
5Y
2A
NC
2Y
4
5
6
7
8
17
16
15
14
1
2
3
4
5
6
7
14
13
12
11
10
9
1
2
3
4
5
6
7
14
13
12
11
10
9
1A
2Y
2A
1Y
6A
6Y
GND
5Y
1A
1Y
2A
2Y
3A
V
CC
6A
6Y
5A
5Y
4A
4Y
NC
3A
V
CC
3A
9 10 11 12 13
3Y
4A
5A
4Y
3Y
GND
8
8
NC − No internal connection
description/ordering information
These devices contain six independent inverters. To perform correctly, the open-collector outputs require pullup
resistors. These devices may be connected to other open-collector outputs to implement active-low wired-OR
or active-high wire-AND functions. Open-collector devices often are used to generate high V
levels.
OH
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
SN7405N
SN7405N
SN74LS05N
SN74S05N
SN74LS05N
SN74S05N
PDIP − N
SOIC − D
Tube
Tube
SN74LS05D
SN74LS05DR
SN74S05D
LS05
S05
Tape and reel
Tube
0°C to 70°C
Tape and reel
SN74S05DR
SN74LS05NSR
SN74S05NSR
SN74LS05DBR
SNJ54LS05J
SNJ54S05J
74LS05
SOP − NS
Tape and reel
Tape and reel
74S05
SSOP − DB
LS05
SNJ54LS05J
SNJ54S05J
SNJ54LS05W
SNJ54S05W
SNJ54LS05FK
CDIP − J
Tube
Tube
Tube
SNJ54LS05W
SNJ54S05W
SNJ54LS05FK
−55°C to 125°C
CDIP − W
LCCC − FK
SNJ54S05FK
SNJ54S05FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
ꢐ ꢘ ꢣ ꢛ ꢚꢦ ꢡꢠ ꢞꢟ ꢠꢚ ꢜꢣ ꢥꢗ ꢝꢘ ꢞ ꢞꢚ ꢭꢋ ꢄꢒ ꢑꢍ ꢮ ꢒꢯꢰꢂ ꢯꢂꢆ ꢝꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢝ ꢛ ꢢ ꢞꢢ ꢟꢞꢢ ꢦ
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ꢡ ꢘꢥ ꢢꢟꢟ ꢚ ꢞꢨꢢ ꢛ ꢪꢗ ꢟꢢ ꢘ ꢚꢞꢢ ꢦꢧ ꢐ ꢘ ꢝꢥ ꢥ ꢚ ꢞꢨꢢ ꢛ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢟ ꢆ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚ ꢘ
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢀꢅ ꢂꢆ ꢀꢁ ꢂꢃ ꢀ ꢅ ꢂ
ꢀ ꢁꢇꢃ ꢅ ꢂꢆ ꢀꢁ ꢇ ꢃꢄ ꢀ ꢅ ꢂꢆ ꢀ ꢁꢇ ꢃ ꢀꢅ ꢂ
The SN5405 is obsolete
and no longer is supplied.
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SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
FUNCTION TABLE
(each inverter)
INPUT
OUTPUT
Y
A
H
L
L
H
logic diagram (positive logic)
2
4
6
8
1
1A
1Y
2Y
3Y
4Y
5Y
6Y
3
2A
3A
4A
5A
6A
5
9
10
11
13
12
Y = A
Pin numbers shown are for the D, DB, J, N, and NS packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢀ
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The SN5405 is obsolete
and no longer is supplied.
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SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
schematic (each inverter)
’05
’LS05
V
CC
V
CC
4 kΩ
1.6 kΩ
20 kΩ
8 kΩ
Input
A
Input
A
Output
Y
Output
Y
1 kΩ
4.5 kΩ
GND
GND
’S05
V
CC
900 Ω
2.8 kΩ
Input
A
Output
Y
250 Ω
500 Ω
Resistor values shown are nominal.
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, V
(see Note 1): ’05, ’LS05, ’S05 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V : ’05, ’S05 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
I
’LS05 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Off-state output voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
O
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values are with respect to network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢀꢅ ꢂꢆ ꢀꢁ ꢂꢃ ꢀ ꢅ ꢂ
ꢀ ꢁꢇꢃ ꢅ ꢂꢆ ꢀꢁ ꢇ ꢃꢄ ꢀ ꢅ ꢂꢆ ꢀ ꢁꢇ ꢃ ꢀꢅ ꢂ
ꢈ ꢉꢊ ꢋ ꢁ ꢌꢉꢍ ꢎ ꢉꢍ ꢀ ꢏ ꢋ ꢎꢈ ꢐ ꢑꢉ ꢁꢒꢓ ꢐꢄ ꢄꢉ ꢓ ꢎꢐ ꢍ ꢐ ꢔꢎ ꢑꢔꢎ ꢀ
The SN5405 is obsolete
and no longer is supplied.
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
recommended operating conditions
SN5405
MIN NOM
SN7405
UNIT
MAX
MIN NOM
MAX
V
V
V
V
Supply voltage
4.5
2
5
5.5
4.75
2
5
5.25
V
V
CC
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output current
Operating free-air temperature
IH
0.8
5.5
16
0.8
5.5
16
V
IL
V
OH
I
mA
°C
OL
T
A
−55
125
0
70
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN5405
SN7405
†
PARAMETER
UNIT
TEST CONDITIONS
‡
‡
MIN TYP
MAX
MIN TYP
MAX
−1.5
0.25
V
IK
V
V
= MIN,
= MIN,
I = −12 mA
I
−1.5
V
CC
V
V
= 0.8 V
= 0.7 V
= 16 mA
IL
I
V
OH
= 5.5 V
mA
OH
CC
0.25
0.4
1
IL
V
OL
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= MIN,
= MAX,
= MAX,
= MAX,
= MAX,
= MAX,
V
IH
= 2 V,
I
0.2
0.2
0.4
1
V
OL
I
I
I
I
I
V = 5.5 V
I
mA
µA
I
V = 2.4 V
I
40
40
IH
V = 0.4 V
I
−1.6
12
−1.6
12
mA
mA
mA
IL
V = 0 V
I
6
6
CCH
CCL
V = 4.5 V
I
18
33
18
33
†
‡
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V = 5 V, T = 25°C.
CC
A
switching characteristics, V
= 5 V, T = 25°C (see Figure 1)
CC
A
FROM
PARAMETER
TO
(OUTPUT)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(INPUT)
t
40
8
55
15
R
R
= 4 kΩ
PLH
L
L
Y
C = 15 pF
L
A
ns
t
= 400 Ω
PHL
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢀ
ꢁ
ꢂ
ꢃ
ꢀ
ꢅ
ꢂ
ꢂ
The SN5405 is obsolete
and no longer is supplied.
ꢈ
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ꢎ
ꢀ
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
recommended operating conditions
SN54LS05
MIN NOM
SN74LS05
UNIT
MAX
MIN NOM
MAX
V
V
V
V
Supply voltage
4.5
2
5
5.5
4.75
2
5
5.25
V
V
CC
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output current
Operating free-air temperature
IH
0.7
5.5
4
0.8
5.5
8
V
IL
V
OH
I
mA
°C
OL
T
A
−55
125
0
70
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LS05
SN74LS05
†
PARAMETER
UNIT
TEST CONDITIONS
‡
‡
MIN TYP
MAX
−1.5
0.1
MIN TYP
MAX
−1.5
0.1
V
IK
V
V
= MIN,
= MIN,
I = −18 mA
I
V
CC
I
V
= MAX,
= 2 V
V = 5.5 V
OH
mA
OH
CC
IL
I
= 4 mA
= 8 mA
0.25
0.4
0.25
0.35
0.4
OL
OL
V
OL
V
CC
= MIN,
V
IH
V
I
0.5
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
= MAX,
= MAX,
= MAX,
= MAX,
= MAX,
V = 7 V
0.1
20
0.1
mA
µA
I
I
V = 2.7 V
I
20
IH
V = 0.4 V
I
−0.4
2.4
−0.4
2.4
mA
mA
mA
IL
V = 0 V
I
1.2
3.6
1.2
3.6
CCH
CCL
V = 4.5 V
I
6.6
6.6
†
‡
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V = 5 V, T = 25°C.
CC
A
switching characteristics, V
= 5 V, T = 25°C (see Figure 2)
CC
A
FROM
PARAMETER
TO
(OUTPUT)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(INPUT)
t
t
17
15
32
28
PLH
Y
R
= 2 kΩ,
C = 15 pF
L
A
ns
L
PHL
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢀꢅ ꢂꢆ ꢀꢁ ꢂꢃ ꢀ ꢅ ꢂ
ꢀ ꢁꢇꢃ ꢅ ꢂꢆ ꢀꢁ ꢇ ꢃꢄ ꢀ ꢅ ꢂꢆ ꢀ ꢁꢇ ꢃ ꢀꢅ ꢂ
ꢈ ꢉꢊ ꢋ ꢁ ꢌꢉꢍ ꢎ ꢉꢍ ꢀ ꢏ ꢋ ꢎꢈ ꢐ ꢑꢉ ꢁꢒꢓ ꢐꢄ ꢄꢉ ꢓ ꢎꢐ ꢍ ꢐ ꢔꢎ ꢑꢔꢎ ꢀ
The SN5405 is obsolete
and no longer is supplied.
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
recommended operating conditions
SN54S05
MIN NOM
SN74S05
UNIT
MAX
MIN NOM
MAX
V
V
V
V
Supply voltage
4.5
2
5
5.5
4.75
2
5
5.25
V
V
CC
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output current
Operating free-air temperature
IH
0.8
5.5
20
0.8
5.5
20
V
IL
V
OH
I
mA
°C
OL
T
A
−55
125
0
70
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54S05
SN74S05
†
PARAMETER
UNIT
TEST CONDITIONS
‡
‡
MIN TYP
MAX
MIN TYP
MAX
−1.2
0.25
V
IK
V
V
= MIN,
= MIN,
I = −18 mA
I
−1.2
V
CC
V
V
= 0.8 V
= 0.7 V
= 20 mA
IL
I
V
OH
= 5.5 V
mA
OH
CC
0.25
0.5
1
IL
V
OL
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= MIN,
= MAX,
= MAX,
= MAX,
= MAX,
= MAX,
V
IH
= 2 V,
I
0.5
1
V
OL
I
I
I
I
I
V = 5.5 V
I
mA
µA
I
V = 2.7 V
I
50
50
IH
V = 0.5 V
I
−2
−2
mA
mA
mA
IL
V = 0 V
I
9
19.8
54
9
19.8
54
CCH
CCL
V = 4.5 V
I
30
30
†
‡
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V = 5 V, T = 25°C.
CC
A
switching characteristics, V
= 5 V, T = 25°C (see Figure 1)
CC
A
FROM
PARAMETER
TO
(OUTPUT)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(INPUT)
t
t
t
t
2
2
5
4.5
7.5
7
7.5
7
PLH
PHL
PLH
PHL
ns
C
C
= 15 pF
= 50 pF
L
L
A
Y
R = 280 Ω
L
ns
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢀ
ꢅ
ꢂ
ꢆ
ꢀꢁ ꢇꢃ ꢅ ꢂ ꢆ ꢀꢁꢇ ꢃ ꢄ ꢀꢅ ꢂ ꢆ ꢀ ꢁꢇ ꢃꢀ ꢅ
ꢀ
ꢁ
ꢂ
ꢃ
ꢀ
ꢅ
ꢂ
ꢂ
The SN5405 is obsolete
and no longer is supplied.
ꢈ
ꢉ
ꢊ
ꢋ
ꢁ
ꢌ
ꢉ
ꢍ
ꢎꢉ
ꢍ
ꢀ
ꢏ
ꢋ
ꢎ
ꢈ
ꢐ
ꢑ
ꢉ
ꢁ
ꢒ
ꢓ
ꢐ
ꢄꢄ
ꢉ
ꢓ
ꢎ
ꢐ
ꢍ
ꢐ
ꢔ
ꢎ
ꢑ
ꢔ
ꢎ
ꢀ
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
SERIES 54/74 AND 54S/74S DEVICES
V
CC
R
L
From Output
Under Test
Test Point
C
L
(see Note A)
LOAD CIRCUIT
3 V
0 V
1.5 V
1.5 V
Input
t
t
t
PHL
PLH
PHL
V
V
OH
In-Phase
Output
High-Level
Pulse
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
OL
t
t
PLH
w
V
V
OH
Low-Level
Pulse
Out-of-Phase
Output
1.5 V
OL
VOLTAGE WAVEFORMS
PULSE WIDTHS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NOTES: A.
B. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, and:
C includes probe and jig capacitance.
L
O
For Series 54/74, t ≤ 7 ns, t ≤ 7 ns.
r
f
For Series 54S/74S, t ≤ 2.5 ns, t ≤ 2.5 ns.
r
f
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢀꢅ ꢂꢆ ꢀꢁ ꢂꢃ ꢀ ꢅ ꢂ
ꢀ ꢁꢇꢃ ꢅ ꢂꢆ ꢀꢁ ꢇ ꢃꢄ ꢀ ꢅ ꢂꢆ ꢀ ꢁꢇ ꢃ ꢀꢅ ꢂ
ꢈ ꢉꢊ ꢋ ꢁ ꢌꢉꢍ ꢎ ꢉꢍ ꢀ ꢏ ꢋ ꢎꢈ ꢐ ꢑꢉ ꢁꢒꢓ ꢐꢄ ꢄꢉ ꢓ ꢎꢐ ꢍ ꢐ ꢔꢎ ꢑꢔꢎ ꢀ
The SN5405 is obsolete
and no longer is supplied.
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
SERIES 54LS/74LS DEVICES
V
CC
R
L
From Output
Under Test
Test Point
C
L
(see Note A)
LOAD CIRCUIT
3 V
0 V
1.3 V
1.3 V
Input
t
t
t
PHL
PLH
PHL
V
V
OH
In-Phase
Output
High-Level
Pulse
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
OL
t
t
PLH
w
V
V
OH
Low-Level
Pulse
Out-of-Phase
Output
1.3 V
OL
VOLTAGE WAVEFORMS
PULSE WIDTHS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NOTES: A.
B. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 1.5 ns, t ≤ 2.6 ns.
C includes probe and jig capacitance.
L
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
Figure 2. Load Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Jan-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
JM38510/07003BDA
JM38510/07004BCA
M38510/07003BDA
M38510/07004BCA
SN54LS05J
ACTIVE
ACTIVE
CFP
CDIP
CFP
W
J
14
14
14
14
14
14
14
14
14
14
14
14
1
1
1
1
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
Call TI
ACTIVE
W
J
TBD
A42
ACTIVE
CDIP
CDIP
CDIP
SOIC
SOIC
PDIP
PDIP
PDIP
SOIC
TBD
A42
ACTIVE
J
TBD
A42
SN54S05J
ACTIVE
J
TBD
A42
SN7405D
OBSOLETE
OBSOLETE
ACTIVE
D
D
N
N
N
D
TBD
Call TI
Call TI
SN7405DR
TBD
Call TI
SN7405N
25
Pb-Free (RoHS)
TBD
CU NIPDAU N / A for Pkg Type
Call TI Call TI
SN7405N3
OBSOLETE
ACTIVE
SN7405NE4
25
50
Pb-Free (RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU Level-1-260C-UNLIM
SN74LS05D
ACTIVE
Green (RoHS
& no Sb/Br)
SN74LS05DBLE
SN74LS05DBR
OBSOLETE
ACTIVE
SSOP
SSOP
DB
DB
14
14
TBD
Call TI
Call TI
2000
2000
2000
50
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU N / A for Pkg Type
SN74LS05DBRE4
SN74LS05DBRG4
SN74LS05DE4
SN74LS05DG4
SN74LS05DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
DB
DB
D
14
14
14
14
14
14
14
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
D
50
Green (RoHS
& no Sb/Br)
D
2500
2500
2500
25
Green (RoHS
& no Sb/Br)
SN74LS05DRE4
SN74LS05DRG4
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
SN74LS05N
ACTIVE
PDIP
PDIP
N
N
14
14
Pb-Free (RoHS)
TBD
SN74LS05N3
OBSOLETE
Call TI
Call TI
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Jan-2012
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
SN74LS05NE4
SN74LS05NSR
ACTIVE
ACTIVE
PDIP
SO
N
14
14
25
Pb-Free (RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU Level-1-260C-UNLIM
NS
2000
Green (RoHS
& no Sb/Br)
SN74LS05NSRG4
SN74S05D
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
D
14
14
14
14
2000
50
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU N / A for Pkg Type
SOIC
SOIC
SOIC
Green (RoHS
& no Sb/Br)
SN74S05DE4
SN74S05DG4
D
50
Green (RoHS
& no Sb/Br)
D
50
Green (RoHS
& no Sb/Br)
SN74S05N
SN74S05N3
SN74S05NE4
SN74S05NSR
ACTIVE
OBSOLETE
ACTIVE
PDIP
PDIP
PDIP
SO
N
N
14
14
14
14
25
Pb-Free (RoHS)
TBD
Call TI
Call TI
N
25
Pb-Free (RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU Level-1-260C-UNLIM
ACTIVE
NS
2000
Green (RoHS
& no Sb/Br)
SN74S05NSRE4
SN74S05NSRG4
ACTIVE
ACTIVE
SO
SO
NS
NS
14
14
2000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
POST-PLATE N / A for Pkg Type
Green (RoHS
& no Sb/Br)
SNJ54LS05FK
SNJ54LS05J
SNJ54LS05W
SNJ54S05FK
SNJ54S05J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
J
20
14
14
20
14
14
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
W
FK
J
LCCC
CDIP
CFP
POST-PLATE N / A for Pkg Type
A42
A42
N / A for Pkg Type
N / A for Pkg Type
SNJ54S05W
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Jan-2012
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54LS05, SN54S05, SN7405, SN74LS05, SN74S05 :
Catalog: SN74LS05, SN74S05
•
Military: SN5405, SN54LS05, SN54S05
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74LS05DBR
SN74LS05DR
SN74LS05NSR
SN74S05NSR
SSOP
SOIC
SO
DB
D
14
14
14
14
2000
2500
2000
2000
330.0
330.0
330.0
330.0
16.4
16.4
16.4
16.4
8.2
6.5
8.2
8.2
6.6
9.0
2.5
2.1
2.5
2.5
12.0
8.0
16.0
16.0
16.0
16.0
Q1
Q1
Q1
Q1
NS
NS
10.5
10.5
12.0
12.0
SO
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74LS05DBR
SN74LS05DR
SN74LS05NSR
SN74S05NSR
SSOP
SOIC
SO
DB
D
14
14
14
14
2000
2500
2000
2000
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
38.0
38.0
38.0
38.0
NS
NS
SO
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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