SN64BCT240DW [TI]
OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS; 八路缓冲器/驱动器，具有三态输出
| 型号： | SN64BCT240DW |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS |
| 文件： | 总5页 (文件大小：74K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN64BCT240
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS049A – MAY 1990 – REVISED NOVEMBER 1993
DW OR N PACKAGE
(TOP VIEW)
• State-of-the-Art BiCMOS Design
Significantly Reduces I
CCZ
• 3-State Outputs Drive Bus Lines or
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
Buffer-Memory Address Registers
2OE
1Y1
2A4
1Y2
2A3
1Y3
• ESD Protection Exceeds 2000 V
Per MIL-STD-883C Method 3015
• High-Impedance State During Power-Up
and Power-Down
• Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (N)
13 2A2
12 1Y4
11
2A1
description
This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state
memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the
SN64BCT241 and SN64BCT244, these devices provide the choice of selected combinations of inverting and
noninvertingoutputs, symmetricalactive-lowoutput-enable(OE)inputs, andcomplementaryOEandOEinputs.
The SN64BCT240 is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When
OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
The SN64BCT240 is characterized for operation from –40°C to 85°C and 0°C to 70°C.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
L
H
Z
H
X
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
3–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN64BCT240
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS049A – MAY 1990 – REVISED NOVEMBER 1993
†
logic symbol
logic diagram (positive logic)
1
1
1OE
EN
1OE
2
18
16
2
4
6
8
18
16
14
12
1Y1
1Y2
1Y3
1Y4
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
1A1
4
1A2
6
14
12
1A3
19
2OE
EN
8
1A4
11
13
15
17
9
7
5
3
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
19
2OE
11
9
7
5
3
2Y1
2Y2
†
2A1
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
13
2A2
15
2Y3
2Y4
2A3
17
2A4
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
I
Voltage range applied to any output in the disabled or power-off state, V . . . . . . . . . . . . . . . – 0.5 V to 5.5 V
O
Voltage range applied to any output in the high state, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to V
O
CC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input negative voltage rating may be exceeded if the input clamp current rating is observed.
3–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN64BCT240
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS049A – MAY 1990 – REVISED NOVEMBER 1993
recommended operating conditions
MIN NOM
MAX
UNIT
V
V
V
V
Supply voltage
4.5
2
5
5.5
CC
IH
IL
High-level input voltage
Low-level input voltage
Input clamp current
V
0.8
–18
–15
64
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
Operating free-air temperature
OH
OL
T
A
–40
85
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
I = –18 mA
MIN TYP
MAX
UNIT
V
V
V
V
V
= 4.5 V,
= 4.5 V
–1.2
V
IK
CC
I
I
I
I
I
= –3 mA
= –15 mA
= –3 mA
= 64 mA
= 2.7 V
2.4
2
3.3
3.1
OH
OH
OH
OH
CC
V
OH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.75 V,
= 4.5 V,
2.7
0.42
0.55
50
V
OL
I
= 5.5 V,
V
µA
µA
OZH
OZL
O
O
I
= 5.5 V,
V
= 0.5 V
–50
50
= 0 to 2.3 V (power up)
= 1.8 V to 0 (power down)
= 5.5 V,
I
V
= 2.7 V or 0.5 V,
µA
OE at 0.8 V
OZ
O
50
I
I
I
I
I
I
I
V = 7 V
I
0.1
20
mA
µA
I
= 5.5 V,
V = 2.7 V
I
IH
IL
= 5.5 V,
V = 0.5 V
I
–1
mA
mA
mA
mA
mA
pF
‡
= 5.5 V,
V
O
= 0
–100
–225
31
OS
= 5.5 V
19
46
6
CCL
CCH
CCZ
= 5.5 V
71
= 5.5 V
9
C
C
= 5 V,
V = 2.5 V or 0.5 V
I
6
i
= 5 V,
V
O
= 2.5 V or 0.5 V
11
pF
o
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
3–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN64BCT240
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS049A – MAY 1990 – REVISED NOVEMBER 1993
switching characteristics (see Note 2)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
V
C
= 5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
PARAMETER
TO
(OUTPUT)
UNIT
(INPUT)
T
A
= –40°C
to 85°C
T = 0°C
A
to 70°C
= 25°C
MIN
0.5
0.4
1
MAX
4.8
3.5
7.9
9.4
6.8
8.1
MIN MAX
MIN MAX
t
t
t
t
t
t
0.5
0.4
1
6.4
4.5
0.5
0.4
1
5.6
4
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
ns
ns
ns
9.2
8.8
10.5
8.1
9.5
OE
OE
1
1
10.8
8.5
1
1
1
1
1
1
10.6
1
NOTE 2: Load circuits and voltage waveforms are shown in Section 1.
3–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Copyright 1998, Texas Instruments Incorporated
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