SN65HVD3086EDGSG4 [TI]
LOW-POWER RS-485 FULL-DUPLEX DRIVERS/RECEIVERS; 低功耗RS - 485全双工驱动器/接收
| 型号： | SN65HVD3086EDGSG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LOW-POWER RS-485 FULL-DUPLEX DRIVERS/RECEIVERS |
| 文件： | 总17页 (文件大小：379K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN65HVD3080E
SN65HVD3083E
SN65HVD3086E
www.ti.com
SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
LOW-POWER RS-485 FULL-DUPLEX DRIVERS/RECEIVERS
FEATURES
SN65HVD308xE
(TOP VIEW)
•
Low Quiescent Power
–
–
375 µA (Typical) Enabled Mode
2 nA (Typical) Shutdown Mode
10
9
1
R
VCC
A
•
•
•
•
•
•
Small MSOP Package
2
3
4
5
RE
DE
D
1/8 Unit-Load—Up to 256 Nodes per Bus
16 kV Bus-Pin ESD Protection, 6 kV All Pins
Failsafe Receiver (Bus Open, Short, Idle)
TIA/EIA-485A Standard Compliant
RS-422 Compatible
8
B
7
Z
6
Y
GND
DEVICE
SIGNAL RATE
200 kbps
APPLICATIONS
SN65HVD3080E
SN65HVD3083E
SN65HVD3086E
•
•
•
•
•
•
•
Motion Controllers
1 Mbps
Point-of-Sale (POS) Terminals
Rack-to-Rack Communications
Industrial Networks
Power Inverters
Battery-Powered Applications
Building Automation
20 Mbps
DESCRIPTION
Each of these devices is a balanced driver and receiver designed for full-duplex RS-485 or RS-422 data bus
networks. Powered by a 5-V supply, they are fully compliant with the TIA/EIA-485A standard.
With controlled bus output transition times, the devices are suitable for signaling rates from 200 kbps to
20 Mbps.
The devices are designed to operate with a low supply current, less than 1 mA (typical), exclusive of the load.
When in the inactive shutdown mode, the supply current drops to a few nanoamps, making these devices ideal
for power-sensitive applications.
The wide common-mode range and high ESD protection levels of these devices make them suitable for
demanding applications such as motion controllers, electrical inverters, industrial networks, and cabled chassis
interconnects where noise tolerance is essential.
These devices are characterized for operation over the temperature range -40°C to 85°C
Enabled I
CC
ISL
MAX
TI
350
370
390
410
430
450
470
490
510
530
550
Current - mA
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN65HVD3080E
SN65HVD3083E
SN65HVD3086E
www.ti.com
SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION
PART NUMBER
SN65HVD3080E
SN65HVD3083E
SN65HVD3086E
PACKAGE(1)
MARKED AS
BTT
(2)
DGS, DGSR
BTU
BTF
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) The R suffix indicated tape and reel.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
UNIT
VCC
Supply voltage range(2)
–0.3 V to 7 V
–9 V to 14 V
V(A), V(B), V(Y), V(Z)
Voltage range at any bus terminal (A, B, Y, Z)
Voltage input, transient pulse through 100 Ω.
See Figure 10 (A, B, Y, Z)
V(TRANS)
–50 to 50 V
VI
Input voltage range (D, DE, RE)
Continuous total power dissipation
Junction temperature
-0.3 V to VCC+0.3 V
See the dissipation rating table
170°C
PD
TJ
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
POWER DISSIPATION RATINGS
DERATING FACTOR(1)
ABOVE TA < 25°C
PACKAGE
TA < 25°C
TA = 85°C
DGS-10
463 mW
3.71 mW/°C
241 mW
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
ELECTROSTATIC DISCHARGE PROTECTION
PARAMETER
Human Body Model(1)
TEST CONDITIONS
A,B,Y,Z, and GND
MIN
TYP
MAX
UNIT
16k
6k
V
V
V
V
All pins
All pins
Field-induced-Charged Device Mode(2)
Machine Model
1.5k
200
(1) Tested in accordance JEDEC Standard 22, Test Method A114-A. Bus pin stressed with respect to a common connection of GND and
VCC
(2) Tested in accordance JEDEC Standard 22, Test Method C101.
.
2
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SN65HVD3083E
SN65HVD3086E
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SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
SUPPLY CURRENT
over recommended operating conditions unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Receiver enabled,
Driver enabled
RE at 0 V, D and DE at VCC, No load
375
750
680
µA
µA
µA
nA
Receiver enabled,
Driver disabled
RE at 0 V, D and DE at 0 V, No load
300
240
2
ICC
Supply current
Receiver disabled,
Driver enabled
RE at VCC, D and DE at VCC, No load
RE at VCC, D and DE at 0 V, No load
600
Receiver disabled,
Driver disabled
1000
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range unless otherwise noted
MIN NOM
MAX UNIT
VCC
Supply voltage
4.5
–7(1)
2
5
5.5
V
VI or VIC
VIH
Voltage at any bus terminal (separately or common mode)
12
High-level input voltage
Low-level input voltage
Differential input voltage
D, DE, RE
D, DE, RE
VCC
VIL
0
0.8
12
V
VID
–12
–60
–10
Driver
IOH
High-level output current
Low-level output current
mA
mA
°C
Receiver
Driver
60
10
IOL
Receiver
TJ
Junction temperature
150
85
TA
Ambient still-air temperature
–40
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
3
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SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
DRIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER
TEST CONDITIONS
No load, IO = 0
MIN
3
TYP
4.3
MAX
UNIT
VCC
RL = 54 Ω, See Figure 1
1.5
1.5
2
2.3
|VOD
|
Differential output voltage
V
Vtest = –7 V to 12 V, See Figure 2
RL = 100 Ω, See Figure 1
∆|VOD
|
Change in magnitude of differential output voltage
Steady-state common-mode output voltage
Common-mode output voltage (Dominant)
Peak-to-peak common-mode output voltage
RL = 54 Ω, See Figure 1 and Figure 2
–0.2
1
0
2.6
0
0.2
3
V
V
VOC(SS)
∆VOC(SS)
VOC(PP)
See Figure 3
-0.1
0.1
0.5
VCC = 0 V, V(Z) or V(Y) = 12 V
Other input at 0 V
1
1
VCC = 0 V, V(Z) or V(Y) = -7 V
Other input at 0 V
-1
-1
IZ(Y) or
IZ(Z)
High-impedance state output current
µA
VCC = 5 V, V(Z) or V(Y) = 12 V
Other input at 0 V
VCC = 5 V, V(Z) or V(Y) = -7 V
Other input at 0 V
II
Input current
D, DE
-100
-250
100
250
µA
IOS
Short-circuit output current
–7 V ≤ VO ≤ 12 V
mA
DRIVER SWITCHING CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER(1)
TEST CONDITIONS
MIN
TYP
MAX
1.3
500
20
UNIT
µs
ns
ns
µs
ns
ns
ns
ns
ns
µs
µs
ns
ns
ns
ns
µs
µs
ns
ns
ns
ns
HVD3080E
0.7
150
12
0.9
200
7
tPLH
,
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
HVD3083E
HVD3086E
HVD3080E
HVD3083E
HVD3086E
HVD3080E
HVD3083E
HVD3086E
HVD3080E
HVD3083E
HVD3086E
HVD3080E
HVD3083E
HVD3086E
HVD3080E
HVD3083E
HVD3086E
HVD3080E
HVD3083E
HVD3086E
tPHL
0.5
1.5
300
15
RL = 54 Ω,
CL = 50 pF,
See Figure 4
tr,
tf
Differential output signal rise time
Differential output signal fall time
20
5
200
50
tsk(p)
tPZH
tPHZ
tPZL
tPLZ
Pulse skew (|tPHL– tPLH|)
1.4
2.5
1
5
7
Propagation delay time,
high-impedance-to-high-level output
2.5
30
RL = 110 Ω,
RE at 0 V,
See Figure 5
13
80
60
12
2.5
1
200
100
30
Propagation delay time,
high-level-to-high-impedance output
7
Propagation delay time, high-impedance-to-low-level
output
2.5
30
RL = 110 Ω,
RE at 0 V,
See Figure 6
13
80
60
12
200
100
30
Propagation delay time, low-level-to-high-impedance
output
tPZH
,
Propagation delay time, standby-to-high-level output (See Figure 5)
Propagation delay time, standby-to-low-level output (See Figure 6)
RL = 110 Ω, RE at 3 V
3.5
7
µs
tPZL
(1) SNHVD3080 and SNHVD3083 are in the Product Preview state of development.
4
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SN65HVD3083E
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SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
RECEIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN TYP(1)
MAX
UNIT
VIT+
VIT-
Positive-going differential input threshold voltage IO = –10 mA
-0.08
–0.01
V
Negative-going differential input threshold
voltage
IO = 10 mA
–0.2 -0.1
30
Vhys
VOH
Hysteresis voltage (VIT+ - VIT-
)
mV
V
VID = 200 mV, IOH = –10 mA,
See Figure 7 and Figure 8
High-level output voltage
4
4.6
VID = –200 mV, IOH = 10 mA,
See Figure 7 and Figure 8
VOL
IOZ
Low-level output voltage
0.15
0.4
V
High-impedance-state output current
VO = 0 or VCC
–1
1
0.11
0.13
µA
VA or VB = 12 V
0.04
0.06
VA or VB = 12 V, VCC = 0 V
VA or VB = -7 V
II
Bus input current
Other input at 0V
mA
–0.1 –0.04
–0.05 –0.03
VA or VB = -7 V, VCC = 0 V
VIH = 2 V
IIH
High-level input current
Low-level input current
Differential input capacitance
–60
-60
-30
-30
µA
µA
pF
IIL
VIL = 0.8 V
CID
VI = 0.4 sin (4E6πt) + 0.5 V
7
(1) All typical values are at 25°C and with a 3.3-V supply.
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
75
MAX UNIT
tPLH
tPHL
tsk(p)
tr
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Pulse skew (|tPHL– tPLH|)
100
100
79
VID = -1.5 V to 1.5 V,
CL = 15 pF, See Figure 8
4
10
3
ns
Output signal rise time
1.5
1.8
tf
Output signal fall time
3
DE at 5 V,
See Figure 9
5
1.6
5
50
3.5
50
ns
µs
ns
ns
µs
ns
tPZH
tPHZ
tPZL
tPLZ
Output disable time to high level
Output enable time from high level
Output disable time to low level
Output enable time from low level
DE at 5 V,
From standby
See Figure 9
DE at 5 V,
See Figure 9
DE at 0 V,
See Figure 9
10
1.7
8
50
DE at 5 V,
From standby
3.5
50
See Figure 9
DE at 5 V,
See Figure 9
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SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
PARAMETER MEASUREMENT INFORMATION
V
CC
RL
2
DE
I
O
O
Y
Z
D
V
OD
0 or 5 V
RL
2
I
V
V
I
OC
V
V
O
O
Figure 1. Driver VOD Test Circuit and Current Definitions
375 Ω ±1%
V
CC
DE
Y
D
V
OD
60 Ω ±1%
0 or 5 V
+
_
−7 V < V
< 12 V
(test)
Z
375 Ω ±1%
Figure 2. Driver VOD With Common-Mode Loading Test Circuit
V
CC
DE
27 Ω ± 1%
Y
V
Y
Z
Y
Z
D
Input
V
Z
27 Ω ± 1%
V
OC
50 pF ±20%
V
OC
V
OC(SS)
Input: PRR = 500 kHz, 50% Duty Cycle,
t < 6 ns, t < 6 ns, Z = 50 W
V
OC(PP)
r
f
O
C Includes Fixture and
L
Instrumentation Capacitance
Figure 3. Test Circuit and Definitions for the Driver Common-Mode Output Voltage
3 V
1.5 V
1.5 V
V
I
Y
Z
C
= 50 pF ±20%
R
= 54 W
L
L
±1%
V
V
OD(H)
OD(L)
90%
90%
V
I
W
0 V
10%
0 V
10%
V
OD
Generator: PRR = 500 kHz, 50% Duty Cycle,
t < 6 ns, t < 6 ns, Z = 50 W
r
f
O
Figure 4. Driver Switching Test Circuit and Voltage Waveforms
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SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
PARAMETER MEASUREMENT INFORMATION (continued)
Y
3 V
V
S1
O
D
3 V
1.5 V
1.5 V
Z
V
I
DE
0 V
0.5 V
R
= 110 W
t
L
PZH
C
= 50 pF
L
±1%
VOH
Input
Generator
±20%
50 W
V
I
V
2.5 V
O
» 0 V
t
Generator: PRR = 500 kHz,
50% Duty Cycle, t < 6 ns,
C
Includes Fixture and
PHZ
L
Instrumentation Capacitance
r
t < 6 ns, Z = 50 W
f
O
Figure 5. Driver High-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms
3 V
R
= 110 W
3 V
L
±1%
Y
Z
1.5 V
1.5 V
S1
D
V
V
0 V
I
O
t
0 V
5 V
PZL
DE
50 W
t
PLZ
C
= 50 pF
L
Input
V
V
O
±20%
0.5 V
Generator
I
2.5 V
V
OL
Generator: PRR = 500 kHz,
50% Duty Cycle, t < 6 ns,
C
Includes Fixture and
L
Instrumentation Capacitance
r
t < 6 ns, Z = 50 W
f
O
Figure 6. Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms
I
A
B
A
I
O
R
V
A
V
ID
V
IC
V
O
I
B
V
A
+ V
B
V
B
2
Figure 7. Receiver Voltage and Current Definitions
A
3 V
0 V
V
O
R
Input
1.5 V
1.5 V
V
I
V
I
50 Ω
Generator
B
1.5 V
C
= 15 pF
L
t
t
PHL
PLH
RE
±20%
V
OH
OL
90% 90%
1.5 V
10%
1.5 V
10%
V
Generator: PRR = 500 kHz,
50% Duty Cycle,t < 6 ns,
O
V
CL Includes Fixture and
r
t
t
f
Instrumentation Capacitance
r
t < 6 ns, Z = 50 W
f
O
Figure 8. Receiver Switching Test Circuit and Voltage Waveforms
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SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
PARAMETER MEASUREMENT INFORMATION (continued)
V
CC
A
B
0 or 2.5 V
2.5 or 0 V
C
D
3 V
V
1 kW ±1%
V
I
O
R
1.5 V
1.5 V
S1
0 V
V
C
= 15 pF
L
t
t
PHZ
PZH
RE
±20%
OH
A at 2.5 V
B at 0 V
S1 to D
V
- 0.5 V
OH
Input
Generator
1.5 V
V
V
V
O
50 W
I
» 0 V
» 5 V
CL Includes Fixture and
Instrumentation Capacitance
t
t
PZL
PLZ
A at 0 V
B at 2.5 V
S1 to C
1.5 V
O
V
+ 0.5 V
Generator: PRR = 500 kHz, 50% Duty Cycle,
t < 6 ns, t < 6 ns, Z = 50 W
OL
V
OL
r
f
O
Figure 9. Receiver Enable and Disable Test Circuit and Voltage Waveforms
0 V or 3 V
A
B
DE
Y
D
R
Z
100 W
1ꢀ
100 W
1ꢀ
RE
0 V or 3 V
Pulse Generator
15 ms duration
1ꢀ Duty Cycle
tr, tf £ 100 ns
+
+
-
-
A. This test is conducted to test survivability only. Data stability at the R output is not specified.
Figure 10. Transient Overvoltage Test Circuit
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SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
DEVICE INFORMATION
DRIVER(1)
FUNCTION TABLES
INPUT
Enable
OUTPUTS
D
H
DE
H
Y
H
L
Z
L
L
H
H
Z
L
X
L
Z
H
Open
H
(1) H = high level, L = low level, Z = high impedance, X = irrelevant, ?
= indeterminate
RECEIVER(1)
DIFFERENTIAL INPUTS
VID = V(A) - V(B)
ENABLE
RE
OUTPUT
R
VID ≤ –0.2 V
–0.2 V < VID < –0.01 V
–0.01 V ≤ VID
X
L
L
L
H
L
L
L
L
?
H
Z
H
H
H
Open Circuit
BUS Idle
Short Circuit
(1) H = high level, L = low level, Z = high impedance, X = irrelevant, ?
= indeterminate
DEVICE ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
RL = 60 Ω, Input to D a 500-kHz 50% duty
cycle square-wave
P(AVG)
Average power dissipation
85
109
136
mW
9
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SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
Equivalent Input and Output Schematic Diagrams
D and RE Input
DE Input
V
V
CC
CC
50 kW
500
500
9 V
Input
Input
50 kΩ
9 V
A Input
B Input
V
V
CC
CC
16 V
16 V
180 kW
36 kW
36 kW
180 kW
Input
Input
36 kW
16 V
16 V
36 kW
Y and Z Outputs
R Outputs
V
CC
V
CC
16 V
5 W
Output
Output
16 V
9 V
10
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SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
TYPICAL CHARACTERISTICS
HVD3080E
SUPPLY CURRENT
vs
INPUT BIAS CURRENT
vs
BUS INPUT VOLTAGE
SIGNALING RATE
10
80
60
No Load
= 5 V
V
CC
T = 25°C
A
50% Square wave input
40
Driver and Receiver
20
V
CC
= 0 V
1
V
CC
= 5 V
0
−20
−40
−60
Receiver Only
0.1
−8 −6 −4 −2
0
2
4
6
8
10 12
1
10
100
V − Bus Input Voltage − V
I
Signaling Rate − kbps
Figure 11.
Figure 12.
HVD3083E
SUPPLY CURRENT
vs
HVD3086E
SUPPLY CURRENT
vs
SIGNALING RATE
SIGNALING RATE
100
10
1
100
No Load
= 5 V
No Load
V = 5 V
CC
T = 25°C
A
V
CC
T = 25°C
A
50% Square wave input
50% Square wave input
10
Driver and Receiver
Driver and Receiver
1
Receiver Only
Receiver Only
0.1
1
0.1
0.001
10
100
1k
0.01
0.1
1
10
100
Signaling Rate − kbps
Signaling Rate − Mbps
Figure 13.
Figure 14.
11
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SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
TYPICAL CHARACTERISTICS (continued)
DIFFERENTIAL OUTPUT VOLTAGE
vs
DIFFERENTIAL OUTPUT CURRENT
RECEIVER OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
T
V
= 25°C
T
V
V
= 25°C
A
A
= 5 V
= 5 V
CC
CC
R
L
= 120 Ω
= 0.75 V
IC
R
L
= 60 Ω
0
10
20
30
40
50
−200−180−160−140−120−100 −80 −60 −40 −20
0
I
O
− Differential Output Current − mA
V
ID
− Differential Input Voltage − V
Figure 15.
Figure 16.
12
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SN65HVD3080E
SN65HVD3083E
SN65HVD3086E
www.ti.com
SLLS771B–NOVEMBER 2006–REVISED MARCH 2007
Changes from A Revision (December 2006) to B Revision .......................................................................................... Page
Changed VOH + 0.5 V to VOH - 0.5 V in Figure 9 .................................................................................................................. 8
•
13
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PACKAGE OPTION ADDENDUM
www.ti.com
29-Mar-2007
PACKAGING INFORMATION
Orderable Device
SN65HVD3080EDGS
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
MSOP
DGS
10
10
10
10
10
10
10
10
10
10
10
10
80 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SN65HVD3080EDGSG4
SN65HVD3080EDGSR
SN65HVD3080EDGSRG4
SN65HVD3083EDGS
MSOP
MSOP
MSOP
MSOP
MSOP
MSOP
MSOP
MSOP
MSOP
MSOP
MSOP
DGS
DGS
DGS
DGS
DGS
DGS
DGS
DGS
DGS
DGS
DGS
80 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
80 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SN65HVD3083EDGSG4
SN65HVD3083EDGSR
SN65HVD3083EDGSRG4
SN65HVD3086EDGS
80 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
80 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SN65HVD3086EDGSG4
SN65HVD3086EDGSR
SN65HVD3086EDGSRG4
80 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
29-Mar-2007
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
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