SN65LVDS047PWRG4 [TI]
LVDS QUAD DIFFERENTIAL LINE DRIVER; 四路LVDS差分线路驱动器
| 型号： | SN65LVDS047PWRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LVDS QUAD DIFFERENTIAL LINE DRIVER |
| 文件： | 总12页 (文件大小：223K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN65LVDS047
www.ti.com
SLLS416B–JUNE 2000–REVISED DECEMBER 2003
LVDS QUAD DIFFERENTIAL LINE DRIVER
The SN65LVDS047 is characterized for operation
from -40°C to 85°C.
FEATURES
•
•
•
•
•
•
•
>400 Mbps (200 MHz) Signaling Rates
Flow-Through Pinout Simplifies PCB Layout
300 ps Maximum Differential Skew
Propagation Delay Times 1.8 ns (Typical)
3.3 V Power Supply Design
D OR PW PACKAGE
(Marked as LVDS047)
(TOP VIEW)
EN
D
OUT1–
D
OUT1+
D
OUT2+
D
OUT2–
D
OUT3–
D
OUT3+
D
OUT4+
D
OUT4–
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D
D
±350 mV Differential Signaling
IN1
IN2
High Impedance on LVDS Outputs on Power
Down
V
CC
GND
•
•
Conforms to TIA/EIA-644 LVDS Standard
D
IN3
Industrial Operating Temperature Range
(-40°C to 85°C)
D
IN4
EN
•
Available in SOIC and TSSOP Packages
functional block diagram
DESCRIPTION
D
D
OUT1+
The SN65LVDS047 is a quad differential linedriver
that implements the electrical characteristics of
low-voltage differential signaling (LVDS). This
signaling technique lowers the output voltage levels
of 5-V differential standard levels (such as
EIA/TIA-422B) to reduce the power, increase the
switching speeds, and allow operation with a 3.3-V
supply rail. Any of the four current-mode drivers will
D1
D2
D3
D4
D
D
D
D
IN1
OUT1–
D
D
OUT2+
IN2
IN3
IN4
OUT2–
D
D
OUT3+
deliver
a
minimum differential output voltage
OUT3–
magnitude of 247 mV into a 100-Ω load when
enabled.
D
D
OUT4+
The intended application of this device and signaling
technique is for point-to-point and multi-drop
baseband data transmission over controlled
impedance media of approximately 100 Ω. The
transmission media may be printed-circuit board
traces, backplanes, or cables. The ultimate rate and
distance of data transfer is dependent upon the
attenuation characteristics of the media, the noise
coupling to the environment, and other system
characteristics.
OUT4–
EN
EN
TRUTH TABLE(1)
INPUT
ENABLES
OUTPUTS
DIN
L
EN
EN
DOUT+
DOUT-
L
H
Z
H
L
H
L or OPEN
H
X
All other conditions
Z
(1) H = high level, L = low level, X = irrelevant, Z = high impedance
(off)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2000–2003, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN65LVDS047
www.ti.com
SLLS416B–JUNE 2000–REVISED DECEMBER 2003
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
V
CC
V
CC
50 Ω
D
IN
or EN
Input
50 Ω
10 kΩ
Output
7 V
7 V
300 kΩ
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature (see (2) range (unless otherwise noted)
UNIT
-0.3 V to 4 V
(VCC
)
Supply voltage
VI(DIN
)
Input voltage range
-0.3 V to (VCC +0.3 V)
-0.3 V to (VCC +0.3 V)
-0.5 V to (VCC +0.5 V)
>10 kV
(EN, EN )
Enable input voltage
Output voltage
VO(DOUT+,DOUT-
)
(3)
(DOUT+,DOUT-
)
Bus-pin--electrostatic discharge, see
Short circuit duration
Storage temperature range
(DOUT+,(DOUT-
)
Continuous
-65°C to 150°C
260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
(3) Tested in accordance with MIL-STD-883C Method 3015.7.
DISSIPATION RATING TABLE
TA≤ 25°C
POWER RATING
OPERATING FACTOR(1)
ABOVE TA = 25°C
TA = 85°C
POWER RATING
PACKAGE
D
950 mW
774 mW
7.6 mW/°C
6.2 mW/°C
494 mW
402 mW
PW
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air
flow.
RECOMMENDED OPERATING CONDITIONS
MIN
3
NOM
3.3
MAX UNIT
VCC
TA
Supply voltage
3.6
85
V
Operating free-air temperature
-40
25
°C
2
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SN65LVDS047
www.ti.com
SLLS416B–JUNE 2000–REVISED DECEMBER 2003
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (see (1) and (2)) (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP(3)
MAX
UNIT
VOD
Differential output voltage
250
310
450
mV
Change in magnitude of VOD for
complementary output states
n|VOD
|
1
35
|mV|
V
Steady-state, common-mode output
voltage
VOC(SS)
1.125
1.17
1.375
RL = 100 Ω, see Figure 1
Change in steady-state
common-mode output voltage
between logic states
nVOC(SS)
1
25
|mV|
VOH
VOL
VIH
VIL
IIH
Output high voltage
Output low voltage
Input high voltage
Input low voltage
Input high current
Input low current
Input clamp voltage
1.33
1.02
1.6
V
V
0.90
2
VCC
0.8
10
V
GND
-10
V
VIN = VCC or 2.5 V
VIN = GND or 0.4 V
ICL = -18 mA
3
1
µA
µA
V
IIL
-10
10
VIK
-1.5
-0.8
Enabled, DIN = VCC, DOUT+ = 0
V or DIN = GND, DOUT- = 0 V
(4)
IOS
Output short circuit current, see
-3.1
-9
-9
1
mA
mA
µA
Differential output short circuit
IOSD
IOFF
IOZ
Enabled, VOD = 0 V
(4)
current, see
VO = 0 V or 3.6 V, VCC = 0 V or
Open
Power-off leakage
-1
-1
EN = 0.8 V and EN = 2 V, VO
0 V or VCC
=
Output 3-state current
1
µA
No load supply current, drivers
enabled
ICC
DIN = VCC or GND
7
20
mA
mA
mA
Loaded supply current, drivers
enabled
RL = 100 Ω all channels, DIN =
VCC or GND (all inputs)
ICCL
ICC(Z)
26
No load supply current, drivers
disabled
DIN = VCC or GND, EN = GND,
EN = VCC
0.5
1.3
(1) Current into device pin is defined as positive. Current out of the device is defined as negative. All voltages are referenced to ground,
unless otherwise specified.
(2) The SN65LVDS047 is a current mode device and only functions within data sheet specifications when a resistive load is applied to the
driver outputs, 90 Ω to 110 Ω typical range.
(3) All typical values are given for: VCC = 3.3 V, TA = 25°C.
(4) Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
3
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SN65LVDS047
www.ti.com
SLLS416B–JUNE 2000–REVISED DECEMBER 2003
SWITCHING CHARACTERISTICS
over recommended operating conditions (see
(1)
,
(2) and (3) )(unless otherwise noted)
TYP(
PARAMETER
TEST CONDITIONS
MIN
MAX
2.8
UNIT
ns
4)
tPHL
tPLH
tSK(p)
tSK(o)
tSK(pp)
tSK(lim)
tr
Differential propagation delay, high-to-low
1.4
1.4
1.8
1.8
50
Differential propagation delay, low-to-high
2.8
300
300
1
ns
ps
(5)
Differential pulse skew (tPHLD - tPLHD), see
(6)
Channel-to-channel skew, see
40
ps
RL = 100 Ω,, CL = 15 pF,
see Figure 2 and Figure 3
(7)
Differential part-to-part skew, see
ns
(8)
Differential part-to-part skew, see
1.2
1.5
1.5
8
ns
Rise time
0.5
0.5
5.5
5.5
8.5
8.5
250
ns
tf
Fall time
ns
tPHZ
tPLZ
tPZH
tPZL
f(MAX)
Disable time high to Z
Disable time low to Z
Enable time Z to high
Enable time Z to low
ns
8
ns
RL = 100 Ω,, CL = 15 pF,
see Figure 4 and Figure 5
12
12
ns
ns
(9)
Maximum operating frequency, see
MHz
(1) Generator waveform for all tests unless otherwise: f = 1 MHz, Zo = 50 Ω, tr < 1 ns, and tf < 1 ns.
(2) CL includes probe and jig capacitance.
(3) All input voltages are for one channel unless otherwise specified. Other inputs are set to GND.
(4) All typical values are given for: VCC = 3.3 V, TA = 25°C.
(5) tSK(p)|tPHL-tPLH| is the magnitude difference in differential propagation delay time between the positive going edge andthe negative going
edge of the same channel.
(6) tSK(o) is the differential channel-to-channel skew of any event on the same device.
(7) tSK(pp) is the differential part-to-part skew, and is defined as the difference between the minimum and the maximum specified differential
propagation delays. This specification applies to devices at the same VCC and within 5°C of each other within the operating temperature
range.
(8) tSK(lim) part-to-part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices
over recommended operating temperature and voltage ranges, and across process distribution. tSK(lim) is defined as|Min - Max|
differential propagation delay.
(9) f(MAX) generator input conditions: tr = tf < 1 ns (0% to 100%), 50% duty cycle, 0 V to 3 V. Output criteria: duty cycle = 45% to55,VOD
250 mV, all channels switching
>
4
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SN65LVDS047
www.ti.com
SLLS416B–JUNE 2000–REVISED DECEMBER 2003
PARAMETER MEASUREMENT INFORMATION
D
OUT+
R /2
L
V
CC
D
IN
V
OC
V
OD
D
GND
S1
R /2
L
Driver Enable
D
OUT–
Figure 1. Driver VOD and VOC Test Circuit
C
L
D
D
OUT+
D
IN
R
L
Generator
D
50 Ω
OUT–
Driver Enable
C
L
Figure 2. Driver Propagation Delay and Transition Time Test Circuit
3 V
1.5 V
1.5 V
D
IN
0 V
V
t
t
PHL
PLH
D
D
OH
OUT–
0 V (Differential)
0 V
V
OL
OUT+
80%
0 V
80%
0 V
V
(DIFF)
20%
20%
V
(DIFF)
= D + – D –
OUT OUT
t
r
t
f
Figure 3. Driver Propagation Delay and Transition Time Waveforms
5
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SN65LVDS047
www.ti.com
SLLS416B–JUNE 2000–REVISED DECEMBER 2003
PARAMETER MEASUREMENT INFORMATION (continued)
C
L
D
OUT+
OUT–
50 Ω
50 Ω
V
D
IN
CC
D
GND
1.2 V
D
EN
EN
Generator
C
L
50 Ω
1/4 65LVDS047
Figure 4. Driver 3-State Delay Test Circuit
3 V
1.5 V
1.5 V
1.5 V
EN When EN = GND or Open
0 V
3 V
EN When EN = V
CC
1.5 V
0 V
t
t
PZH
PHZ
V
OH
D
When D = V
IN CC
– When D = GND
IN
OUT+
50%
50%
50%
D
OUT
1.2 V
1.2 V
D
OUT+
When D = GND
IN
When D = V
IN CC
50%
D
OUT–
V
OL
t
t
PZL
PLZ
Figure 5. Driver 3-State Delay Waveform
6
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SN65LVDS047
www.ti.com
SLLS416B–JUNE 2000–REVISED DECEMBER 2003
TYPICAL CHARACTERISTICS
OUTPUT HIGH VOLTAGE
OUTPUT LOW VOLTAGE
vs
POWER SUPPLY VOLTAGE
vs
POWER SUPPLY VOLTAGE
1.36
1.35
1.34
1.33
1.32
1.31
1.061
T
= 25°C
A
T
= 25°C
A
Load = 100 Ω
Load = 100 Ω
1.056
1.051
1.046
1.041
1.30
3
1.036
3.3
3.6
3
3.3
3.6
V
CC
− Power Supply Voltage − V
V
CC
− Power Supply Voltage − V
Figure 6.
Figure 7.
OUTPUT SHORT CIRCUIT CURRENT
DIFFERENTIAL OUTPUT VOLTAGE
vs
vs
POWER SUPPLY VOLTAGE
POWER SUPPLY VOLTAGE
−3.30
350
330
310
290
270
250
T
A
= 25°C
T
= 25°C
A
Load = 100 Ω
V = V or GND,
V
I
CC
= 0 V
−3.25
−3.20
O
−3.15
−3.10
−3.05
−3.00
3
3.3
3.6
3
3.3
3.6
V
CC
− Power Supply Voltage − V
V
CC
− Power Supply Voltage − V
Figure 8.
Figure 9.
7
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SN65LVDS047
www.ti.com
SLLS416B–JUNE 2000–REVISED DECEMBER 2003
TYPICAL CHARACTERISTICS (continued)
COMMON-MODE OUTPUT VOLTAGE
POWER SUPPLY CURRENT
vs
vs
POWER SUPPLY VOLTAGE
FREQUENCY
60
50
40
30
20
10
1.20
1.18
1.16
1.14
1.12
1.10
T
= 25°C
A
T
= 25°C
A
Load = 100 Ω
V = 0 V to 3 V
I
Load = 100 Ω
C
= 15 pF,
= 3. 3 V
L
V
C
C
All Switching
0
0.01
0.1
10
100
1000
3
3.3
3.6
1
f − Frequency − MHz
V
CC
− Power Supply Voltage − V
Figure 10.
Figure 11.
8
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PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
SN65LVDS047D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65LVDS047DG4
SN65LVDS047DR
SN65LVDS047DRG4
SN65LVDS047PW
SN65LVDS047PWG4
SN65LVDS047PWR
SN65LVDS047PWRG4
SOIC
SOIC
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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