SN65LVDS047 [TI]
LVDS QUAD DIFFERENTIAL LINE DRIVER; 四路LVDS差分线路驱动器
| 型号： | SN65LVDS047 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LVDS QUAD DIFFERENTIAL LINE DRIVER |
| 文件： | 总11页 (文件大小：228K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁꢂ ꢃꢄꢅ ꢆꢀ ꢇꢈ ꢉ
ꢄꢅꢆꢀ ꢊ ꢋꢌꢆ ꢆꢍ ꢎꢎ ꢏꢐ ꢏꢁꢑ ꢍꢌ ꢄ ꢄ ꢍꢁꢏ ꢆ ꢐꢍ ꢅ ꢏꢐ
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
D OR PW PACKAGE
(Marked as LVDS047)
(TOP VIEW)
D
D
>400 Mbps (200 MHz) Signaling Rates
Flow-Through Pinout Simplifies PCB
Layout
EN
D
D
D
D
D
D
D
D
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D
D
D
D
D
300 ps Maximum Differential Skew
Propagation Delay Times 1.8 ns (Typical)
3.3 V Power Supply Design
OUT1−
OUT1+
OUT2+
OUT2−
OUT3−
OUT3+
OUT4+
OUT4−
D
D
IN1
IN2
V
CC
350 mV Differential Signaling
GND
High Impedance on LVDS Outputs on
Power Down
D
D
IN3
IN4
EN
D
Conforms to TIA/EIA-644 LVDS Standard
D
Industrial Operating Temperature Range
(−40°C to 85°C)
functional block diagram
D
Available in SOIC and TSSOP Packages
D
OUT1+
D1
D2
D3
D4
D
D
D
D
IN1
IN2
IN3
IN4
D
OUT1−
description
The SN65LVDS047 is a quad differential line
D
OUT2+
OUT2−
driver that implements the electrical characteris-
tics of low-voltage differential signaling (LVDS).
This signaling technique lowers the output voltage
levels of 5-V differential standard levels (such as
EIA/TIA-422B) to reduce the power, increase the
switching speeds, and allow operation with a
3.3-V supply rail. Any of the four current-mode
drivers will deliver a minimum differential output
voltage magnitude of 247 mV into a 100-Ω load
when enabled.
D
D
OUT3+
D
OUT3−
D
D
OUT4+
OUT4−
EN
EN
The intended application of this device and
signaling technique is for point-to-point and multi-
drop baseband data transmission over controlled
impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces,
backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation
characteristics of the media, the noise coupling to the environment, and other system characteristics.
The SN65LVDS047 is characterized for operation from −40°C to 85°C.
TRUTH TABLE
INPUT
ENABLES
OUTPUTS
D
EN
EN
D
D
OUT−
IN
OUT+
L
H
X
L
H
H
L or OPEN
H
Z
L
Z
All other conditions
H = high level, L = low level, X = irrelevant,
Z = high impedance (off)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2001 − 2003, Texas Instruments Incorporated
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1
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ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢀꢇ ꢈ ꢉ
ꢄꢅ ꢆ ꢀ ꢊꢋ ꢌ ꢆ ꢆ ꢍ ꢎ ꢎꢏ ꢐꢏ ꢁꢑ ꢍ ꢌꢄ ꢄꢍ ꢁ ꢏ ꢆꢐ ꢍ ꢅ ꢏꢐ
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
equivalent input and output schematic diagrams
V
CC
V
CC
50 Ω
D
or EN
Input
IN
50 Ω
10 kΩ
Output
7 V
7 V
300 kΩ
absolute maximum ratings over operating free-air temperature (see Note 1) (unless otherwise
†
noted)
Supply voltage (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 4 V
CC
Input voltage range, V (D ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to (V
+0.3 V)
+0.3 V)
I
IN
CC
CC
Enable input voltage (EN, EN ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to (V
Output voltage, V (D
D ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to (Vcc + 0.5 V)
O
OUT+, OUT−
Bus-pin (D
D
) electrostatic discharge, (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >10 kV
OUT+, OUT−
Short circuit duration (D
(D
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
OUT+, OUT−
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
2. Tested in accordance with MIL-STD-883C Method 3015.7.
DISSIPATION RATING TABLE
‡
T
A
≤ 25°C
OPERATING FACTOR
T = 85°C
A
POWER RATING
PACKAGE
POWER RATING
ABOVE T = 25°C
A
D
950 mW
7.6 mW/°C
6.2 mW/°C
494 mW
PW
774 mW
402 mW
‡
This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with
no air flow.
recommended operating conditions
MIN NOM
MAX
3.6
UNIT
V
Supply voltage, V
CC
3
3.3
25
Operating free-air temperature, T
−40
85
°C
A
2
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ꢀꢁꢂ ꢃꢄꢅ ꢆꢀ ꢇꢈ ꢉ
ꢄꢅꢆꢀ ꢊ ꢋꢌꢆ ꢆꢍ ꢎꢎ ꢏꢐ ꢏꢁꢑ ꢍꢌ ꢄ ꢄ ꢍꢁ ꢏ ꢆ ꢐꢍ ꢅ ꢏꢐ
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
electrical characteristics over recommended operating free-air temperature range (see Notes 3, 4)
(unless otherwise noted)
†
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
V
Differential output voltage
Change in magnitude of V
250
310
1
450
mV
OD
for
OD
n|V
|
35
|mV|
V
OD
complementary output states
Steady-state, common-mode output
voltage
V
1.125
1.17 1.375
OC(SS)
R
= 100 Ω (see Figure 1)
L
Change in steady-state common-mode
output voltage between logic states
nV
OC(SS)
1
25
|mV|
V
V
V
V
Output high voltage
Output low voltage
Input high voltage
Input low voltage
Input high current
Input low current
Input clamp voltage
1.33
1.02
1.6
V
V
OH
0.90
2
OL
IH
IL
V
V
CC
0.8
GND
−10
−10
−1.5
V
I
IH
I
IL
V
V
= V
CC
or 2.5 V
3
1
10
10
µA
µA
V
IN
= GND or 0.4 V
= −18 mA
IN
V
IK
I
−0.8
CL
Enabled,
I
Output short circuit current (see Note 5)
D
D
= V
CC
,
D
D
= 0 V or
= 0 V
−3.1
−9
mA
OS
IN
IN
OUT+
OUT−
= GND,
Differential output short circuit current
(see Note 5)
I
I
I
I
I
I
Enabled, V
OD
= 0 V
−9
1
mA
µA
OSD
OFF
OZ
Power-off leakage
V
= 0 V or 3.6 V,
V
= 0 V or Open
−1
−1
O
CC
EN = 0.8 V and EN = 2 V,
= 0 V or V
Output 3-state current
1
µA
V
O
CC
or GND
No load supply current, drivers enabled
Loaded supply current, drivers enabled
No load supply current, drivers disabled
D
= V
IN CC
7
20
mA
mA
mA
CC
R
D
= 100 Ω all channels,
L
26
CCL
= V
or GND (all inputs)
IN
CC
D
= V
or GND, EN = GND, EN = V
CC
0.5
1.3
CC(Z)
IN
CC
†
All typical values are given for: V
CC
= 3.3 V, T = 25°C.
A
NOTES: 3. Current into device pin is defined as positive. Current out of the device is defined as negative. All voltages are referenced to ground,
unless otherwise specified.
4. The SN65LVDS047 is a current mode device and only functions within data sheet specifications when a resistive load is applied
to the driver outputs, 90 Ω to 110 Ω typical range.
5. Output short circuit current (I ) is specified as magnitude only, minus sign indicates direction only.
OS
3
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ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢀꢇ ꢈ ꢉ
ꢄꢅ ꢆ ꢀ ꢊꢋ ꢌ ꢆ ꢆ ꢍ ꢎ ꢎꢏ ꢐꢏ ꢁꢑ ꢍ ꢌꢄ ꢄꢍ ꢁ ꢏ ꢆꢐ ꢍ ꢅ ꢏꢐ
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
switching characteristics over recommended operating conditions (see Notes 6, 7, and 12) (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
2.8
2.8
300
300
1
UNIT
ns
t
t
t
t
t
t
t
t
t
Differential propagation delay, high-to-low
Differential propagation delay, low-to-high
1.4
1.4
1.8
1.8
50
PHL
PLH
SK(p)
SK(o)
SK(pp)
SK(lim)
r
ns
Differential pulse skew (t
t
) (see Note 8)
ps
PHLD − PLHD
R
= 100 Ω,, C = 15 pF
L
(see Figures 2 and 3)
L
Channel-to−channel skew (see Note 9)
40
ps
Differential part-to-part skew (see Note 10)
Differential part-to-part skew (see Note 11)
Rise time
ns
1.2
1.5
1.5
8
ns
0.5
0.5
5.5
ns
Fall time
ns
f
Disable time high to Z
ns
PHZ
t
t
t
Disable time low to Z
Enable time Z to high
Enable time Z to low
5.5
8.5
8.5
8
12
12
ns
ns
ns
PLZ
PZH
PZL
R = 100 Ω,, C = 15 pF
L L
(see Figures 4 and 5)
f
Maximum operating frequency (see Note 13)
250
MHz
(MAX)
†
All typical values are given for: V
CC
= 3.3 V, T = 25°C.
A
NOTES: 6. Generator waveform for all tests unless otherwise: f = 1 MHz, Z = 50 Ω, t < 1 ns, and t < 1 ns.
o
r
f
7.
8.
C includes probe and jig capacitance.
L
t
|t | is the magnitude difference in differential propagation delay time between the positive going edge and
−t
SK(p) PHL PLH
the negative going edge of the same channel.
9.
10.
t
is the differential channel-to-channel skew of any event on the same device.
SK(o)
t
is the differential part-to-part skew, and is defined as the difference between the minimum and the maximum specified
SK(pp)
differential propagation delays. This specification applies to devices at the same V
operating temperature range.
and within 5°C of each other within the
CC
11.
t
part-to-part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to
SK(lim)
devices over recommended operating temperature and voltage ranges, and across process distribution. t
|Min − Max| differential propagation delay.
is defined as
SK(lim)
12. All input voltages are for one channel unless otherwise specified. Other inputs are set to GND.
13.
f
V
generator input conditions: t = t < 1 ns (0% to 100%), 50% duty cycle, 0 V to 3 V. Output criteria: duty cycle = 45% to 55,
> 250 mV, all channels switching
(MAX)
OD
r
f
4
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ꢀꢁꢂ ꢃꢄꢅ ꢆꢀ ꢇꢈ ꢉ
ꢄꢅꢆꢀ ꢊ ꢋꢌꢆ ꢆꢍ ꢎꢎ ꢏꢐ ꢏꢁꢑ ꢍꢌ ꢄ ꢄ ꢍꢁ ꢏ ꢆ ꢐꢍ ꢅ ꢏꢐ
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
PARAMETER MEASUREMENT INFORMATION
D
OUT+
R /2
L
V
CC
D
IN
V
OC
V
OD
D
GND
S1
R /2
L
Driver Enable
D
OUT−
Figure 1. Driver V
and V
Test Circuit
OD
OC
C
L
D
OUT+
OUT−
D
IN
R
Generator
D
L
50 Ω
D
Driver Enable
C
L
Figure 2. Driver Propagation Delay and Transition Time Test Circuit
3 V
1.5 V
1.5 V
D
IN
0 V
V
t
t
PHL
PLH
D
D
OH
OUT−
0 V (Differential)
0 V
V
OL
OUT+
80%
0 V
80%
0 V
V
(DIFF)
20%
20%
V
= D + − D −
OUT OUT
(DIFF)
t
t
f
r
Figure 3. Driver Propagation Delay and Transition Time Waveforms
5
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ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢀꢇ ꢈ ꢉ
ꢄꢅ ꢆ ꢀ ꢊꢋ ꢌ ꢆ ꢆ ꢍ ꢎ ꢎꢏ ꢐꢏ ꢁꢑ ꢍ ꢌꢄ ꢄꢍ ꢁ ꢏ ꢆꢐ ꢍ ꢅ ꢏꢐ
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
PARAMETER MEASUREMENT INFORMATION
C
L
D
D
OUT+
50 Ω
50 Ω
V
D
CC
IN
D
GND
1.2 V
OUT−
EN
EN
Generator
C
L
50 Ω
1/4 65LVDS047
Figure 4. Driver 3-State Delay Test Circuit
3 V
1.5 V
1.5 V
1.5 V
EN When EN = GND or Open
0 V
3 V
EN When EN = V
CC
1.5 V
0 V
t
t
PZH
PHZ
V
OH
D
When D = V
IN CC
OUT+
50%
50%
D
− When D = GND
OUT
IN
1.2 V
1.2 V
D
D
When D = GND
OUT+
IN
50%
50%
When D = V
IN CC
OUT−
V
OL
t
t
PZL
PLZ
Figure 5. Driver 3-State Delay Waveform
6
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ꢀꢁꢂ ꢃꢄꢅ ꢆꢀ ꢇꢈ ꢉ
ꢄꢅꢆꢀ ꢊ ꢋꢌꢆ ꢆꢍ ꢎꢎ ꢏꢐ ꢏꢁꢑ ꢍꢌ ꢄ ꢄ ꢍꢁ ꢏ ꢆ ꢐꢍ ꢅ ꢏꢐ
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
TYPICAL CHARACTERISTICS
OUTPUT HIGH VOLTAGE
OUTPUT LOW VOLTAGE
vs
vs
POWER SUPPLY VOLTAGE
POWER SUPPLY VOLTAGE
1.36
1.35
1.34
1.33
1.32
1.31
1.30
1.061
1.056
1.051
1.046
1.041
1.036
T
= 25°C
A
T
= 25°C
A
Load = 100 Ω
Load = 100 Ω
3
3.3
3.6
3
3.3
3.6
V
CC
− Power Supply Voltage − V
V
CC
− Power Supply Voltage − V
Figure 6
Figure 7
OUTPUT SHORT CIRCUIT CURRENT
DIFFERENTIAL OUTPUT VOLTAGE
vs
vs
POWER SUPPLY VOLTAGE
POWER SUPPLY VOLTAGE
−3.30
−3.25
−3.20
350
330
310
290
270
250
T
= 25°C
T = 25°C
A
Load = 100 Ω
A
I
O
V = V
V
or GND,
CC
= 0 V
−3.15
−3.10
−3.05
−3.00
3
3.3
3.6
3
3.3
3.6
V
CC
− Power Supply Voltage − V
V
CC
− Power Supply Voltage − V
Figure 8
Figure 9
7
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ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢀꢇ ꢈ ꢉ
ꢄꢅ ꢆ ꢀ ꢊꢋ ꢌ ꢆ ꢆ ꢍ ꢎ ꢎꢏ ꢐꢏ ꢁꢑ ꢍ ꢌꢄ ꢄꢍ ꢁ ꢏ ꢆꢐ ꢍ ꢅ ꢏꢐ
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
TYPICAL CHARACTERISTICS
COMMON-MODE OUTPUT VOLTAGE
vs
POWER SUPPLY VOLTAGE
POWER SUPPLY CURRENT
vs
FREQUENCY
1.20
1.18
1.16
1.14
1.12
1.10
60
50
40
30
20
10
T
= 25°C
T
= 25°C
A
A
Load = 100 Ω
Load = 100 Ω
ꢀ ꢂ ꢃ ꢀ ꢄ ꢅ ꢆ ꢀ
ꢁ
ꢇ
ꢀ
ꢂ ꢉ ꢊ ꢋꢌꢍ
ꢂ ꢆ ꢎ ꢆ ꢀ
ꢈ
ꢇ ꢇ
All Switching
0
0.01
3
3.3
3.6
0.1
10
100
1000
1
V
CC
− Power Supply Voltage − V
f − Frequency − MHz
Figure 10
Figure 11
8
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MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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