SN65LVDS22DRG4 [TI]
DUAL MULTIPLEXED LVDS REPEATERS; 双复用LVDS转发型号: | SN65LVDS22DRG4 |
厂家: | TEXAS INSTRUMENTS |
描述: | DUAL MULTIPLEXED LVDS REPEATERS |
文件: | 总14页 (文件大小:205K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN65LVDS22
SN65LVDM22
www.ti.com
SLLS315C–DECEMBER 1998–REVISED JUNE 2002
DUAL MULTIPLEXED LVDS REPEATERS
FEATURES
SN65LVDS22D and SN65LVDS22PW (Marked as LVDS22)
SN65LVDM22D and SN65LVDM22PW (Marked as LVDM22)
(TOP VIEW)
•
Meets or Exceeds the Requirements of ANSI
TIA/EIA-644-1995 Standard
1B
1A
S0
VCC
VCC
1Y
1
2
3
4
5
6
7
8
16
15
14
13
12
11
•
Designed for Clock Rates up to 200 MHz
(400 Mbps)
•
•
Designed for Data Rates up to 250 Mbps
1DE
S1
1Z
2DE
2Z
Pin Compatible With SN65LVDS122 and
SN65LVDT122, 1.5 Gbps 2x2 Crosspoint
Switch From TI
2A
2B
GND
10 2Y
GND
9
•
•
•
ESD Protection Exceeds 12 kV on Bus Pins
Operates From a Single 3.3-V Supply
Low-Voltage Differential Signaling With
Output Voltages of 350 mV Into:
logic diagram (positive logic)
– 100-Ω Load (SN65LVDS22)
2
+
_
1A
1B
– 50-Ω Load (SN65LVDM22)
14
13
0
1
1
1Y
1Z
•
•
•
Propagation Delay Time; 4 ns Typ
Power Dissipation at 400 Mbps of 150 mW
4
Bus Pins Are High Impedance When Disabled
or With VCC Less Than 1.5 V
1DE
2DE
S0
12
3
•
•
LVTTL Levels Are 5 V Tolerant
Open-Circuit Fail Safe Receiver
5
S1
DESCRIPTION
10
11
0
1
The SN65LVDS22 and SN65LVDM22 are differential
line drivers and receivers that use low-voltage
differential signaling (LVDS) to achieve signaling
rates as high as 400 Mbps. The receiver outputs can
be switched to either or both drivers through the
multiplexer control signals S0 and S1. This allows the
flexibility to perform splitter or signal routing functions
with a single device.
2Y
2Z
6
7
+
_
2A
2B
MUX TRUTH TABLE
OUTPUT
INPUT
FUNCTION
S1
S0
1Y/1Z
1A/1B
2A/2B
1A/1B
2A/2B
2Y/2Z
1A/1B
2A/2B
2A/2B
1A/1B
The TIA/EIA-644 standard compliant electrical
interface provides a minimum differential output
voltage magnitude of 247 mV into a 100-Ω load and
receipt of 100 mV signals with up to 1 V of ground
Splitter
Splitter
Router
Router
0
0
1
1
0
1
0
1
potential difference between
a
transmitter and
receiver. The SN65LVDM22 doubles the output drive
current to achieve LVDS levels with a 50-Ω load.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2002, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN65LVDS22
SN65LVDM22
www.ti.com
SLLS315C–DECEMBER 1998–REVISED JUNE 2002
The intended application of these devices and signaling technique is for both point-to-point baseband (single
termination) and multipoint (double termination) data transmissions over controlled impedance media. The
transmission media may be printed-circuit board traces, backplanes, or cables. (Note: The ultimate rate and
distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the
environment, and other application specific characteristics).
The SN65LVDS22 and SN65LVDM22 are characterized for operation from –40°C to 85°C.
2
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SN65LVDS22
SN65LVDM22
www.ti.com
SLLS315C–DECEMBER 1998–REVISED JUNE 2002
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
V
CC
V
CC
300 kΩ
50 Ω
S0, S1
Input
50 Ω
1DE, 2DE
Input
7 V
300 kΩ
7 V
V
CC
V
CC
300 kΩ
300 kΩ
5 Ω
Y or Z
10 kΩ
Output
A Input
B Input
7 V
7 V
7 V
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
UNIT
(2)
Supply voltage range, VCC (see Note
)
–0.5 V to 4 V
–0.5 V to 6 V
–0.5 V to 4 V
(DE, S0, S1)
Voltage range
(Y, Z, A, and B)
(3)
A, B, Y, Z and GND (see Note
All pins
)
Class 3, A:12 kV, B:600 V
Class 3, A:5 kV, B:500 V
See Dissipation Rating Table
–65°C to 150°C
Electrostatic discharge
Continuous power dissipation
Storage temperature range
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
(3) Tested in accordance with MIL-STD-883C Method 3015.7.
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SN65LVDS22
SN65LVDM22
www.ti.com
SLLS315C–DECEMBER 1998–REVISED JUNE 2002
DISSIPATION RATING TABLE
T
A ≤ 25°C
DERATING FACTOR(1)
ABOVE TA = 25°C
TA = 85°C
POWER RATING
PACKAGE
POWER RATING
D
1110 mW
8.9 mW/°C
577 mW
437 mW
PW
839 mW
6.7 mW/°C
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air
flow.
RECOMMENDED OPERATING CONDITIONS
MIN
3
NOM
MAX UNIT
VCC
VIH
VIL
Supply voltage
3.3
3.6
V
V
V
V
High-level input voltage S0, S1, 1DE, 2DE
2
Low-level input voltage
S0, S1, 1DE, 2DE
0.8
0.6
|VID
VIC
TA
|
Magnitude of differential input voltage
Common-mode input voltage (see Figure 1)
Operating free-air temperature
0.1
Ť Ť
V
Ť
IDŤ
V
V
ID
2.4–
2
2
VCC–0.8
85
V
40
°C
TIMING REQUIREMENTS
PARAMETER
MIN NOM MAX UNIT
tsu
Input to select setup time
Input to select hold time
Select to switch output
1.6
1
ns
ns
ns
th
See Figure 6
tswitch
3.2
5
COMMON-MODE INPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
2.5
MAX at V > 3.15 V
CC
MAX at V = 3 V
CC
2
1.5
1
0.5
0
Min
0
0.1
V
0.2
0.3
0.4
0.5
0.6
– Differential Input Voltage – V
ID
Figure 1. Common-Mode Input Voltage vs Differential Input Voltage
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SN65LVDS22
SN65LVDM22
www.ti.com
SLLS315C–DECEMBER 1998–REVISED JUNE 2002
RECEIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
VIT+ Positive-going differential input voltage threshold
VIT– Negative-going differential input voltage threshold
100
mV
mV
100
2
VI = 0 V
20
II
Input current (A or B inputs)
µA
µA
VI = 2.4 V
1.2
II(OFF
Power-off input current (A or B inputs)
VCC = 0 V
20
)
RECEIVER/DRIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP(1) MAX UNIT
VOD
Differential output voltage magnitude
247
340 454
mV
See Figure 2
Change in differential output voltage magnitude
between logic states
∆VOD
–50
50
mV
RL = 100 Ω ('LVDS22),
RL = 50 Ω ('LVDM22)
1.37
5
VOC(SS)
Steady-state common-mode output voltage
1.125
–50
V
Change in steady-state common-mode output
voltage between logic states
See Figure 3
∆VOC(SS)
3
50
mV
mV
VOC(PP)
Peak-to-peak common-mode output voltage
150
12
No Load
8
13
21
3
RL = 100 Ω ('LVDS22)
RL = 50 Ω ('LVDM22)
Disabled
20
ICC
Supply current
mA
27
6
DE
High-level input current
S0, S1
–10
20
IIH
VIH = 5 V
µA
µA
DE
Low-level input current
S0, S1
–10
10
IIL
VIL = 0.8 V
–10
–10
–10
–10
±1
VOY or VOZ = 0 V, VOD = 0 V ('LVDS22)
VOY or VOZ = 0 V, VOD = 0 V ('LVDM22)
IOS
Short-circuit output current
mA
µA
VOD = 600 mV
0.015
0.015
0.015
3
IOZ
High-impedance output current
VO = 0 V or VCC
±1
IO(OFF)
CIN
Power-off output current
Input capacitance
VCC = 0 V,
VO = 3.6 V
±1
µA
pF
(1) All typical values are at 25°C and with a 3.3-V supply.
5
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SN65LVDS22
SN65LVDM22
www.ti.com
SLLS315C–DECEMBER 1998–REVISED JUNE 2002
DIFFERENTIAL RECEIVER TO DRIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP(1)
MAX UNIT
tPLH
Differential propagation delay time, low-to-high
Differential propagation delay time, high-to-low
Pulse skew (|tPHL - tPLH|)
4
4
6
6
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tPHL
tsk(p)
0.2
1
tr
Transition time, low-to-high
Transition time, low-to-high
Transition time, high-to-low
Transition time, high-to-low
SN65LVDS22
SN65LVDM22
SN65LVDS22
SN65LVDM22
CL = 10 pF, See Figure 4
1.5
1.3
1.5
1.3
10
tr
0.8
1
tf
tf
0.8
4
tPHZ
Propagation delay time, high-level-to-high-impedance output
Propagation delay time, low-level-to-high-impedance output
Propagation delay time, high-impedance-to-high-level output
Propagation delay time, high-impedance-to-low-level output
tPLZ
5
10
See Figure 5
tPZH
5
10
tPZL
6
10
tPHL_R1_Dx
tPLH_R1_Dx
tPHL_R2_Dx
tPLH_R2_Dx
fmax
0.2
0.2
0.2
0.2
200
Channel-to-channel skew, receiver to driver(2)
Maximum operating frequency
ns
All channels switching
MHz
(1) All typical values are at 25°C and with a 3.3-V supply.
(2) These parametric values are measured over supply voltage and temperature ranges recommended for the device.
PARAMETER MEASUREMENT INFORMATION
DE
Y
Z
A
B
Pulse
Generator
V
OD
R (see Note B)
L
Input
(see Note A)
C
L
= 10 pF
(2 Places)
(see Note C)
V
V
1.4 V
1 V
I(B)
100%
80%
V
OD
I(A)
0
20%
0%
t
f
t
r
A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate
(PRR) = 50 Mpps, pulse width = 10 ±0.2 ns.
B. RL = 100 Ω or 50 Ω ±1%
C. CL includes instrumentation and fixture capacitance within 6 mm of the D.U.T.
Figure 2. Test Circuit and Voltage Definitions for the Differential Output Signal
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SN65LVDS22
SN65LVDM22
www.ti.com
SLLS315C–DECEMBER 1998–REVISED JUNE 2002
PARAMETER MEASUREMENT INFORMATION (continued)
DE
R (see Note B)
L
V
V
1.4 V
1 V
I(B)
(2 Places)
Y
Z
A
B
Pulse
Generator
I(A)
V
OC(PP)
(see Note D)
Input
(see Note A)
V
OC
V
OC(SS)
C
L
= 10 pF
(2 Places)
(see Note C)
V
CC
A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate
(PRR) = 50 Mpps, pulse width = 10 ±0.2 ns.
B. RL = 100 Ω or 50 Ω ±1%
C. CL includes instrumentation and fixture capacitance within 6 mm of the D.U.T.
D. The measurement of VOC(PP) is made on test equipment with a -3 dB bandwidth of at least 300 MHz.
Figure 3. Test Circuit and Definitions for the Driver Common-Mode Output Voltage
DE
Y
A
B
Pulse
Generator
R
D
R (see Note A)
L
Z
10 pF
10 pF
V
V
1.4 V
1 V
IB
0-V Differential
1.2-V CM
IA
t
t
PLH
PHL
V
1.4 V
1 V
OZ
0-V Differential
1.2-V CM
V
OY
80%
0-V Differential
20%
V
OY
– V
OZ
t
f
t
r
A. RL = 100 Ω or 50 Ω ±1%
B. All input pulses are supplied by a generator having the following characteristics: pulse repetition rate (PRR) = 50
Mpps, pulse width = 10 ±0.2 ns.
Figure 4. Differential Receiver to Driver Propagation Delay and Driver Transition Time Waveforms
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SN65LVDS22
SN65LVDM22
www.ti.com
SLLS315C–DECEMBER 1998–REVISED JUNE 2002
PARAMETER MEASUREMENT INFORMATION (continued)
DE
R /2
L
(see Note A)
A
B
1 V or 1.4 V
1.2 V
R
D
1.2 V
R /2
L
(see Note A)
2 V
DE
OZ
1.4 V
0.8 V
t
t
t
t
PZH
PHZ
≈1.4 V
V
OY
or V
1.25 V
1.2 V
PZL
PLZ
1.2 V
1.15 V
V
OY
or V
OZ
≈1 V
A. RL = 100 Ω or 50 Ω ±1%
B. All input pulses are supplied by a generator having the following characteristics: pulse repetition rate (PRR) = 0.5
Mpps, pulse width = 500 ±10 ns.
Figure 5. Enable and Disable Timing Circuit
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SN65LVDS22
SN65LVDM22
www.ti.com
SLLS315C–DECEMBER 1998–REVISED JUNE 2002
PARAMETER MEASUREMENT INFORMATION (continued)
1A/B
2A/B
t
su
t
h
S0/1
Outputs
Out 1 or 2
Out 1 or 2
t
su
DE
NOTE: t and t times specify that data must be in a stable state before and after MUX control switches.
su
h
Figure 6. Input-to-Select for Both Rising and Falling Edge Setup and Hold Times
9
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SN65LVDS22
SN65LVDM22
www.ti.com
SLLS315C–DECEMBER 1998–REVISED JUNE 2002
TYPICAL CHARACTERISTICS
SN65LVDS22
SN65LVDS22
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
3.5
3
4
3
2
1
0
V
= 3.3 V
CC
V
= 3.3 V
T = 25°C
A
CC
T = 25°C
A
2.5
2
1.5
1
.5
0
−4
−3
−2
−1
0
0
2
4
6
I
− High-Level Output Current − mA
I
− Low-Level Output Current − mA
OH
OL
Figure 7.
Figure 8.
SN65LVDM22
SN65LVDM22
HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
3.5
3
4
3
2
1
0
V
T
A
= 3.3 V
= 25°C
CC
V
= 3.3 V
CC
T = 25°C
A
2.5
2
1.5
1
.5
0
−8
−6
−4
−2
0
0
2
4
6
8
10
12
I
− High-Level Output Current − mA
I
− Low-Level Output Current − mA
OH
OL
Figure 9.
Figure 10.
10
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SN65LVDS22
SN65LVDM22
www.ti.com
SLLS315C–DECEMBER 1998–REVISED JUNE 2002
APPLICATION INFORMATION
FAIL SAFE
One of the most common problems with differential signaling applications is how the system responds when no
differential voltage is present on the signal pair. The LVDS receiver is like most differential line receivers, in that
its output logic state can be indeterminate when the differential input voltage is between –100 mV and 100 mV
and within its recommended input common-mode voltage range. However, TI's LVDS receiver is different in how
it handles the open-input circuit situation.
Open-circuit means that there is little or no input current to the receiver from the data line itself. This could be
when the driver is in a high-impedance state or the cable is disconnected. When this occurs, the LVDS receiver
pulls each line of the signal pair to near VCC through 300-kΩ resistors as shown in Figure 11. The fail-safe
feature uses an AND gate with input voltage thresholds at about 2.3 V to detect this condition and force the
output to a high-level regardless of the differential input voltage.
V
CC
300 kΩ
300 kΩ
A
Rt = 100 Ω (Typ)
Y
B
V
IT
≈ 2.3 V
Figure 11. Open-Circuit Fail Safe of the LVDS Receiver
It is only under these conditions that the output of the receiver is valid with less than a 100 mV differential input
voltage magnitude. The presence of the termination resistor, Rt, does not affect the fail-safe function as long as it
is connected as shown in Figure 11. Other termination circuits may allow a dc current to ground that could defeat
the pullup currents from the receiver and the fail-safe feature.
11
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PACKAGE OPTION ADDENDUM
www.ti.com
8-Jan-2007
PACKAGING INFORMATION
Orderable Device
SN65LVDM22D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65LVDM22DG4
SN65LVDM22DR
SN65LVDM22DRG4
SN65LVDM22PW
SN65LVDM22PWG4
SN65LVDM22PWR
SN65LVDM22PWRG4
SN65LVDS22D
SOIC
SOIC
D
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
SOIC
PW
PW
PW
PW
D
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65LVDS22DG4
SN65LVDS22DR
SOIC
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65LVDS22DRG4
SN65LVDS22PW
SN65LVDS22PWG4
SN65LVDS22PWR
SN65LVDS22PWRG4
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jan-2007
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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to Customer on an annual basis.
Addendum-Page 2
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Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Amplifiers
Data Converters
DSP
Interface
Applications
Audio
Automotive
Broadband
Digital Control
Military
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
interface.ti.com
logic.ti.com
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Logic
Power Mgmt
Microcontrollers
Low Power Wireless
power.ti.com
microcontroller.ti.com
www.ti.com/lpw
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
www.ti.com/wireless
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