SN74ABT16241ADGGR [TI]

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SN74ABT16241ADGGR
型号: SN74ABT16241ADGGR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

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驱动器 输出元件
文件: 总8页 (文件大小:138K)
中文:  中文翻译
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ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢈ ꢉꢃꢇ  
ꢇ ꢈ ꢊꢅꢋ ꢆꢌ ꢅꢍꢎ ꢎꢏ ꢐꢑ ꢒ ꢐꢋ ꢓ ꢏ ꢐ  
ꢔ ꢋꢆ ꢕꢌ ꢖ ꢊꢀꢆꢄꢆ ꢏꢌ ꢗꢍ ꢆꢘ ꢍꢆ ꢀ  
SCBS347 − MAY 1994  
DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
Significantly Reduces Power Dissipation  
2
Typical V  
(Output Ground Bounce)  
OLP  
CC  
3
< 1 V at V  
= 5 V, T = 25°C  
A
4
Distributed V  
and GND Pin Configuration  
Minimizes High-Speed Switching Noise  
5
CC  
6
Flow-Through Architecture Optimizes  
7
V
V
CC  
CC  
PCB Layout  
8
2Y1  
2Y2  
GND  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
3Y3  
3Y4  
2A1  
2A2  
GND  
2A3  
2A4  
3A1  
3A2  
GND  
3A3  
3A4  
9
High-Drive Outputs (32-mA I  
,
OH  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
64-mA I  
)
OL  
Packaged in Plastic 300-mil Shrink  
Small-Outline (SSOP) Packages  
description  
The SN74ABT16241 is a 16-bit buffer and line  
driver designed specifically to improve both the  
performance and density of 3-state memory  
address drivers, clock drivers, and bus-oriented  
receivers and transmitters. The device can be  
used as four 4-bit buffers, two 8-bit buffers, or one  
16-bit buffer. This device provides true outputs  
and complementary output-enable (OE and OE)  
inputs.  
V
V
CC  
CC  
4Y1  
4Y2  
GND  
4Y3  
4Y4  
4A1  
4A2  
GND  
4A3  
4A4  
3OE  
4OE  
To ensure the high-impedance state during power  
up or power down, OE should be tied to V  
CC  
through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of  
the driver. OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined  
by the current-sourcing capability of the driver.  
The SN74ABT16241 is available in TI’s shrink small-outline package (DL), which provides twice the I/O pin  
count and functionality of standard small-outline packages in the same printed-circuit-board area.  
The SN74ABT16241 is characterized for operation from 40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
INPUTS  
OUTPUTS  
1Y, 4Y  
OUTPUTS  
2Y, 3Y  
1A, 4A  
1OE, 4OE  
2OE, 3OE  
2A, 3A  
L
L
H
L
H
L
H
H
L
H
L
H
L
H
X
Z
X
Z
Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.  
ꢆꢧ  
Copyright 1994, Texas Instruments Incorporated  
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢬ  
2−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇꢈꢉ ꢃ ꢇ  
ꢇ ꢈꢊ ꢅꢋ ꢆ ꢌ ꢅ ꢍꢎ ꢎꢏ ꢐꢑ ꢒꢐ ꢋ ꢓꢏ ꢐ  
ꢔꢋ ꢆ ꢕ ꢌꢖ ꢊꢀ ꢆꢄꢆꢏ ꢌ ꢗ ꢍꢆ ꢘꢍꢆ ꢀ  
ꢀꢘ ꢋꢙꢏ ꢌꢋꢑ ꢗ ꢌ ꢚꢗ ꢒ ꢏ ꢛ  
SCBS347 − MAY 1994  
logic diagram (positive logic)  
1
25  
36  
35  
33  
32  
24  
30  
29  
27  
26  
3OE  
3A1  
3A2  
1OE  
13  
14  
16  
17  
2
3
5
6
47  
3Y1  
3Y2  
3Y3  
3Y4  
1Y1  
1Y2  
1Y3  
1Y4  
1A1  
46  
1A2  
44  
1A3  
3A3  
3A4  
4OE  
4A1  
4A2  
4A3  
4A4  
43  
1A4  
48  
2OE  
19  
20  
22  
23  
8
9
41  
4Y1  
4Y2  
4Y3  
4Y4  
2Y1  
2Y2  
2Y3  
2Y4  
2A1  
40  
2A2  
11  
12  
38  
2A3  
37  
2A4  
SPICE block diagram  
Node 6  
V
CC  
Node 199  
Node 100  
Node 1  
Node 2  
Node 4  
Node 5  
ABT16241IN  
ABT16241OUT  
SPICE FUNCTION TABLE  
NODE  
NODE  
OPERATION  
OPERATION  
1
L
2
H
L
4
L
5
H
L
6
L
Input  
Input  
Output  
Output  
Hi-Z  
H
H
X
L
Z
H
2−2  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢈ ꢉꢃꢇ  
ꢇ ꢈ ꢊꢅꢋ ꢆꢌ ꢅꢍꢎ ꢎ ꢏꢐ ꢑ ꢒꢐ ꢋ ꢓꢏ ꢐ  
ꢔ ꢋꢆ ꢕꢌ ꢖ ꢊꢀꢆꢄꢆ ꢏꢌ ꢗ ꢍꢆ ꢘꢍ ꢆꢀ  
SCBS347 − MAY 1994  
SPICE netlist  
*
*
*
*
*
*
*
ABT16241 SPICE I/O MODEL SUBCIRCUIT  
ADVANCED BUS INTERFACE  
ADVANCED SYSTEM LOGIC, TEXAS INSTRUMENTS  
SUBCIRCUITS: ABT16241IN, ABT16241OUT  
PACKAGE PARASITICS  
.LIB ’PKGS.LIB’  
PROCESS MODELS  
SSOP48  
*
*
.LIB ’EPIC2B.LIB’ NOMINAL_L13  
.LIB ’EPIC2B.LIB’ STRONG_L13  
.LIB ’EPIC2B.LIB’ WEAK_L13  
*
*
*
* ABT16241 INPUT SUBCIRCUIT  
*
*
*
*
*
NODES:  
INPUT NODE  
|
INTERNAL OUTPUT NODE  
|
|
|
|
2
VCC  
|
|
GND  
|
|
1
|
199  
.SUBCKT ABT16241IN  
X_PKGIN  
X_PKGVCC  
X_PKGGND  
100  
1
1001  
1199  
1100  
2
SSOP48_47  
SSOP48_07  
SSOP48_04  
ABT16241__IN  
199  
100  
1001  
XABT16241IN  
.ENDS ABT16241IN  
*
1199 1100  
* ABT16241 OUTPUT SUBCIRCUIT  
*
*
*
*
*
*
NODES:  
INTERNAL INPUT NODE  
|
OUTPUT NODE  
|
|
|
|
|
5
INTERNAL OE NODE  
|
|
|
|
6
VCC  
|
|
GND  
|
|
|
.SUBCKT ABT16241OUT  
X_PKGOUT  
X_PKGVCC  
X_PKGGND  
4
199  
100  
5
1005  
1199  
1100  
1005  
SSOP48_02  
SSOP48_07  
SSOP48_04  
199  
100  
4
XABT16241OUT  
.ENDS ABT16241OUT  
*
6
1199 1100 ABT16241__OUT  
.SUBCKT ABT16241__IN  
501  
506  
599  
599  
599  
500  
500  
508  
507  
506  
500  
500  
507  
502  
599  
599  
599  
599  
500  
500  
500  
599  
500  
XP1  
502  
509  
506  
508  
502  
509  
599  
599  
599  
501  
504  
506  
501  
505  
501  
502  
504  
502  
509  
500  
504  
502  
500  
508  
507  
500  
505  
507  
504  
500  
500  
500  
PM  
WP=200U  
WP=20U  
WP=85U  
WP=50U  
WN=220U  
WN=20U  
WN=20U  
10  
LP=0.8U  
LP=0.8U  
LP=0.8U  
LP=0.8U  
LN=0.8U  
LN=0.8U  
LN=0.8U  
XP2  
PM  
XP3  
PM  
XP4  
PM  
XN1  
NM  
XN2  
NM  
XN4  
NM  
QA  
Q2_NPN  
Q5_NPN  
Q7_NPN  
Q5_NPN  
RMOS  
QB  
60  
Q_ESD1  
Q_ESD  
XR1  
200  
46  
WR=4U  
50  
1K  
0.3P  
0.2P  
507  
RES=6K  
RESD1  
RESD2  
CBP  
CL  
.ENDS ABT16241__IN  
*
.SUBCKT ABT16241__OUT  
601  
699  
621  
605  
699  
605  
608  
602  
699  
699  
699  
699  
699  
600  
603  
PM  
PM  
PM  
PM  
PM  
NM  
699  
600  
XP1  
605  
601  
613  
618  
607  
607  
603  
603  
601  
603  
612  
601  
WP=200U  
WP=40U  
WP=30U  
WP=50U  
WP=60U  
WN=100U  
LP=0.8U  
LP=0.8U  
LP=0.8U  
LP=0.8U  
LP=0.8U  
LN=0.8U  
XP4  
XP5  
XP10  
XP11  
XN1  
2−3  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇꢈꢉ ꢃ ꢇ  
ꢇ ꢈꢊ ꢅꢋ ꢆ ꢌ ꢅ ꢍꢎ ꢎꢏ ꢐꢑ ꢒꢐ ꢋ ꢓꢏ ꢐ  
ꢔꢋ ꢆ ꢕ ꢌꢖ ꢊꢀ ꢆꢄꢆꢏ ꢌ ꢗ ꢍꢆ ꢘꢍꢆ ꢀ  
ꢀꢘ ꢋꢙꢏ ꢌꢋꢑ ꢗ ꢌ ꢚꢗ ꢒ ꢏ ꢛ  
SCBS347 − MAY 1994  
SPICE netlist (continued)  
XN2  
606  
608  
608  
613  
602  
621  
601  
619  
620  
613  
616  
602  
614  
614  
615  
613  
699  
606  
607  
614  
616  
619  
670  
671  
604  
671  
673  
608  
674  
675  
612  
612  
612  
609  
609  
622  
622  
610  
610  
611  
611  
602  
619  
609  
603  
603  
621  
603  
622  
619  
604  
601  
615  
608  
613  
614  
615  
614  
617  
605  
606  
605  
617  
618  
603  
671  
670  
604  
612  
673  
602  
609  
611  
611  
609  
601  
601  
603  
603  
603  
603  
610  
610  
600  
607  
600  
600  
600  
600  
600  
621  
620  
602  
600  
602  
600  
615  
616  
613  
600  
600  
600  
600  
600  
600  
600  
600  
600  
600  
NM  
WN=50U  
WN=25U  
WN=80U  
WN=25U  
WN=100U  
WN=10U  
WN=20U  
WN=25U  
WN=25U  
WN=40U  
200  
LN=0.8U  
LN=0.8U  
LN=0.8U  
LN=0.8U  
LN=0.8U  
LN=0.8U  
LN=0.8U  
LN=0.8U  
LN=0.8U  
LN=0.8U  
XN3  
NM  
XN4  
NM  
XN6  
NM  
XN7  
NM  
XN8  
NM  
XN9  
NM  
XN10  
NM  
XN11  
NM  
XN12  
NM  
QM1  
Q9_NPN  
Q11_NPN  
Q4_NPN  
Q2_NPN  
Q2_NPN  
D1_GDS  
D9_GSD  
RMOS  
RMOS  
RMOS  
QM2  
600  
QM3  
15  
QD4  
8
QDR1  
8
D1  
156  
D2  
4700  
XR1  
605  
606  
605  
605  
606  
605  
WR=6U  
WR=4U  
WR=6U  
10  
RES=1K  
RES=3K  
RES=1K  
XR2  
XR3  
R4  
XR10  
618  
699  
600  
670  
604  
674  
618  
699  
600  
670  
604  
600  
RMOS  
PM  
NM  
RMOS  
RMOS  
NM  
WR=3U  
WP=50U  
WN=30U  
WR=3U  
WR=3U  
WN=250U  
800  
RES=20K  
LP=0.8U  
LN=0.8U  
RES=20K  
RES=1.5K  
LN=0.8U  
XPVREF  
XNVREF  
XRVREF1  
XRVREF2  
XNCLAMP  
DCLAMP1  
DCLAMP2  
XPNOR1  
XPNOR2  
XNNOR1  
XNNOR2  
XP_INV1  
XN_INV1  
XP_INV2  
XN_INV2  
XP_INV3  
XN_INV3  
XP_INV4  
XN_INV4  
CBP  
D6_GSD  
D6_GSD  
PM  
800  
699  
675  
600  
600  
699  
600  
699  
600  
699  
600  
699  
600  
699  
699  
600  
600  
699  
600  
699  
600  
699  
600  
699  
600  
WP=30U  
WP=30U  
WN=6U  
WN=6U  
WP=20U  
WN=10U  
WP=15U  
WN=5U  
WP=4U  
WN=4U  
WP=4U  
WN=4U  
0.3P  
LP=0.8U  
LP=0.8U  
LN=0.8U  
LN=0.8U  
LP=0.8U  
LN=0.8U  
LP=0.8U  
LN=0.8U  
LP=0.8U  
LN=0.8U  
LP=0.8U  
LN=0.8U  
PM  
NM  
NM  
PM  
NM  
PM  
NM  
PM  
NM  
PM  
NM  
.ENDS ABT16241__OUT  
*
2−4  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Mar-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
DGG  
DL  
SN74ABT16241DGGR  
SN74ABT16241DL  
SN74ABT16241DLR  
OBSOLETE TSSOP  
48  
48  
48  
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
OBSOLETE  
OBSOLETE  
SSOP  
SSOP  
DL  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
MECHANICAL DATA  
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998  
DGG (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
48 PINS SHOWN  
0,27  
0,17  
M
0,08  
0,50  
48  
25  
6,20  
6,00  
8,30  
7,90  
0,15 NOM  
Gage Plane  
0,25  
1
24  
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
48  
56  
64  
DIM  
A MAX  
12,60  
12,40  
14,10  
13,90  
17,10  
16,90  
A MIN  
4040078/F 12/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001  
DL (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
48 PINS SHOWN  
0.025 (0,635)  
48  
0.0135 (0,343)  
0.008 (0,203)  
0.005 (0,13)  
M
25  
0.010 (0,25)  
0.005 (0,13)  
0.299 (7,59)  
0.291 (7,39)  
0.420 (10,67)  
0.395 (10,03)  
Gage Plane  
0.010 (0,25)  
0°ā8°  
1
24  
0.040 (1,02)  
0.020 (0,51)  
A
Seating Plane  
0.004 (0,10)  
0.008 (0,20) MIN  
PINS **  
0.110 (2,79) MAX  
28  
48  
0.630  
56  
DIM  
0.380  
(9,65)  
0.730  
A MAX  
A MIN  
(16,00) (18,54)  
0.370  
(9,40)  
0.620  
0.720  
(15,75) (18,29)  
4040048/E 12/01  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).  
D. Falls within JEDEC MO-118  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are  
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where  
mandated by government requirements, testing of all parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide  
adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,  
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