SN74ABT573ARGYR [TI]
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS; 八路透明D类锁存器具有三态输出
| 型号： | SN74ABT573ARGYR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| 文件： | 总18页 (文件大小：460K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢉ ꢀꢁꢇ ꢃ ꢄ ꢅꢆ ꢂꢇ ꢈꢄ
ꢊ ꢋꢆꢄꢌ ꢆ ꢍꢄꢁꢀ ꢎꢄꢍꢏ ꢁꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ
ꢔ ꢕꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊ ꢖꢆ ꢎ ꢖꢆꢀ
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003
D
Typical V
(Output Ground Bounce)
D
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD 17
OLP
<1 V at V
= 5 V, T = 25°C
CC
A
D
High-Drive Outputs (−32-mA I , 64-mA I
)
D
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
OH
OL
D
I
Supports Partial-Power-Down Mode
off
Operation
SN54ABT573 . . . J OR W PACKAGE
SN74ABT573A . . . DB, DW, N, NS,
OR PW PACKAGE
SN74ABT573A . . . RGY PACKAGE
(TOP VIEW)
SN54ABT573 . . . FK PACKAGE
(TOP VIEW)
(TOP VIEW)
1
20
OE
1D
2D
3D
4D
5D
6D
7D
8D
V
CC
1Q
1
2
3
4
5
6
7
8
9
10
20
19
3
2
1
20 19
18
19
18
17
16
15
14
13
12
2
3
4
5
6
7
8
9
1D
2D
3D
4D
5D
6D
7D
8D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
4
5
6
7
8
18 2Q
17
16
15
14
17
16
15
14
13
12
11
3Q
4Q
5Q
6Q
7Q
8Q
LE
9 10 11 12 13
10
11
GND
description/ordering information
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
Tube
SN74ABT573AN
SN74ABT573AN
AB573A
QFN − RGY
Tape and reel SN74ABT573ARGYR
Tube SN74ABT573ADW
SOIC − DW
ABT573A
Tape and reel SN74ABT573ADWR
Tape and reel SN74ABT573ANSR
Tape and reel SN74ABT573ADBR
SOP − NS
ABT573A
AB573A
−40°C to 85°C
SSOP − DB
Tube
SN74ABT573APW
TSSOP − PW
AB573A
AB573A
Tape and reel SN74ABT573APWR
SN74ABT573AGQNR
VFBGA − GQN
VFBGA − ZQN (Pb-free)
CDIP − J
Tape and reel
SN74ABT573AZQNR
Tube
Tube
Tube
SNJ54ABT573J
SNJ54ABT573W
SNJ54ABT573FK
SNJ54ABT573J
SNJ54ABT573W
SNJ54ABT573FK
CFP − W
−55°C to 125°C
LCCC − FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
ꢊ ꢘ ꢣ ꢛ ꢚꢦ ꢡꢠ ꢞꢟ ꢠꢚ ꢜꢣ ꢥꢗ ꢝꢘ ꢞ ꢞꢚ ꢭꢕ ꢌꢑ ꢎꢍ ꢮ ꢑꢈꢯꢂ ꢈꢂꢉ ꢝꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢝ ꢛ ꢢ ꢞꢢ ꢟꢞꢢ ꢦ
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢂꢇ ꢈꢉ ꢀꢁꢇ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢄ
ꢊꢋ ꢆꢄ ꢌ ꢆ ꢍ ꢄꢁ ꢀꢎꢄꢍ ꢏꢁ ꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ
ꢔꢕ ꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊꢖꢆ ꢎꢖ ꢆꢀ
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003
description/ordering information (continued)
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus
lines without need for interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
through a pullup
CC
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
SN74ABT573A . . . GQN OR ZQN PACKAGE
(TOP VIEW)
terminal assignments
1
2
3
4
1
1D
2
3
4
A
B
C
D
E
A
B
C
D
E
OE
3Q
4D
7Q
8D
V
1Q
2Q
4Q
6Q
8Q
CC
3D
2D
5Q
6D
LE
5D
7D
GND
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
Q
OE
L
LE
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
logic diagram (positive logic)
1
OE
11
LE
C1
1D
19
1Q
2
1D
To Seven Other Channels
Pin numbers shown are for the DB, DW, FK, J, N, NS, PW, RGY, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢉ ꢀꢁ ꢇꢃ ꢄꢅ ꢆꢂ ꢇꢈ ꢄ
ꢊ ꢋꢆꢄꢌ ꢆ ꢍꢄꢁꢀ ꢎꢄꢍꢏ ꢁꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ
ꢔ ꢕꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊ ꢖꢆ ꢎꢖ ꢆꢀ
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Voltage range applied to any output in the high or power-off state, V
. . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V
O
Current into any output in the low state, I : SN54ABT573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
O
SN74ABT573A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
O
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
JA
(see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
(see Note 2): GQN/ZQN package . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
(see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
(see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
(see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
(see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 4)
SN54ABT573 SN74ABT573A
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
Supply voltage
5.5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
Input voltage
IH
0.8
0.8
V
IL
0
V
0
V
CC
V
I
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
−24
48
−32
64
5
mA
mA
ns/V
°C
OH
OL
∆t/∆v
Outputs enabled
5
T
−55
125
−40
85
A
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢂꢇ ꢈꢉ ꢀꢁꢇ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢄ
ꢊꢋ ꢆꢄ ꢌ ꢆ ꢍ ꢄꢁ ꢀꢎꢄꢍ ꢏꢁ ꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ
ꢔꢕ ꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊꢖꢆ ꢎꢖ ꢆꢀ
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54ABT573 SN74ABT573A
A
PARAMETER
TEST CONDITIONS
I = −18 mA
UNIT
†
MIN TYP
MAX
MIN
MAX
MIN
MAX
V
IK
V
V
V
= 4.5 V,
= 4.5 V,
= 5 V,
−1.2
−1.2
−1.2
V
CC
CC
CC
I
I
I
I
I
I
I
= −3 mA
= −3 mA
= −24 mA
= −32 mA
= 48 mA
= 64 mA
2.5
3
2.5
3
2.5
3
OH
OH
OH
OH
OL
OL
V
OH
V
2
2
V
= 4.5 V
= 4.5 V
CC
CC
2*
2
0.55
0.55
1
V
V
V
V
OL
0.55*
0.55
1
100
mV
µA
µA
µA
µA
µA
mA
µA
mA
µA
hys
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 0,
V = V
I CC
or GND
1
I
‡
10
‡
10
‡
10
V
O
V
O
= 2.7 V
= 0.5 V
OZH
OZL
off
‡
−10
‡
−10
‡
−10
V or V ≤ 4.5 V
100
50
100
50
I
O
= 5.5 V,
= 5.5 V,
V
= 5.5 V
Outputs high
50
CEX
O
O
§
V
= 2.5 V
−50 −100 −180
−50 −180
−50
−180
250
30
O
Outputs high
Outputs low
1
24
250
30
250
30
V
= 5.5 V, I = 0,
O
CC
I
CC
V = V
I
or GND
CC
Outputs disabled
0.5
250
250
250
V
= 5.5 V, One input at 3.4 V,
CC
Other inputs at V
¶
1.5
1.5
1.5
mA
∆I
CC
or GND
CC
V = 2.5 V or 0.5 V
C
C
3.5
6.5
pF
pF
i
I
V
O
= 2.5 V or 0.5 V
o
* On products compliant to MIL-PRF-38535, this parameter does not apply.
†
‡
§
¶
All typical values are at V
= 5 V.
CC
This data sheet limit may vary among suppliers.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V or GND.
CC
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
SN54ABT573
V
T
= 5 V,
= 25°C
CC
A
UNIT
MIN
MAX
MIN
3.3
1.9
1.5
MAX
t
w
t
su
t
h
Pulse duration, LE high
Setup time, data before LE↓
Hold time, data after LE↓
3.3
2.5
2.5
2.5
ns
ns
ns
High
Low
1
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢉ ꢀꢁ ꢇꢃ ꢄꢅ ꢆꢂ ꢇꢈ ꢄ
ꢊ ꢋꢆꢄꢌ ꢆ ꢍꢄꢁꢀ ꢎꢄꢍꢏ ꢁꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ
ꢔ ꢕꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊ ꢖꢆ ꢎꢖ ꢆꢀ
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
SN74ABT573A
V
T
= 5 V,
= 25°C
CC
A
UNIT
MIN
MAX
MIN
3.3
1.9
1.5
MAX
t
Pulse duration, LE high
3.3
1.9
1.5
ns
w
High
Low
Setup time, data before LE↓
Hold time, data after LE↓
t
ns
ns
su
h
†
1.8
†
1.8
t
†
This data-sheet limit may vary among suppliers.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)
L
SN54ABT573
V
T
= 5 V,
FROM
(INPUT)
TO
(OUTPUT)
CC
A
PARAMETER
UNIT
= 25°C
TYP
3.2
MIN
MAX
MIN
1.9
2.2
2.2
3.2
1.2
2.7
2.5
2
MAX
5.4
5.7
6.1
6.7
4.7
6.2
6.4
6
t
t
t
t
t
t
t
t
1.4
1.6
2
6.4
6.7
7.1
7.5
6.2
7.2
7.7
7
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
D
Q
Q
Q
Q
ns
ns
ns
ns
4.2
4
LE
OE
OE
5.2
2.8
0.8
2
3.2
4.7
4.9
2.2
1.4
4.2
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)
L
SN74ABT573A
= 5 V,
V
T
FROM
(INPUT)
TO
(OUTPUT)
CC
A
PARAMETER
UNIT
= 25°C
TYP
3.2
MIN
MAX
MIN
MAX
5.4
5.7
6.1
6.7
4.7
6.2
6.4
6
t
t
t
t
t
t
t
t
1.9
2.2
2.2
3.2
1.2
1.9
2.2
2.2
3.2
1.2
5.9
6.2
6.6
7.2
5.2
6.7
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
D
Q
Q
Q
Q
ns
ns
ns
ns
4.2
4
LE
OE
OE
5.2
3.2
†
†
2.5
2.5
4.7
†
2.5
2
4.9
2.5
2
7.1
6.5
4.2
†
This data-sheet limit may vary among suppliers.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢂꢇ ꢈꢉ ꢀꢁꢇ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢄ
ꢊꢋ ꢆꢄ ꢌ ꢆ ꢍ ꢄꢁ ꢀꢎꢄꢍ ꢏꢁ ꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ
ꢔꢕ ꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊꢖꢆ ꢎꢖ ꢆꢀ
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003
PARAMETER MEASUREMENT INFORMATION
7 V
TEST
S1
Open
S1
500 Ω
From Output
Under Test
t
/t
PLH PHL
Open
7 V
GND
t
/t
PLZ PZL
C
= 50 pF
t
/t
Open
L
PHZ PZH
500 Ω
(see Note A)
3 V
0 V
LOAD CIRCUIT
Timing Input
Data Input
1.5 V
t
w
t
t
h
su
3 V
0 V
3 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
t
t
t
t
t
PZL
PLZ
PLH
PHL
PHL
Output
Waveform 1
S1 at 7 V
3.5 V
V
V
OH
1.5 V
1.5 V
1.5 V
1.5 V
t
Output
V
V
+ 0.3 V
OL
V
OL
OL
(see Note B)
t
t
PZH
PHZ
− 0.3 V
PLH
Output
Waveform 2
S1 at Open
(see Note B)
V
OH
V
V
OH
OH
1.5 V
1.5 V
Output
≈0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢂ
ꢄ
ꢇ
ꢈ
ꢄ
ꢉ
ꢄ
MCFP006B − JANUARY 1995 − REVISED JULY 2003
W (R-GDFP-F20)
CERAMIC DUAL FLATPACK
Base and Seating Plane
0.300 (7,62)
0.245 (6,22)
0.045 (1,14)
0.026 (0,66)
0.009 (0,23)
0.004 (0,10)
0.100 (2,54)
0.045 (1,14)
0.320 (8,13) MAX
0.022 (0,56)
0.015 (0,38)
1
20
0.050 (1,27)
0.540 (13,72)
MAX
0.005 (0,13) MIN
4 Places
10
11
0.370 (9,40)
0.250 (6,35)
0.370 (9,40)
0.250 (6,35)
4040180-4/D 07/03
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within Mil-Std 1835 GDFP2-F20
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPBG133C – APRIL 2000 – REVISED AUGUST 2002
GQN (R-PBGA-N20)
PLASTIC BALL GRID ARRAY
1,95 TYP
3,10
2,90
0,65
0,325
E
D
C
B
A
4,10
3,90
2,60
1
2
3
4
A1 Corner
Bottom View
1,00 MAX
0,08
Seating Plane
0,25
0,15
0,45
20×
0,35
M
0,05
4200704/D 07/2002
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. MicroStar Juniort configuration
D. Falls within JEDEC MO-225 variation BC.
E. This package is tin-lead (SnPb). Refer to the 20 ZQN package (drawing 4204492) for lead-free.
MicroStar Junior is a trademark of Texas Instruments.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPBG297 – JULY 2002
ZQN (R-PBGA-N20)
PLASTIC BALL GRID ARRAY
1,95
0,65
3,10
2,90
0,325
E
D
C
B
A
4,10
3,90
2,60
1
2
3
4
Bottom View
A1 Corner
1,00 Max
0,08
Seating Plane
0,25
0,15
0,45
0,35
20×
0,05
M
4204492/A 06/2002
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. MicroStar Junior configuration.
D. Fall within JEDEC MO-225 variation BC.
E. This package is lead-free. Refer to the 20 GQN package (drawing 4200704) for tin-lead )SnPb).
MicroStar Junior is a trademark of Texas Instruments.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL
MPDI002C – JANUARY 1995 – REVISED DECEMBER 20002
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
DIM
0.775
0.775
0.920
1.060
A MAX
A
(19,69) (19,69) (23,37) (26,92)
16
9
0.745
0.745
0.850
0.940
A MIN
(18,92) (18,92) (21,59) (23,88)
MS-100
VARIATION
0.260 (6,60)
0.240 (6,10)
AA
BB
AC
AD
C
1
8
0.070 (1,78)
0.045 (1,14)
D
0.045 (1,14)
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
D
0.030 (0,76)
0.015 (0,38)
Gauge Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.430 (10,92) MAX
0.021 (0,53)
0.015 (0,38)
0.010 (0,25)
M
14/18 PIN ONLY
20 pin vendor option
D
4040049/E 12/2002
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001, except 18 and 20 pin minimum body lrngth (Dim A).
D. The 20 pin end lead shoulder width is a vendor option, either half or full width.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSOI003E – JANUARY 1995 – REVISED SEPTEMBER 2001
DW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
16 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
9
0.050 (1,27)
16
0.010 (0,25)
0.419 (10,65)
0.400 (10,15)
0.010 (0,25) NOM
0.299 (7,59)
0.291 (7,39)
Gage Plane
0.010 (0,25)
1
8
0°– 8°
0.050 (1,27)
0.016 (0,40)
A
Seating Plane
0.012 (0,30)
0.004 (0,10)
0.004 (0,10)
0.104 (2,65) MAX
PINS **
16
18
20
24
0.610
28
DIM
0.410
0.462
0.510
0.710
(18,03)
A MAX
(10,41) (11,73) (12,95) (15,49)
0.400
0.453
0.500
0.600
0.700
(17,78)
A MIN
(10,16) (11,51) (12,70) (15,24)
4040000/E 08/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-013
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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