SN74ALS29823 [TI]
9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS; 9位总线接口触发器具有三态输出
| 型号： | SN74ALS29823 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 文件： | 总7页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54ALS29823, SN74ALS29823
9-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS146B – JANUARY 1986 – REVISED JANUARY 1995
SN54ALS29823 . . . JT PACKAGE
SN74ALS29823 . . . DW OR NT PACKAGE
(TOP VIEW)
• Functionally Equivalent to AMD’s AM29823
• Provide Extra Data Width Necessary for
Wider Address/Data Paths or Buses With
Parity
OE
1D
2D
3D
4D
5D
6D
7D
8D
V
CC
1
2
3
4
5
6
7
8
9
24
• Outputs Have Undershoot-Protection
23 1Q
22 2Q
21 3Q
20 4Q
19 5Q
18 6Q
17 7Q
16 8Q
15 9Q
14 CLKEN
13 CLK
Circuitry
• Power-Up High-Impedance State
• Buffered Control Inputs Reduce dc Loading
Effects
• Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (NT) and Ceramic (JT) 300-mil DIPs
9D 10
CLR 11
GND 12
description
These 9-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O
ports, bidirectional bus drivers, parity bus interfacing, and working registers.
With the clock-enable (CLKEN) input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high
transitions of the clock (CLK) input. Taking CLKEN high disables the clock buffer, latching the outputs. The
′ALS29823 have noninverting data (D) inputs. Taking the clear (CLR) input low causes the nine Q outputs to
go low independently of the clock.
Abufferedoutput-enable(OE)inputplacesthenineoutputsineitheranormallogicstate(highorlowlogiclevels)
or a high-impedance state. The outputs also are in the high-impedance state during power-up and power-down
conditions. The outputs remain in the high-impedance state while the device is powered down. In the
high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state
and increased drive provide the capability to drive bus lines without interface or pullup components.
OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
The SN54ALS29823 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ALS29823 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
Q
OE
L
CLR CLKEN CLK
D
X
H
L
L
H
H
H
X
X
L
X
↑
L
H
L
L
L
L
↑
L
H
X
X
X
X
X
Q
0
H
Z
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS29823, SN74ALS29823
9-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS146B – JANUARY 1986 – REVISED JANUARY 1995
†
logic symbol
1
EN
OE
11
R
CLR
14
G1
CLKEN
13
CLK
1C2
2
23
22
21
20
19
18
17
16
15
1D
2D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
3
2D
4
3D
5
4D
6
5D
7
6D
8
7D
9
8D
10
9D
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1
OE
11
CLR
14
CLKEN
R
13
CLK
23
C1
1D
1Q
2
1D
To Eight Other Channels
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS29823, SN74ALS29823
9-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS146B – JANUARY 1986 – REVISED JANUARY 1995
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
I
Voltage applied to a disabled high-impedance output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T : SN54ALS29823 . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS29823
MIN NOM MAX
UNIT
V
V
V
Supply voltage
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
IH
0.8
–18
32
V
IL
I
I
mA
mA
OH
OL
CLR low
7
8
t
w
t
su
t
h
Pulse duration
ns
CLK high or low
CLR inactive
Data
7
4
ns
Setup time before CLK↑
CLKEN high or low
CLKEN
8
2
ns
Hold time after CLK↑
Data
4
T
A
Operating free-air temperature
–55
25
125
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS29823
PARAMETER
UNIT
V
TEST CONDITIONS
‡
MIN TYP
MAX
V
V
V
V
V
= 4.5 V,
I = –18 mA
I
–1.2
IK
CC
I
I
I
= –12 mA
= –18 mA
= 32 mA
= 2.4 V
2.4
2
3.3
OH
OH
OL
= 4.5 V
V
OH
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
0.25
0.5
50
V
OL
OZH
OZL
I
I
I
I
I
I
I
V
µA
µA
mA
µA
mA
mA
O
O
V
= 0.4 V
–50
0.1
V = 5.5 V
I
V = 2.7 V
20
IH
I
V = 0.4 V
–0.5
–250
90
IL
I
§
V
= 0
–75
OS
O
Outputs high
Outputs low
Outputs open
I
V
CC
= 5.5 V
105
115
mA
CC
‡
§
All typical values are at V
= 5 V, T = 25°C.
A
CC
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS29823, SN74ALS29823
9-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS146B – JANUARY 1986 – REVISED JANUARY 1995
switching characteristics (see Figure 1)
†
V
T
A
= MIN to MAX ,
CC
= MIN to MAX
†
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
TEST CONDITIONS
UNIT
SN54ALS29823
MIN
2
MAX
11.5
11.5
21
t
t
t
t
t
t
t
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PHL
PZH
PZL
PZH
PZL
PHZ
PLZ
PHZ
PLZ
CLK
ns
Any Q
C
= 50 pF
L
2
2
CLK
CLR
OE
ns
ns
ns
Any Q
Any Q
C
= 300 pF
= 50 pF
L
2
21
C
C
1
17.5
17
L
L
1
Any Q
Any Q
Any Q
Any Q
= 50 pF
= 300 pF
= 50 pF
1
17
1
25
ns
ns
ns
OE
OE
OE
C
L
1
29.5
16
1
C
L
1
14
1
12
C
= 5 pF
L
1
11
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
I
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T : SN74ALS29823 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN74ALS29823
MIN NOM MAX
UNIT
V
V
V
Supply voltage
4.75
2
5
5.25
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
IH
0.8
–24
48
V
IL
I
mA
mA
OH
OL
I
CLR low
5
5
5
2
6
0
2
0
t
t
t
Pulse duration
ns
w
su
h
CLK high or low
CLR inactive
Data
ns
Setup time before CLK↑
CLKEN high or low
CLKEN
ns
Hold time after CLK↑
Data
T
Operating free-air temperature
25
70
°C
A
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS29823, SN74ALS29823
9-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS146B – JANUARY 1986 – REVISED JANUARY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN74ALS29823
PARAMETER
UNIT
V
TEST CONDITIONS
†
MIN TYP
MAX
V
V
V
V
V
= 4.75 V,
I = –18 mA
I
–1.2
IK
CC
I
I
I
= –15 mA
= –24 mA
= 48 mA
= 2.4 V
2.4
2
3.3
3.1
OH
OH
OL
= 4.75 V
V
OH
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.75 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
0.35
0.5
20
V
OL
OZH
OZL
I
I
I
I
I
I
I
I
V
V
µA
µA
mA
µA
mA
mA
mA
O
O
= 0.4 V
–20
0.1
V = 5.5 V
I
V = 2.7 V
20
IH
I
V = 0.4 V
–0.2
–250
115
IL
I
‡
V
= 0
–75
OS
O
Outputs open
80
CC
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
switching characteristics (see Figure 1)
§
V
T
A
= MIN to MAX ,
CC
= MIN to MAX
§
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
TEST CONDITIONS
UNIT
SN74ALS29823
MIN
2
MAX
10
10
16
16
12
14
14
20
23
14
12
9
t
t
t
t
t
t
t
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PHL
PZH
PZL
PZH
PZL
PHZ
PLZ
PHZ
PLZ
CLK
ns
Any Q
C
= 50 pF
L
2
CLK
CLR
OE
ns
ns
ns
Any Q
Any Q
C
= 300 pF
= 50 pF
L
C
C
L
L
Any Q
Any Q
Any Q
Any Q
= 50 pF
= 300 pF
= 50 pF
ns
ns
ns
OE
OE
OE
C
L
C
L
C
= 5 pF
L
9
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS29823, SN74ALS29823
9-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS146B – JANUARY 1986 – REVISED JANUARY 1995
PARAMETER MEASUREMENT INFORMATION
Test Point
V
CC
SWITCH POSITION TABLE
S1
From Output
Under Test
TEST
S1
S2
R
= 180 Ω
L
t
t
Closed
Closed
Open
Closed
Closed
Closed
Closed
Closed
Closed
Open
Closed
Closed
PLH
PHL
PZH
All Diodes
1N916 or 1N3064
R1
1 kΩ
C
L
t
t
(see Note A)
t
PZL
PHZ
S2
t
PLZ
LOAD CIRCUIT
1.5 V
3 V
0
High-Level
Pulse
3 V
1.5 V
1.5 V
1.5 V
Timing Input
0
t
w
t
h
t
su
3 V
0
3 V
0
Low-Level
Pulse
1.5 V
1.5 V
Data Input
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0
Output
Control
1.5 V
1.5 V
t
PZL
t
PLZ
≈ 4.5 V
≈ 1.5 V
3 V
Input
1.5 V
1.5 V
Waveform 1
(see Note B)
0
1.5 V
t
PHL
t
V
OL
PLH
V
OH
OL
0.5 V
t
In-Phase
Output
PHZ
1.5 V
1.5 V
1.5 V
t
t
PZH
V
V
OH
PLH
t
PHL
Waveform 2
(see Note B)
0.5 V
V
OH
1.5 V
≈ 1.5 V
Out-of-Phase
Output
1.5 V
≈ 0
V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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