SN74ALVC164245 [TI]
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS; 16位3.3 V至具有三态输出的5V电平转换收发器
| 型号： | SN74ALVC164245 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS |
| 文件： | 总8页 (文件大小：114K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
DGG OR DL PACKAGE
(TOP VIEW)
Member of the Texas Instruments
Widebus Family
EPIC (Enhanced-Performance Implanted
CMOS) Submicron Process
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
1OE
1A1
1A2
GND
1A3
1A4
2
Latch-Up Performance Exceeds 250 mA Per
JESD 17
3
4
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
5
6
7
(5 V) V
V
(3.3 V)
CCB
1B5
CCA
8
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
description
9
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
This 16-bit (dual-octal) noninverting bus
transceiver contains two separate supply rails;
B porthasV
,whichissetat5V,andAporthas
CCB
V
, which is set to operate at 3.3 V. This allows
CCA
for translation from a 3.3-V to a 5-V environment
and vice versa.
The SN74ALVC164245 is designed for
asynchronous communication between data
buses.
(5 V) V
V
(3.3 V)
CCB
2B5
CCA
2A5
2A6
GND
2A7
2A8
2OE
2B6
GND
2B7
2B8
2DIR
To ensure the high-impedance state during power
up or power down, the output-enable (OE) input
shouldbetiedtoV throughapullupresistor;the
CC
minimum value of the resistor is determined by the
current-sinking capability of the driver.
The SN74ALVC164245 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OPERATION
DIR
L
OE
L
B data to A bus
A data to B bus
Isolation
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
†
logic symbol
48
G3
1OE
1
1DIR
3 EN1 [BA]
3 EN2 [AB]
25
24
G6
2OE
2DIR
6 EN4 [BA]
6 EN5 [AB]
47
2
1
1A1
1B1
2
46
44
43
41
40
38
37
36
3
5
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
6
8
9
11
12
13
4
5
35
33
32
30
29
27
26
14
16
17
19
20
22
23
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2B2
2B3
2B4
2B5
2B6
2B7
2B8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
24
36
1
2DIR
2A1
1DIR
48
25
13
1OE
1B1
2OE
2B1
47
1A1
2
To Seven Other Channels
To Seven Other Channels
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
absolute maximum ratings over operating free-air temperature range for V
CCA
at 5 V and
CCB
†
V
at 3.3 V (unless otherwise noted)
Supply voltage range: V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V
CCA
CCB
V
Input voltage range, V : Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V
I
I/O port A (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
I/O port B (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
CCA
CCB
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
O
Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each V
Package thermal impedance, θ (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89°C/W
O
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
CC
JA
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. This value is limited to 6 V maximum.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions for V
at 5 V (see Note 4)
CCB
MIN
4.5
2
MAX
UNIT
V
V
V
V
V
V
Supply voltage
5.5
CCB
High-level input voltage
Low-level input voltage
Input voltage
V
IH
0.8
V
IL
0
0
V
CCB
V
IA
Output voltage
V
CCB
–24
V
OB
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
mA
mA
ns/V
°C
OH
OL
24
10
85
∆t/∆v
T
A
–40
NOTE 4: AllunusedinputsofthedevicemustbeheldattheassociatedV
orGNDtoensureproperdeviceoperation. RefertotheTIapplication
CC
report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
recommended operating conditions for V
at 3.3 V (see Note 4)
CCA
MIN
2.7
2
MAX
UNIT
V
V
V
V
V
Supply voltage
3.6
V
V
V
V
V
CCA
High-level input voltage
Low-level input voltage
Input voltage
V
V
= 2.7 V to 3.6 V
= 2.7 V to 3.6 V
IH
CCA
0.8
IL
CCA
0
0
V
CCA
IB
Output voltage
V
CCA
–12
OA
V
CCA
V
CCA
V
CCA
V
CCA
= 2.7 V
= 3 V
I
High-level output current
Low-level output current
mA
mA
OH
–24
12
24
10
85
= 2.7 V
= 3 V
I
OL
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
T
A
–40
°C
NOTE 4: AllunusedinputsofthedevicemustbeheldattheassociatedV
orGNDtoensureproperdeviceoperation. RefertotheTIapplication
CC
report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range for V
(unless otherwise noted) (see Note 5)
= 5 V
CCB
†
PARAMETER
TEST CONDITIONS
V
CCB
MIN TYP
MAX
UNIT
4.5 V
5.5 V
4.3
5.3
3.7
4.7
I
I
I
I
= –100 µA
= –24 mA
= 100 µA
= 24 mA
OH
OH
OL
OL
V
(A to B)
(A to B)
V
V
OH
4.5 V
5.5 V
4.5 V
0.2
0.2
5.5 V
V
OL
‡
4.5 V
0.55
0.55
±5
5.5 V
I
I
I
Control inputs V = V
or GND
5.5 V
µA
µA
µA
µA
pF
pF
I
I
CCB
= V
A or B ports
V
or GND
CCB
or GND,
5.5 V
±10
40
OZ
CC
O
V = V
I = 0
O
5.5 V
I
CCB
One input at 3.4 V,
Control inputs V = V or GND
§
∆I
CC
Other inputs at V
CCB
or GND
4.5 V to 5.5 V
5 V
750
C
C
6.5
6.5
i
I
CCB
= V
A or B ports
V
or GND
5 V
io
O
CCB
†
‡
§
Typical values are measured at V
CC
= 3.3 V, T = 25°C.
A
For I/O ports, the parameter I
includes the input leakage current.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than at 0 or the associated V
OZ
.
CC
NOTE 5:
V
CCA
= 2.7 V to 3.6 V
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
electrical characteristics over recommended operating free-air temperature range for V
(unless otherwise noted) (see Note 6)
= 3.3 V
CCA
†
PARAMETER
TEST CONDITIONS
V
MIN TYP
–0.2
MAX
UNIT
CCA
I
I
= –100 µA
2.7 V to 3.6 V
2.7 V
V
OH
CC
2.2
V
(B to A)
= –12 mA
V
OH
OH
3 V
2.4
2
I
I
I
I
= –24 mA
= 100 µA
= 12 mA
= 24 mA
3 V
OH
OL
OL
OL
2.7 V to 3.6 V
2.7 V
0.2
0.4
V
(B to A)
V
OL
‡
3 V
0.55
±5
I
I
I
Control inputs V = V
or GND
3.6 V
µA
µA
µA
µA
pF
pF
I
I
CCA
= V
V
or GND
3.6 V
±10
40
OZ
CC
O
CCA
or GND,
V = V
I = 0
O
3.6 V
I
CCA
§
∆I
CC
One input at V
– 0.6 V, Other inputs at V
CCA
or GND
3 V to 3.6 V
3.3 V
750
CCA
or GND
C
C
Control inputs V = V
6.5
8.5
i
I
CCA
= V
A or B ports
V
or GND
3.3 V
io
O
CCA
†
‡
§
Typical values are measured at V
CC
= 3.3 V, T = 25°C.
A
For I/O ports, the parameter I
includes the input leakage current.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than at 0 or the associated V
OZ
.
CC
NOTE 6:
V
CCB
= 5 V ± 0.5 V
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figures 1 and 2)
V
CCB
= 5 V ± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
V
= 3.3 V
± 0.3 V
CCA
V
= 2.7 V
PARAMETER
UNIT
CCA
MIN MAX
5.9
¶
¶
¶
MAX
MIN
A
B
A
B
B
A
A
1
5.8
t
pd
ns
B
6.7
9.3
9.2
10.2
9
1.2
1
5.8
8.9
9.5
9.1
8.6
t
t
t
t
ns
ns
ns
ns
OE
OE
OE
OE
en
dis
en
dis
2.1
2
2.9
¶
This limit can vary among suppliers.
operating characteristics, T = 25°C
A
V
V
= 3.3 V
= 5 V
CCA
CCB
PARAMETER
TEST CONDITIONS
UNIT
TYP
Outputs enabled (A or B)
Outputs disabled (A or B)
56
6
C
Power dissipation capacitance
C
= 50 pF,
L
f = 10 MHz
pF
pd
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
PARAMETER MEASUREMENT INFORMATION
V
= 2.7 V AND 3.3 V ± 0.3 V
CCA
6 V
TEST
S1
S1
Open
GND
500 Ω
t
Open
6 V
pd
/t
From Output
Under Test
t
PLZ PZL
t
/t
GND
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
3 V
0 V
Output
Control
(low-level
enabling)
1.5 V
1.5 V
LOAD CIRCUIT
t
t
PLZ
PZL
Output
Waveform 1
S1 at 6 V
≈ 3 V
3 V
0 V
1.5 V
Input
1.5 V
1.5 V
V
V
+ 0.3 V
OL
V
(see Note B)
OL
OH
t
t
PHZ
PZH
t
t
PHL
PLH
Output
Waveform 2
S1 at GND
V
V
OH
– 0.3 V
OH
1.5 V
Output
1.5 V
1.5 V
0 V
V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
PHL
are the same as t
.
dis
PLZ
PZL
PLH
PHZ
PZH
are the same as t
.
en
are the same as t .
pd
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
PARAMETER MEASUREMENT INFORMATION
V
= 5 V ± 0.5 V
CCB
2
V
CCB
TEST
S1
S1
Open
GND
500 Ω
t
Open
V
pd
/t
From Output
Under Test
t
2
PLZ PZL
CCB
t
/t
GND
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
2.7 V
0 V
Output
Control
(low-level
enabling)
1.5 V
1.5 V
LOAD CIRCUIT
t
t
PLZ
PZL
Output
Waveform 1
≈ V
CCB
2.7 V
0 V
50% V
CCB
Input
S1 at 2
V
1.5 V
1.5 V
20% V
CCB
CCB
CCB
V
OL
(see Note B)
t
t
PZH
PHZ
t
t
PHL
PLH
Output
Waveform 2
S1 at GND
V
OH
V
OH
80% V
50% V
CCB
Output
50% V
50% V
CCB
CCB
0 V
V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A.
C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
PHL
are the same as t
.
dis
PLZ
PZL
PLH
PHZ
PZH
are the same as t
.
en
are the same as t .
pd
Figure 2. Load Circuit and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
相关型号：
SN74ALVC164245-EP
16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
TI
SN74ALVC164245DGGTE4
ALVC/VCX/A SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, GREEN, PLASTIC, TSSOP-48
TI
SN74ALVC164245_07
16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
TI
SN74ALVC164245_08
16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
TI
©2020 ICPDF网 联系我们和版权申明