SN74AUC2G66DCTR [TI]
DUAL BILATERAL ANALOG SWITCH; 双边双模拟开关
| 型号： | SN74AUC2G66DCTR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL BILATERAL ANALOG SWITCH |
| 文件： | 总16页 (文件大小：322K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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ꢊꢅꢄ ꢋ ꢌꢍ ꢋꢄꢎ ꢏꢐꢄꢋ ꢄꢁꢄ ꢋꢑ ꢈ ꢀ ꢒꢍ ꢎꢆ ꢓ
SCES507 − NOVEMBER 2003
DCT OR DCU PACKAGE
(TOP VIEW)
D
Available in the Texas Instruments
NanoStar and NanoFree Packages
D
D
D
D
D
D
D
Operates at 0.8 V to 2.7 V
Sub 1-V Operable
1A
1B
2C
V
CC
1
2
3
4
8
7
6
5
1C
2B
2A
Max t of 0.5 ns at 1.8 V
pd
GND
Low Power Consumption, 10 µA at 2.7 V
High On-Off Output Voltage Ratio
High Degree of Linearity
YEP OR YZP PACKAGE
(BOTTOM VIEW)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
4 5
3 6
2 7
1 8
GND
2C
1B
2A
2B
1C
D
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
1A
V
CC
description/ordering information
This dual analog switch is operational at 0.8-V to 2.7-V V , but is designed specifically for 1.1-V to 2.7-V V
CC
operation.
CC
The SN74AUC2G66 can handle both analog and digital signals. It permits signals with amplitudes of up to 2.7-V
(peak) to be transmitted in either direction.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for
analog-to-digital and digital-to-analog conversion systems.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
‡
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
Tape and reel SN74AUC2G66YEPR
Tape and reel SN74AUC2G66YZPR
_ _ _U6_
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
−40°C to 85°C
SSOP − DCT
Tape and reel
Tape and reel
SN74AUC2G66DCTR
SN74AUC2G66DCUR
U66_ _ _
U66_
VSSOP − DCU
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin
1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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Copyright 2003, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCES507 − NOVEMBER 2003
FUNCTION TABLE
CONTROL
INPUT
(C)
SWITCH
L
OFF
ON
H
logic diagram (positive logic)
1
2
B
A
C
4
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
CC
Input voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
I
Switch I/O voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
I/O
CC
Control input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
IK
I
I/O port diode current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
IOK I/O
I/O CC
On-state switch current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous current through V
T
I/O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
Package thermal impedance, θ (see Note 3): DCT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C/W
JA
DCU package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227°C/W
YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . 102°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Storage temperature range, T
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to ground unless otherwise specified.
2. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢊ
SCES507 − NOVEMBER 2003
recommended operating conditions (see Note 4)
MIN
MAX
UNIT
V
Supply voltage
0.8
2.7
V
CC
IH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 0.8 V
V
CC
= 1.1 V to 1.95 V
= 2.3 V to 2.7 V
= 0.8 V
0.65 × V
V
High-level input voltage
V
V
CC
1.7
0
0.35 × V
0.7
= 1.1 V to 1.95 V
= 2.3 V to 2.7 V
V
Low-level input voltage
CC
IL
V
V
I/O port voltage
0
0
V
CC
3.6
V
V
I/O
Control input voltage
I
†
V
CC
V
CC
V
CC
= 0.8 V to 1.65 V
20
20
20
85
‡
= 1.65 V to 2.3 V
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
‡
= 2.3 V to 2.7 V
T
A
−40
°C
†
‡
The data was taken at C = 15 pF, R = 2 kΩ (see Figure 1).
L
L
The data was taken at C = 30 pF, R = 500 Ω (see Figure 1).
L
L
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
§
PARAMETER
TEST CONDITIONS
V
MIN TYP
MAX
40
20
15
180
80
20
3
UNIT
CC
1.1 V
1.65 V
2.3 V
1.1 V
1.65 V
2.3 V
1.1 V
1.65 V
2.3 V
17
7
V = V
or GND,
I
CC
IH
I
I
= 4 mA
= 8 mA
S
V
= V
r
r
On-state switch resistance
Ω
C
on
(see Figures 1 and 2)
4
S
131
32
15
V = V
to GND,
I
CC
IH
I
I
= 4 mA
= 8 mA
S
V
C
= V
Peak on resistance
Ω
on(p)
(see Figures 1 and 2)
S
V = V
to GND,
I
CC
IH
I
I
= 4 mA
= 8 mA
Difference of on-state resistance
between switches
S
1
V
C
= V
∆r
Ω
on
(see Figures 1 and 2)
1
S
V = V
CC
and V = GND, or
O
1
I
V = GND and V = V
,
I
Off-state switch leakage current
2.7 V
µA
I
V
O
CC
S(off)
†
0.1
= V (see Figure 3)
C
IL
1
†
V = V
CC
or GND, V = V , V = Open
IH
I
C
O
I
I
I
On-state switch leakage current
Control input current
Supply current
2.7 V
µA
µA
µA
S(on)
(see Figure 4)
0.1
V = V
or GND
or GND,
0 to 2.7 V
5
I
I
CC
CC
0.8 V to
2.7 V
V = V
I = 0
O
10
CC
I
C
C
C
Control input capacitance
2.5 V
2.5 V
2.5 V
2.5
3
pF
pF
pF
ic
Switch input/output capacitance
Switch input/output capacitance
io(off)
io(on)
7
§
T
A
= 25°C
3
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SCES507 − NOVEMBER 2003
switching characteristics over recommended operating free-air temperature range, C = 15 pF
L
(unless otherwise noted) (see Figure 5)
V
= 1.2 V
0.1 V
V
= 1.5 V
0.1 V
V
= 1.8 V
V
= 2.5 V
0.2 V
CC
CC
CC
0.15 V
CC
V
CC
= 0.8 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
TYP
MIN MAX
MIN MAX
MIN TYP MAX
MIN MAX
†
t
t
t
A or B
1
5
0.6
0.5
0.5
0.4
ns
ns
ns
B or A
A or B
A or B
pd
C
C
0.5
0.5
3
4
0.5
0.5
2.1
3
0.5
0.5
0.9
2.6
1.6
3.3
0.5
0.5
1.4
2.7
en
5.3
dis
†
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance when
driven by an ideal voltage source (zero output impedance).
switching characteristics over recommended operating free-air temperature range, C = 30 pF
L
(unless otherwise noted) (see Figure 5)
V
= 1.8 V
0.15 V
V
= 2.5 V
CC
CC
0.2 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
TYP
MAX
MIN MAX
†
t
t
t
A or B
0.7
0.7
2.3
2
ns
ns
ns
B or A
A or B
A or B
pd
C
C
0.5
0.5
1.6
2.7
2.7
3.4
0.5
0.5
en
dis
†
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance when
driven by an ideal voltage source (zero output impedance).
analog switch characteristics, T = 25°C
A
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
TEST CONDITIONS
V
CC
TYP
UNIT
0.8 V
1.1 V
1.4 V
1.65 V
2.3 V
0.8 V
1.1 V
1.4 V
1.65 V
2.3 V
0.8 V
1.1 V
1.4 V
1.65 V
2.3 V
0.8 V
1.1 V
1.4 V
1.65 V
2.3 V
101
150
175
250
400
450
>500
>500
>500
>500
−60
−60
−60
−60
−60
−65
−65
−65
−65
−65
C
= 50 pF, R = 600 Ω,
= sine wave
L
L
f
in
(see Figure 6)
‡
Frequency response
(switch ON)
A or B
B or A
MHz
C
= 5 pF, R = 50 Ω,
L
L
f
= sine wave
in
(see Figure 6)
C
= 50 pF, R = 600 Ω,
L
L
f
= 1 MHz (sine wave)
in
(see Figure 7)
§
Crosstalk
(between switches)
A or B
B or A
dB
C
= 5 pF, R = 50 Ω,
L
L
f
= 1 MHz (sine wave)
in
(see Figure 7)
‡
§
Adjust f voltage to obtain 0 dBm at output. Increase f frequency until dB meter reads −3 dB.
in
Adjust f voltage to obtain 0 dBm at input.
in
in
4
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SCES507 − NOVEMBER 2003
analog switch characteristics, T = 25°C (continued)
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
TEST CONDITIONS
V
CC
TYP
UNIT
0.8 V
1.1 V
1.4 V
1.65 V
2.3 V
0.8 V
1.1 V
1.4 V
1.65 V
2.3 V
0.8 V
1.1 V
1.4 V
1.65 V
2.3 V
0.8 V
9
14
C
= 50 pF, R = 600 Ω,
L
L
Crosstalk
(control input to signal output)
15
C
A or B
mV
f
= 1 MHz (square wave)
in
(see Figure 8)
16
20
−50
−50
−50
−50
−50
−60
−60
−60
−60
−60
7
C
= 50 pF, R = 600 Ω,
L
L
f
in
= 1 MHz (sine wave)
(see Figure 9)
‡
Feed-through attenuation
(switch OFF)
A or B
B or A
dB
C
= 5 pF, R = 50 Ω,
L
L
f
in
= 1 MHz (sine wave)
(see Figure 9)
0.25
6
1.1 V
C
= 50 pF, R = 10 kΩ,
= 1 kHz (sine wave)
L
L
A or B
B or A
f
in
1.4 V
1.65 V
2.3 V
0.8 V
1.1 V
1.4 V
1.65 V
2.3 V
0.04
0.03
0.01
3.7
(see Figure 10)
Sine-wave distortion
%
0.4
C
= 50 pF, R = 10 kΩ,
L
L
A or B
B or A
0.04
0.02
0.02
f
in
= 10 kHz (sine wave)
(see Figure 10)
‡
Adjust f voltage to obtain 0 dBm at input.
in
operating characteristics, T = 25°C
A
V
= 0.8 V
CC
TYP
V
= 1.2 V
CC
TYP
V
= 1.5 V
CC
TYP
V
= 1.8 V
CC
TYP
V = 2.5 V
CC
TEST
PARAMETER
UNIT
CONDITIONS
TYP
Power dissipation
capacitance
C
f = 10 MHz
2.5
2.5
2.5
2.5
2.5
pF
pd
5
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ꢄꢁ
ꢄꢋ ꢑꢈ ꢀ ꢒꢍ ꢎ ꢆꢓ
SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
V
CC
B or A
A or B
V = V
I
or GND
V
CC
O
C
V
IH
V
C
(ON)
GND
I
S
VI * VO
ron
+
W
IS
V
V − V
I
O
Figure 1. On-State Resistance Test Circuit
120
100
V
CC
= 1.1 V
80
60
40
V
CC
= 1.65 V
20
0
V
CC
= 2.3 V
0
1
2
3
Figure 2. Typical r as a Function of Voltage (V ) for V = 0 to V
CC
on
I
I
6
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ꢋꢄꢎ
ꢏꢐ
ꢄꢋ
ꢄꢁ
ꢄ
ꢋ
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ꢀ
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SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
V
V
CC
CC
B or A
A or B
V
I
A
V
O
C
V
IL
V
C
(OFF)
GND
Condition 1: V = GND, V = V
CC
I
O
Condition 2: V = V , V = GND
I
CC
O
Figure 3. Off-State Switch Leakage-Current Test Circuit
V
CC
V
CC
B or A
A or B
A
V = V
I CC
or GND
V
O
V
O
= Open
C
V
IH
V
C
(ON)
GND
Figure 4. On-State Leakage-Current Test Circuit
7
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ꢅ
ꢄ
ꢋ
ꢍ
ꢋ
ꢄ
ꢎ
ꢏ
ꢐ
ꢄꢋ
ꢄꢁ
ꢄꢋ
ꢑꢈ
ꢀ
ꢒꢍ
ꢎ
ꢆꢓ
SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
V
LOAD
Open
S1
R
L
From Output
Under Test
TEST
S1
GND
t
t
/t
Open
PLH PHL
/t
C
L
t
V
R
PLZ PZL
LOAD
GND
L
(see Note A)
/t
PHZ PZH
LOAD CIRCUIT
INPUTS
V
CC
V
M
V
C
R
V
∆
LOAD
L
L
V
I
t /t
r f
0.8 V
V
≤2 ns
≤2 ns
≤2 ns
≤2 ns
≤2 ns
≤2 ns
≤2 ns
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
/2
/2
/2
/2
/2
/2
/2
2 × V
2 × V
2 × V
2 × V
2 × V
2 × V
2 × V
15 pF
15 pF
15 pF
15 pF
15 pF
30 pF
30 pF
2 kΩ
2 kΩ
2 kΩ
2 kΩ
2 kΩ
1 kΩ
500 Ω
0.1 V
0.1 V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
1.2 V 0.1 V
1.5 V 0.1 V
V
V
V
V
V
V
0.1 V
1.8 V 0.15 V
2.5 V 0.2 V
1.8 V 0.15 V
2.5 V 0.2 V
0.15 V
0.15 V
0.15 V
0.15 V
V
I
Timing Input
V
M
0 V
t
w
t
t
su
h
V
I
V
I
Input
V
M
V
M
Data Input
V
M
V
M
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
I
V
I
Output
Control
V
M
V
M
Input
V
M
V
M
0 V
V
0 V
t
t
t
t
t
PHL
PZL
PLZ
+ V
PLH
PHL
Output
Waveform 1
V
/2
OH
LOAD
V
V
V
M
Output
M
V
V
M
S1 at V
(see Note B)
V
LOAD
OL
∆
V
OL
V
OL
t
PLH
t
t
PZH
PHZ
− V
Output
Waveform 2
S1 at GND
V
V
OH
V
OH
V
V
M
OH
∆
M
Output
M
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, slew rate ≥ 1 V/ns.
O
D. The outputs are measured one at a time with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
PHL
are the same as t
.
dis
PLZ
PZL
PLH
PHZ
PZH
are the same as t
.
en
are the same as t .
pd
H. All parameters and waveforms are not applicable to all devices.
Figure 5. Load Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢉ
ꢊꢅꢄ ꢋ ꢌꢍ ꢋꢄꢎ ꢏꢐꢄꢋ ꢄꢁꢄ ꢋꢑ ꢈ ꢀ ꢒꢍ ꢎꢆ ꢓ
SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
V
CC
0.1 µF
B or A
A or B
C
V
O
R
L
C
L
V
IH
50 Ω
f
V
C
in
(ON)
GND
V
CC
/2
R /C : 600 Ω / 50 pF
L
L
R /C : 50 Ω / 5 pF
L
L
Figure 6. Frequency Response (Switch ON)
V
V
CC
CC
0.1 µF
1B or 1A
1A or 1B
V
O1
R
in
600 Ω
C
50 pF
R
600 Ω
L
C
L
V
IH
50 Ω
V
C
f
in
(On)
V
CC
/2
2B or 2A
2A or 2B
V
O2
R
600 Ω
C
L
50 pF
L
C
R
in
600 Ω
V
IL
V
C
(Off)
GND
V
CC
/2
20log (V /V ) or
10 O2 I1
20log (V /V
)
10 O1 I2
Figure 7. Crosstalk (Between Switches)
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢇ ꢈꢉ ꢉ
ꢊ ꢅꢄꢋ ꢌ ꢍ ꢋ ꢄꢎ ꢏꢐ ꢄꢋ ꢄꢁ ꢄꢋ ꢑꢈ ꢀ ꢒꢍ ꢎ ꢆꢓ
SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
V
V
CC
CC
R
in
600 Ω
B or A
A or B
C
V
CC
/2
V
O
R
600 Ω
C
L
L
50 pF
V
C
GND
V
CC
/2
50 Ω
Figure 8. Crosstalk (Control Input − Switch Output)
V
CC
V
CC
0.1 µF
50 Ω
B or A
A or B
C
V
O
C
R
R
L
L
L
V
IL
V
C
f
in
(OFF)
GND
V
CC
/2
V
CC
/2
R /C : 600 Ω / 50 pF
L
L
R /C : 50 Ω / 5 pF
L
L
Figure 9. Feed Through, Switch Off
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢉ
ꢊꢅꢄ ꢋ ꢌꢍ ꢋꢄꢎ ꢏꢐꢄꢋ ꢄꢁꢄ ꢋꢑ ꢈ ꢀ ꢒꢍ ꢎꢆ ꢓ
SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
V
V
CC
CC
10 µF
10 µF
B or A
A or B
C
V
O
C
R
10 kΩ
L
L
V
IH
50 pF
600 Ω
V
C
f
in
(ON)
GND
V
CC
/2
V
CC
V
CC
V
CC
V
CC
V
CC
= 0.8 V, V = 0.7 V
I
P-P
= 1.1 V, V = 1 V
I
I
P-P
P-P
= 1.4 V, V = 1.2 V
= 1.65 V, V = 1.4 V
P-P
I
= 2.3 V, V = 2 V
I
P-P
Figure 10. Sine-Wave Distortion
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS049B – MAY 1999 – REVISED OCTOBER 2002
DCT (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
M
0,13
0,65
8
5
0,15 NOM
2,90
2,70
4,25
3,75
Gage Plane
PIN 1
INDEX AREA
0,25
1
4
0° – 8°
0,60
0,20
3,15
2,75
1,30 MAX
Seating Plane
0,10
0,10
0,00
4188781/C 09/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion
D. Falls within JEDEC MO-187 variation DA.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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