SN74AXC8T245PWR [TI]
8 位双电源总线收发器 | PW | 24 | -40 to 125;
| 型号： | SN74AXC8T245PWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8 位双电源总线收发器 | PW | 24 | -40 to 125 总线收发器 |
| 文件： | 总40页 (文件大小：1740K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SN74AXC8T245
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
具有可配置电压转换和三态输出的 SN74AXC8T245 8 位双电源总线收发器
1 特性
SN74AXC8T245 器件旨在实现数据总线间的异步通
信。根据方向控制输入（DIR1 和 DIR2）的逻辑电
平，此器件将数据从 A 总线传输至 B 总线，或者将数
据从 B 总线传输至 A 总线。输出使能 (OE) 输入可用
于禁用输出，从而有效隔离总线。
1
•
通过认证且完全可配置的双电源轨设计可允许各个
端口在 0.65V 至 3.6V 的电源电压范围内运行
工作温度范围 -40°C 至 +125°C
•
•
•
多向控制引脚，支持同步升降转换
从 1.8V 转换到 3.3V 时，支持高达 380Mbps 的转
换速率
SN74AXC8T245 器件旨在使控制引脚（DIR 和 OE）
以 VCCA 为基准。
•
•
•
VCC 隔离功能可在断电情况下有效隔离两条总线
局部断电模式可在断电情况下限制回流电流
该器件完全 适用于 使用 Ioff 的局部断电应用。当器件
断电时，Ioff 电路将会禁用输出。这会抑制电流反流到
器件中，从而防止损坏器件。
兼容 SN74AVC8T245 和 74AVC8T245 电平转换
器
•
•
闩锁性能超出 JESD 78 II 类规范要求的 100mA
V
CC 隔离功能可确保当任一 VCC 输入电源低于 100mV
静电放电 (ESD) 保护性能超过 JESD 22 规范的要
求
时，所有电平转换器输出都将禁用并处于高阻抗状态。
–
–
8000V 人体放电模型
1000V 充电器件模型
为了确保电平转换器 I/O 在上电或断电期间处于高阻抗
状态，应将 OE 通过上拉电阻器接到 VCCA；此电阻器
的最小值由驱动器的灌电流能力决定。
2 应用
器件信息(1)
•
•
•
•
•
•
企业与通信
器件编号
封装
TSSOP (24)
VQFN (24)
UQFN (24)
封装尺寸（标称值）
4.40mm × 7.80mm
3.50mm × 5.50mm
2.00mm × 4.00mm
工业
SN74AXC8T245PW
SN74AXC8T245RHL
SN74AXC8T245RJW
个人电子产品
无线基础设施
楼宇自动化
销售终端
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
3 说明
典型应用原理图
3.3 V
1.5 V
SN74AXC8T245 器件是一款 8 位反相总线收发器，可
用于解决在最新电压节点（0.7V、0.8V 和 0.9V）上运
行的器件与在行业标准电压节点（1.8V、2.5V、
3.3V）上运行的器件之间的电压电平不匹配问题。
Processor
VCCA DIR1 DIR2
VCCB
B1
Power Management
A1
A2
A3
A4
Control Block
B2
B3
B4
B5
B6
B7
B8
SN74AXC8T245
Data Block
Interrupts
Register Map
Sensor Block
A5
A6
A7
A8
器件通过两条独立电源轨（VCCA 和 VCCB）运行，运行
电压可低至 0.65V。数据引脚 A1 至 A8 均用于跟踪
GND
GND
VCCA，可承受 0.65V-3.6V 的电源电压。数据引脚 B1
至 B8 均用于跟踪 VCCB，可承受 0.65V-3.6V 的电源电
压。
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SCES875
SN74AXC8T245
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
www.ti.com.cn
目录
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 6
6.4 Thermal Information.................................................. 6
6.5 Electrical Characteristics........................................... 7
6.6 Switching Characteristics, VCCA = 0.7 V ................... 8
6.7 Switching Characteristics, VCCA = 0.8 V ................... 9
6.8 Switching Characteristics, VCCA = 0.9 V ................. 10
6.9 Switching Characteristics, VCCA = 1.2 V ................. 11
6.10 Switching Characteristics, VCCA = 1.5 V ............... 12
6.11 Switching Characteristics, VCCA = 1.8 V ............... 13
6.12 Switching Characteristics, VCCA = 2.5 V ............... 14
6.13 Switching Characteristics, VCCA = 3.3 V ............... 15
6.14 Operating Characteristics: TA = 25°C ................... 16
Parameter Measurement Information ................ 18
8
9
Detailed Description ............................................ 20
8.1 Overview ................................................................. 20
8.2 Functional Block Diagram ....................................... 20
8.3 Feature Description................................................. 21
8.4 Device Functional Modes........................................ 21
Application and Implementation ........................ 22
9.1 Application Information............................................ 22
9.2 Typical Application ................................................. 22
10 Power Supply Recommendations ..................... 24
11 Layout................................................................... 24
11.1 Layout Guidelines ................................................. 24
11.2 Layout Example .................................................... 24
12 器件和文档支持 ..................................................... 25
12.1 文档支持................................................................ 25
12.2 接收文档更新通知 ................................................. 25
12.3 社区资源................................................................ 25
12.4 商标....................................................................... 25
12.5 静电放电警告......................................................... 25
12.6 术语表 ................................................................... 25
13 机械、封装和可订购信息....................................... 25
7
4 修订历史记录
Changes from Revision A (July 2018) to Revision B
Page
•
•
将数据表状态从“混合生产”更改为“生产数据” .......................................................................................................................... 1
从 RJW 封装中删除了封装预览说明 ...................................................................................................................................... 1
Changes from Original (March 2018) to Revision A
Page
•
已添加 添加了 RJW 作为新的封装选项（预览）.................................................................................................................... 1
2
Copyright © 2018, Texas Instruments Incorporated
SN74AXC8T245
www.ti.com.cn
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
5 Pin Configuration and Functions
PW Package
24-Pin TSSOP
Top View
RHL Package
24-Pin VQFN
Top View
VCCA
DIR1
A1
A2
A3
A4
A5
A6
A7
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
VCCB
VCCB
OE
B1
B2
B3
B4
B5
B6
B7
2
3
23
DIR1
A1
VCCB
22 OE
21
4
A2
B1
B2
B3
B4
B5
B6
B7
B8
5
20
A3
6
19
A4
PAD
7
18
A5
9
16
15
14
13
8
17
A6
A8
DIR2
GND
10
11
12
9
16
A7
B8
GND
10
11
15
A8
14
DIR2
RJW Package
24-Pin UQFN
Top View
1
2
22
DIR1
A1
VCCB
24 23
21
20
19
18
17
16
15
14
13
OE
B1
B2
B3
B4
B5
B6
B7
B8
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
11
12
10
DIR2
Copyright © 2018, Texas Instruments Incorporated
3
SN74AXC8T245
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
www.ti.com.cn
Pin Functions
PIN
I/O
DESCRIPTION
NAME
A1
PW, RHL
RJW
2
3
4
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
Input/output A1. Referenced to VCCA
Input/output A2. Referenced to VCCA
Input/output A3. Referenced to VCCA
Input/output A4. Referenced to VCCA
Input/output A5. Referenced to VCCA
Input/output A6. Referenced to VCCA
Input/output A7. Referenced to VCCA
Input/output A8. Referenced to VCCA
Input/output B1. Referenced to VCCB
Input/output B2. Referenced to VCCB
Input/output B3. Referenced to VCCB
Input/output B4. Referenced to VCCB
Input/output B5. Referenced to VCCB
Input/output B6. Referenced to VCCB
Input/output B7. Referenced to VCCB
Input/output B8. Referenced to VCCB
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
A2
3
A3
5
4
A4
6
5
A5
7
6
A6
8
7
A7
9
8
A8
10
21
20
19
18
17
16
15
14
2
9
B1
20
19
18
17
16
15
14
13
1
B2
B3
B4
B5
B6
B7
B8
DIR1
Direction-control signal. Referenced to VCCA
.
Direction-control signal when both VCCA and VCCB ≥ 1.4 V.
DIR2
GND
11
10
I
Referenced to VCCA. Tie to GND to maintain backward compatibility with
SN74AVC8T245 device.
12
13
11
12
—
—
Ground
Ground
Output Enable. Pull to GND to enable all outputs. Pull to VCCA to place all
OE
22
21
I
outputs in high-impedance mode. Referenced to VCCA
A-port supply voltage. 0.65 V ≤ VCCA ≤ 3.6 V
B-port supply voltage. 0.65 V ≤ VCCB ≤ 3.6 V
B-port supply voltage. 0.65 V ≤ VCCB ≤ 3.6 V
.
VCCA
1
24
22
23
—
—
—
23
24
VCCB
4
Copyright © 2018, Texas Instruments Incorporated
SN74AXC8T245
www.ti.com.cn
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–50
MAX
4.2
UNIT
V
Supply voltage, VCCA
Supply voltage, VCCB
4.2
V
I/O ports (A port)
I/O ports (B port)
Control inputs
A port
4.2
Input voltage, VI(2)
4.2
V
4.2
4.2
Voltage applied to any output
in the high-impedance or power-off state, VO
V
V
(2)
B port
4.2
A port
VCCA + 0.2
VCCB + 0.2
(2) (3)
Voltage applied to any output in the high or low state, VO
B port
Input clamp current, IIK
VI < 0
mA
mA
mA
mA
°C
Output clamp current, IOK
VO < 0
–50
Continuous output current, IO
Continuous current through VCCA, VCCB, or GND
Junction Temperature, TJ
–50
50
–100
100
150
150
Storage temperature, Tstg
–65
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The output positive-voltage rating may be exceeded up to 4.2 V maximum if the output current rating is observed.
6.2 ESD Ratings
VALUE
±8000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Copyright © 2018, Texas Instruments Incorporated
5
SN74AXC8T245
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
www.ti.com.cn
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
(1)(2)(3)
MIN
0.65
MAX
3.6
UNIT
V
VCCA
VCCB
Supply voltage
Supply voltage
0.65
3.6
V
VCCI = 0.65 V - 0.75 V
VCCI = 0.76 V - 1 V
VCCI = 1.1 V - 1.95 V
VCCI = 2.3 V - 2.7 V
VCCI = 3 V - 3.6 V
VCCI × 0.70
VCCI × 0.70
VCCI × 0.65
1.6
Data inputs
2
VIH
High-level input voltage
V
VCCA = 0.65 V - 0.75 V
VCCA = 0.76 V - 1 V
VCCA = 1.1 V - 1.95 V
VCCA = 2.3 V - 2.7 V
VCCA = 3 V - 3.6 V
VCCI = 0.65 V - 0.75 V
VCCI = 0.76 V - 1 V
VCCI = 1.1 V - 1.95 V
VCCI = 2.3 V - 2.7 V
VCCI = 3 V - 3.6 V
VCCA × 0.70
VCCA × 0.70
VCCA × 0.65
1.6
Control inputs
(DIR, OE)
Referenced to VCCA
2
VCCI × 0.30
VCCI × 0.30
VCCI × 0.35
0.7
Data inputs
0.8
VIL
Low-level input voltage
V
VCCA = 0.65 V - 0.75 V
VCCA = 0.76 V - 1 V
VCCA = 1.1 V - 1.95 V
VCCA = 2.3 V - 2.7 V
VCCA = 3 V - 3.6 V
VCCA × 0.30
VCCA × 0.30
VCCA × 0.35
0.7
Control inputs
(DIR, OE)
Referenced to VCCA
0.8
VI
Input voltage(3)
Output voltage
0
0
0
3.6
V
V
(2)
Active state
Tri-state
VCCO
VO
3.6
10
Δt/Δv
Input transition rise or fall rate
Operating free-air temperature
ns/V
°C
TA
–40
125
(1) VCCI is the VCC associated with the input port.
(2) VCCO is the VCC associated with the output port.
(3) All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. See the Implications of Slow or
Floating CMOS Inputs application report.
6.4 Thermal Information
SN74AXC8T245
THERMAL METRIC
PW (TSSOP)
24 PINS
92.0
RHL (VQFN)
24 PINS
35.0
RJW (UQFN)
24 PINS
123.1
65.0
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
29.3
39.9
46.7
13.8
55.3
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
1.5
0.3
3.9
ψJB
46.2
13.8
54.9
RθJC(bot)
N/A
1.4
N/A
6
Copyright © 2018, Texas Instruments Incorporated
SN74AXC8T245
www.ti.com.cn
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
6.5 Electrical Characteristics
Over recommended operating free-air temperature range (unless otherwise noted)(1)
–40°C to 85°C
MIN TYP(2) MAX
VCCO – 0.1
–40°C to 125°C
MIN TYP(2) MAX
PARAMETER
TEST CONDITIONS
VCCA
VCCB
UNIT
IOH = –100 µA
IOH = –50 µA
IOH = –200 µA
IOH = –500 µA
0.7 V - 3.6 V
0.65 V
0.76 V
0.85 V
1.1 V
0.7 V - 3.6 V
0.65 V
0.76 V
0.85 V
1.1 V
VCCO – 0.1
0.55
0.58
0.65
0.85
1.05
1.2
0.55
0.58
0.65
0.85
1.05
1.2
High-level
VOH output
voltage
VI = VIH
IOH = -3 mA
IOH = -6 mA
IOH = -8 mA
IOH = -9 mA
IOH = -12 mA
IOL = 100 µA
IOL = 50 µA
IOL = 200 µA
IOL = 500 µA
IOL = 3 mA
IOL = 6 mA
IOL = 8 mA
IOL = 9 mA
IOL = 12 mA
V
1.4 V
1.4 V
1.65 V
2.3 V
1.65 V
2.3 V
1.75
2.3
1.75
2.3
3 V
3 V
0.7 V - 3.6 V
0.65 V
0.76 V
0.85 V
1.1 V
0.7 V - 3.6 V
0.65 V
0.76 V
0.85 V
1.1 V
0.1
0.1
0.1
0.1
0.18
0.2
0.18
0.2
Low-level
VOL output
voltage
VI = VIL
0.25
0.35
0.45
0.55
0.7
0.25
0.35
0.45
0.55
0.7
V
1.4 V
1.4 V
1.65 V
2.3 V
1.65 V
2.3 V
3 V
3 V
Input leakage Control Inputs (DIR, OE):
II
0.65 V - 3.6 V
0 V
0.65 V - 3.6 V
0 V - 3.6 V
0 V
-0.5
-4
0.5
4
-1
-8
-8
1
8
8
µA
µA
current
VI = VCCA or GND
A Port:
VI or VO = 0 V - 3.6 V
Partial power
down current
Ioff
B Port:
0 V - 3.6 V
-4
4
VI or VO = 0 V - 3.6 V
A Port:
VO = VCCO or GND, VI = VCCI
or GND, OE = VIH
3.6 V
3.6 V
3.6 V
3.6 V
-4
-4
4
-8
-8
8
High-
impedance
state output
current
IOZ
µA
B Port:
VO = VCCO or GND, VI = VCCI
or GND, OE = VIH
4
8
0.65 V - 3.6 V
0 V
0.65 V - 3.6 V
3.6 V
19
40
VCCA supply
current
ICCA
VI = VCCI or GND, IO = 0 mA
-2
-2
-12
-12
µA
µA
3.6 V
0 V
12
18
12
25
38
25
0.65 V - 3.6 V
0 V
0.65 V - 3.6 V
3.6 V
VCCB supply
current
ICCB
VI = VCCI or GND, IO = 0 mA
VI = VCCI or GND, IO = 0 mA
3.6 V
0 V
ICCA Combined
supply
ICCB current
+
0.65 V - 3.6 V
3.3 V
0.65 V - 3.6 V
3.3 V
25
55
µA
pF
pF
Input
Ci
Control Inputs (DIR, OE):
VI = 3.3 V or GND
4.5
5.7
4.5
5.7
capacitance
Ports A and B:
OE = VCCA, VO = 1.65V DC +
1 MHz -16 dBm sine wave
Data I/O
capacitance
Cio
3.3 V
3.3 V
(1) VCCO is the VCC associated with the output port.
(2) All typical values are for TA = 25°C
Copyright © 2018, Texas Instruments Incorporated
7
SN74AXC8T245
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
www.ti.com.cn
6.6 Switching Characteristics, VCCA = 0.7 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
0.7 V ± 0.05 V
MIN
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
MAX
UNIT
MAX
172
172
172
172
192
195
156
157
237
237
223
223
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
114
114
153
153
192
195
129
129
237
237
145
145
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
82
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
49
49
From input A
to output B
82
Propagation
delay
tpd
tdis
ten
ns
126
126
192
195
118
120
237
237
106
106
88
From input B
to output A
88
192
195
120
122
237
237
74
From inputOE
to output A
Disable time
Enable time
ns
ns
From inputOE
to output B
From input OE
to output A
From input OE
to output B
74
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
1.5 V ± 0.1 V
1.8 V ± 0.15 V 2.5 V ± 0.2 V
3.3 V ± 0.3 V
MAX
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
46
MIN
MAX
49
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
61
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
142
142
81
From input A
to output B
46
49
61
Propagation
delay
tpd
tdis
ten
ns
83
82
81
From input B
to output A
83
82
81
81
192
195
69
192
195
66
192
195
67
192
195
150
150
237
237
552
552
From inputOE
to output A
Disable time
Enable time
ns
ns
From inputOE
to output B
70
67
67
237
237
68
237
237
69
237
237
84
From input OE
to output A
From input OE
to output B
68
69
84
8
Copyright © 2018, Texas Instruments Incorporated
SN74AXC8T245
www.ti.com.cn
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
6.7 Switching Characteristics, VCCA = 0.8 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
0.7 V ± 0.05 V
MIN
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
MIN MAX
0.5 32
UNIT
MAX
153
153
114
114
101
103
141
142
102
102
202
202
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
95
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
62
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
From input A
to output B
95
62
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
32
52
Propagation
delay
tpd
ns
95
78
From input B
to output A
95
78
52
101
103
114
115
102
102
124
124
101
103
104
106
102
102
86
101
103
106
109
102
102
52
From inputOE
to output A
tdis
Disable time
Enable time
ns
ns
From inputOE
to output B
From input OE
to output A
ten
From input OE
to output B
86
52
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
1.5 V ± 0.1 V
1.8 V ± 0.15 V 2.5 V ± 0.2 V
3.3 V ± 0.3 V
UNIT
MIN
MAX
26
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
25
MIN
MAX
35
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
25
25
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
From input A
to output B
26
25
35
Propagation
delay
tpd
tdis
ten
ns
42
41
40
40
From input B
to output A
42
41
40
40
101
103
55
101
103
51
101
103
49
101
103
51
From inputOE
to output A
Disable time
Enable time
ns
ns
From inputOE
to output B
57
53
50
52
102
102
44
102
102
43
102
102
45
102
102
58
From input OE
to output A
From input OE
to output B
44
43
45
58
Copyright © 2018, Texas Instruments Incorporated
9
SN74AXC8T245
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
www.ti.com.cn
6.8 Switching Characteristics, VCCA = 0.9 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
MAX
127
127
82
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
78
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
52
MIN
MAX
23
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
From input A
to output B
78
52
23
Propagation
delay
tpd
tdis
ten
ns
63
52
39
From input B
to output A
82
63
52
39
125
128
131
133
124
128
191
191
125
128
105
107
124
128
113
113
125
128
96
125
128
99
From inputOE
to output A
Disable time
Enable time
ns
ns
From inputOE
to output B
98
101
124
128
41
124
128
75
From input OE
to output A
From input OE
to output B
75
41
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
1.5 V ± 0.1 V
1.8 V ± 0.15 V 2.5 V ± 0.2 V
3.3 V ± 0.3 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
17
MIN
MAX
15
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
14
MIN
MAX
17
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
From input A
to output B
17
15
14
17
Propagation
delay
tpd
ns
28
24
22
22
From input B
to output A
28
24
22
22
125
128
47
125
128
44
125
128
40
125
128
73
From inputOE
to output A
tdis
Disable time
Enable time
ns
ns
From inputOE
to output B
50
46
42
73
124
128
34
124
128
32
124
128
31
124
128
35
From input OE
to output A
ten
From input OE
to output B
34
32
31
35
10
Copyright © 2018, Texas Instruments Incorporated
SN74AXC8T245
www.ti.com.cn
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
6.9 Switching Characteristics, VCCA = 1.2 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
MAX
88
MIN
0.5
0.5
0.5
0.5
0.5
0.5
MAX
52
MIN
0.5
0.5
0.5
0.5
0.5
0.5
MAX
MIN
0.5
0.5
0.5
0.5
0.5
0.5
MAX
15
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
39
39
23
23
87
91
From input A
to output B
88
52
15
Propagation
delay
tpd
ns
49
32
15
From input B
to output A
49
32
15
From
inputOE
to output A
87
87
87
91
91
91
Disable
time
tdis
ns
ns
From
inputOE
to output B
–40°C to 85°C
–40°C to 125°C
0.5
0.5
119
121
0.5
0.5
94
96
0.5
0.5
85
88
0.5
0.5
89
93
From input
OE
to output A
–40°C to 85°C
–40°C to 125°C
0.5
0.5
34
36
0.5
0.5
34
36
0.5
0.5
34
36
0.5
0.5
34
36
ten Enable time
From input
OE
to output B
–40°C to 85°C
–40°C to 125°C
0.5
0.5
168
168
0.5
0.5
98
98
0.5
0.5
61
61
0.5
0.5
29
30
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
1.5 V ± 0.1 V
MIN
1.8 V ± 0.15 V 2.5 V ± 0.2 V
3.3 V ± 0.3 V
UNIT
MAX
10
10
13
13
87
91
38
41
34
36
22
23
MIN
MAX
9
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
7
MIN
MAX
7
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
From input A
to output B
9
7
8
Propagation
delay
tpd
ns
11
11
87
91
35
38
34
36
19
20
8
7
From input B
to output A
8
7
87
91
31
33
34
36
17
18
87
91
29
31
34
36
17
18
From inputOE
to output A
tdis
Disable time
Enable time
ns
ns
From inputOE
to output B
From input OE
to output A
ten
From input OE
to output B
Copyright © 2018, Texas Instruments Incorporated
11
SN74AXC8T245
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
www.ti.com.cn
6.10 Switching Characteristics, VCCA = 1.5 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
MAX
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
84
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
42
42
26
26
34
37
89
91
21
23
90
90
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
28
28
17
17
34
37
80
83
21
23
55
55
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
13
13
10
10
34
37
85
89
21
23
24
25
From input A
to output B
84
Propagation
delay
tpd
tdis
ten
ns
46
From input B
to output A
46
34
From inputOE
to output A
37
Disable time
Enable time
ns
ns
115
117
21
From inputOE
to output B
From input OE
to output A
23
159
159
From input OE
to output B
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
1.5 V ± 0.1 V
1.8 V ± 0.15 V 2.5 V ± 0.2 V
3.3 V ± 0.3 V
UNIT
MIN
MAX
9
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
7
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
6
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
5
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
From input A
to output B
9
7
6
6
Propagation
delay
tpd
tdis
ten
ns
9
7
6
5
From input B
to output A
9
8
6
5
34
37
35
38
21
23
17
18
34
37
31
34
21
23
15
15
34
37
28
31
21
23
12
13
34
37
25
27
21
23
11
12
From inputOE
to output A
Disable time
Enable time
ns
ns
From inputOE
to output B
From input OE
to output A
From input OE
to output B
12
Copyright © 2018, Texas Instruments Incorporated
SN74AXC8T245
www.ti.com.cn
ZHCSHG0B –MARCH 2018–REVISED AUGUST 2018
6.11 Switching Characteristics, VCCA = 1.8 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
MAX
82
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
41
41
25
25
37
40
87
89
17
19
88
88
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
24
24
15
15
37
40
78
81
17
19
54
54
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
11
11
9
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
From input A
to output B
82
Propagation
delay
tpd
tdis
ten
ns
49
From input B
to output A
49
9
37
37
40
83
87
17
19
23
23
From inputOE
to output A
40
Disable time
Enable time
ns
ns
113
115
17
From inputOE
to output B
From input OE
to output A
19
157
157
From input OE
to output B
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
1.5 V ± 0.1 V
MIN MAX
0.5
1.8 V ± 0.15 V 2.5 V ± 0.2 V
3.3 V ± 0.3 V
MAX
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
6
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
5
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
8
5
5
From input A
to output B
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
8
7
6
Propagation
delay
tpd
tdis
ten
ns
7
6
5
4
From input B
to output A
7
7
5
4
37
40
33
36
17
19
15
16
37
40
30
33
17
19
13
14
37
40
27
29
17
19
10
11
37
40
57
60
17
19
9
From inputOE
to output A
Disable time
Enable time
ns
ns
From inputOE
to output B
From input OE
to output A
From input OE
to output B
10
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6.12 Switching Characteristics, VCCA = 2.5 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
MAX
81
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
40
40
25
25
25
28
85
87
11
12
86
86
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
22
22
14
14
25
28
76
78
11
12
52
52
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
8
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
From input A
to output B
81
8
Propagation
delay
tpd
tdis
ten
ns
61
7
From input B
to output A
61
7
25
25
28
81
84
11
12
21
21
From inputOE
to output A
28
Disable time
Enable time
ns
ns
111
113
11
From inputOE
to output B
From input OE
to output A
12
155
155
From input OE
to output B
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
1.5 V ± 0.1 V
1.8 V ± 0.15 V 2.5 V ± 0.2 V
3.3 V ± 0.3 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
6
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
5
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
4
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
4
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
From input A
to output B
6
5
5
4
Propagation
delay
tpd
tdis
ten
ns
6
5
4
4
From input B
to output A
6
5
5
4
25
28
31
34
11
12
14
14
25
28
28
31
11
12
11
12
25
28
25
28
11
12
9
25
28
23
25
11
12
7
From inputOE
to output A
Disable time
Enable time
ns
ns
From inputOE
to output B
From input OE
to output A
From input OE
to output B
9
8
14
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6.13 Switching Characteristics, VCCA = 3.3 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
MAX
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
81
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
40
40
35
35
22
24
84
86
9
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
22
22
17
17
22
24
75
78
9
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
7
7
From input A
to output B
81
Propagation
delay
tpd
tdis
ten
ns
142
142
22
7
From input B
to output A
8
22
24
80
83
9
From inputOE
to output A
24
Disable time
Enable time
ns
ns
111
113
9
From inputOE
to output B
From input OE
to output A
10
10
86
86
10
51
51
10
20
20
154
154
From input OE
to output B
B-PORT SUPPLY VOLTAGE (VCCB
)
PARAMETER
TEST CONDITIONS
1.5 V ± 0.1 V
1.8 V ± 0.15 V 2.5 V ± 0.2 V
3.3 V ± 0.3 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
5
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
4
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
4
MIN
MAX
4
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
From input A
to output B
5
4
4
4
Propagation
delay
tpd
tdis
ten
ns
5
5
4
4
From input B
to output A
6
5
4
4
22
24
30
33
9
22
24
27
30
9
22
24
25
27
9
22
24
23
25
9
From inputOE
to output A
Disable time
Enable time
ns
ns
From inputOE
to output B
From input OE
to output A
10
13
14
10
10
11
10
8
10
7
From input OE
to output B
8
7
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6.14 Operating Characteristics: TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
VCCA = VCCB = 0.7 V
1.2
1.8
1.8
1.7
1.7
1.7
2
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
Power dissipation
CL = 0, RL = Open
CpdA capacitance per transceiver
f = 1 MHz, tr = tf = 1 ns
(A to B: outputs enabled)
pF
2.5
1.1
1.8
1.8
1.7
1.7
1.7
2
Power dissipation
CL = 0, RL = Open
CpdA capacitance per transceiver
f = 1 MHz, tr = tf = 1 ns
pF
pF
pF
(A to B: outputs disabled)
2.1
9.3
11.8
11.8
12
Power dissipation
CL = 0, RL = Open
CpdA capacitance per transceiver
f = 1 MHz, tr = tf = 1 ns
(B to A: outputs enabled)
12.2
13
16.4
18.1
2.6
1.2
1.1
1.2
1.2
1.3
1.6
3.9
Power dissipation
CL = 0, RL = Open
CpdA capacitance per transceiver
f = 1 MHz, tr = tf = 1 ns
(B to A: outputs disabled)
16
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Operating Characteristics: TA = 25°C (continued)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
9.3
UNIT
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
11.7
11.8
11.9
12.2
12.9
16.3
18
Power dissipation
CpdB capacitance per transceiver
(A to B: outputs enabled)
CL = 0, RL = Open
f = 1 MHz, tr = tf = 1 ns
pF
2.6
11.7
11.8
11.9
12.2
12.9
16.3
3.9
Power dissipation
CpdB capacitance per transceiver
(A to B: outputs disabled)
CL = 0, RL = Open
f = 1 MHz, tr = tf = 1 ns
pF
pF
pF
1.2
1.8
1.8
Power dissipation
CpdB capacitance per transceiver
(B to A: outputs enabled)
1.7
CL = 0, RL = Open
f = 1 MHz, tr = tf = 1 ns
1.7
1.7
2
2.5
1.1
1.8
1.8
Power dissipation
CpdB capacitance per transceiver
(B to A: outputs disabled)
1.7
CL = 0, RL = Open
f = 1 MHz, tr = tf = 1 ns
1.7
1.7
2
2.1
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7 Parameter Measurement Information
Unless otherwise noted, all input pulses are supplied by generators having the following characteristics:
•
•
•
f =1 MHz
Z0 = 50 Ω
dv / dt ≤ 1 ns/V
Measurement Point
2 X VCCO
Open
S1
RL
Output Pin
Under Test
GND
(1)
CL
RL
(1) CL includes probe and jig capacitance.
图 1. Load Circuit
VCCO
RL
CL
VTP
Parameter
tpd
S1
Open
Open
1.1 V - 3.6 V
2 kꢀ 15 pF
N/A
N/A
0.65 V - 0.95 V 20 kꢀ 15 pF
3 V - 3.6 V 2 kꢀ 15 pF
1.65 V - 2.7 V 2 kꢀ 15 pF
1.1 V - 1.6 V
0.65 V - 0.95 V 20 kꢀ 15 pF
3 V - 3.6 V 2 kꢀ 15 pF
1.65V - 2.7 V 2 kꢀ 15 pF
1.1 V - 1.6 V 2 kꢀ 15 pF
0.65 V - 0.95 V 20 kꢀ 15 pF
2 X VCCO
2 X VCCO
0.3 V
0.15 V
0.1 V
0.1 V
(1)
ten(1), tdis
2 kꢀ 15 pF 2 X VCCO
2 X VCCO
GND
0.3 V
GND
0.15 V
(2)
ten(2), tdis
GND
GND
0.1 V
0.1 V
(1) Output waveform on the conditions that input is driven to a valid Logic Low.
(2) Output waveform on the condition that input is driven to a valid Logic High.
图 2. Load Circuit Conditions
(1)
VCCI
VCCI / 2
VCCI / 2
An, Bn Input
GND
tpd
tpd
(2)
VOH
VCCO / 2
VCCO / 2
Bn, An Output
(2)
VOL
(1) VCCI is the supply pin associated with the input port.
(2) VOH and VOL are typical output voltage levels with specified RL, CL, and S1.
图 3. Propagation Delay
18
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Parameter Measurement Information (接下页)
VCCA
OE
VCCA / 2
VCCA / 2
GND
tdis
ten
(3)
VCCO
Output(1)
Output(2)
VCCO / 2
VOL + VTP
(4)
VOL
(4)
VOH
VOH - VTP
VCCO / 2
GND
(1) Output waveform on the condition that input is driven to a valid Logic Low.
(2) Output waveform on the condition that input is driven to a valid Logic High.
(3) VCCO is the supply pin associated with the output port.
(4) VOH and VOL are typical output voltage levels with specified RL, CL, and S1.
图 4. Enable Time And Disable Time
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8 Detailed Description
8.1 Overview
The SN74AXC8T245 device is an 8-bit, dual-supply non-inverting transceiver with bidirectional voltage level
translation. The I/O pins labeled with A and the control pins (DIR1, DIR2, and OE) are supported by VCCA, and
the I/O pins labeled with B are supported by VCCB. Both the A port and the B port are able to accept I/O voltages
ranging from 0.65 V to 3.6 V.
8.2 Functional Block Diagram
OE
VCCA
Control Block To Enable or
Disable Outputs (Note: Inputs
on each buffer are always
DIR1
VCCB
enabled)
DIR2
GND
B1
B2
B3
B4
B5
B6
B7
B8
A1
A2
A3
A4
A5
A6
A7
A8
20
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8.3 Feature Description
8.3.1 Up-Translation and Down-Translation From 0.65 V to 3.6 V
Both supply pins are configured from 0.65 V to 3.6 V, which makes the device suitable for translating between
any of the low voltage nodes (0.7 V, 0.8 V, 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V).
8.3.2 Multiple Direction Control Pins
Two control pins are used to configure the 8 data I/Os. I/O channels 1 through 4 are grouped together and I/O
channels 5 through 8 are banked together. The benefit of this is to permit simultaneous up-translation and down-
translation within one device. This eliminates the need for multiple devices, where each device can only provide
up-translation or down-translation sequentially. Simultaneous up and down translation is supported when both
VCCA and VCCB are at least 1.40 V.
8.3.3 Ioff Supports Partial-Power-Down Mode Operation
This feature is to limit the leakage current of an I/O pin being driven to a voltage as large as 3.6 V while having
its corresponding power supply rail powered down. This is represented by the Ioff parameter in the Electrical
Characteristics table.
8.4 Device Functional Modes
All control inputs are referenced to VCCA and must be driven to a valid Logic High or Logic Low (that is, not
floating) to assure proper device operation and to prevent excessive power consumption. 表 1 summarizes the
possible modes of device operation based on the configuration of the control inputs.
表 1. Function Table(1)
CONTROL INPUTS
Signal Direction
OE
H
L
DIR1
DIR2
Bits 1:4
Bits 5:8
X
L
X
L
Disabled (Hi-Z)
B to A
L
L
H
L
B to A
A to B
A to B
B to A
L
H
H
A to B
L
H
(1) Input circuits of the data I/Os are always active and must be driven to a valid logic level.
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9 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN74AXC8T245 device can be used in level-translation applications for interfacing devices or systems
operating at different voltage nodes. 图 5 depicts an application in which the SN74AXC8T245 device is up-
translating a 0.7 V input to a 3.3 V output to interface between a system controller and a peripheral device.
9.2 Typical Application
0.7 V
3.3 V
0.1 µF
0.1 µF
10
kΩ
10
kΩ
VCCA
VCCB
OE
DIR1
DIR2
GND
10
kΩ
Controller
SN74AXC8T245
Peripheral
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
图 5. Typical Application Schematic
22
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Typical Application (接下页)
9.2.1 Design Requirements
For this design example, use the parameters listed in 表 2.
表 2. Design Parameters
DESIGN PARAMETERS
Input voltage range
EXAMPLE VALUE
0.65 V to 3.6 V
0.65 V to 3.6 V
Output voltage range
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
•
Input voltage range
–
Use the supply voltage of the device that is driving the SN74AXC8T245 device to determine the input
voltage range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low
the value must be less than the VIL of the input port.
•
Output voltage range
–
Use the supply voltage of the device that the SN74AXC8T245 device is driving to determine the output
voltage range.
9.2.3 Application Curve
图 6. Translation Up (0.7 V to 3.3 V) at 2.5 MHz
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10 Power Supply Recommendations
Always apply a ground reference to the GND pins first. However, there are no additional requirements for power
supply sequencing.
This device was designed with various power supply sequencing methods in mind to help prevent unintended
triggering of downstream devices. For more information regarding the power up glitch performance of the AXC
family of level translators, see the Power Sequencing for AXC Family of Devices application report.
11 Layout
11.1 Layout Guidelines
To assure reliability of the device, follow common printed-circuit board layout guidelines.
•
•
•
Use bypass capacitors on power supplies.
Use short trace lengths to avoid excessive loading.
Place pads on the signal paths for loading capacitors or pullup resistors to help adjust rise and fall times of
signals depending on the system requirements.
11.2 Layout Example
LEGEND
Polygonal Copper Pour
VIA to Power Plane (Inner Layer)
VIA to GND Plane (Inner Layer)
Bypass Capacitor
VCCA
Bypass
Capacitor
1
2
3
4
5
6
7
8
9
VCCA
DIR1
A1
24
23
22
21
20
19
18
17
16
15
14
13
VCCB
VCCB
OE
B1
From Source
From Source
From Source
From Source
From Source
From Source
From Source
From Source
To Destination
A2
To Destination
To Destination
A3
B2
A4
B3
SN74AXC8T245
(PW Package)
To Destination
To Destination
A5
B4
A6
B5
To Destination
To Destination
A7
B6
10
11
12
A8
B7
To Destination
DIR2
GND
B8
GND
图 7. SN74AXC8T245 Device Layout Example
24
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12 器件和文档支持
12.1 文档支持
12.1.1 相关文档
请参阅如下相关文档：
德州仪器 (TI)，《慢速或浮点 CMOS 输入的影响》应用报告
德州仪器 (TI)，《AXC 系列器件电源定序》 应用报告
12.2 接收文档更新通知
要接收文档更新通知，请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册，即可每周接收产
品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
12.3 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
12.4 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
12.6 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
13 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2018, Texas Instruments Incorporated
25
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
SN74AXC8T245PWR
SN74AXC8T245RHLR
SN74AXC8T245RJWR
ACTIVE
ACTIVE
ACTIVE
TSSOP
VQFN
UQFN
PW
RHL
RJW
24
24
24
2000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
AX8T245
NIPDAU
AX8T245
AX8T245
NIPDAUAG
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Jun-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AXC8T245PWR
SN74AXC8T245RHLR
SN74AXC8T245RJWR
TSSOP
VQFN
UQFN
PW
RHL
RJW
24
24
24
2000
3000
3000
330.0
330.0
177.8
16.4
12.4
12.4
6.95
3.8
8.3
5.8
1.6
1.2
8.0
8.0
4.0
16.0
12.0
12.0
Q1
Q1
Q1
2.21
4.22
0.81
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AXC8T245PWR
SN74AXC8T245RHLR
SN74AXC8T245RJWR
TSSOP
VQFN
UQFN
PW
RHL
RJW
24
24
24
2000
3000
3000
356.0
367.0
183.0
356.0
367.0
183.0
35.0
35.0
20.0
Pack Materials-Page 2
PACKAGE OUTLINE
PW0024A
TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
0
0
0
SMALL OUTLINE PACKAGE
SEATING
PLANE
C
6.6
6.2
TYP
A
0.1 C
PIN 1 INDEX AREA
22X 0.65
24
1
2X
7.15
7.9
7.7
NOTE 3
12
B
13
0.30
24X
4.5
4.3
NOTE 4
0.19
1.2 MAX
0.1
C A B
0.25
GAGE PLANE
0.15
0.05
(0.15) TYP
SEE DETAIL A
0.75
0.50
0 -8
A
20
DETAIL A
TYPICAL
4220208/A 02/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0024A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
SYMM
24X (1.5)
(R0.05) TYP
24
1
24X (0.45)
22X (0.65)
SYMM
12
13
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
(PREFERRED)
SOLDER MASK DETAILS
4220208/A 02/2017
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0024A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
24X (1.5)
SYMM
(R0.05) TYP
24
1
24X (0.45)
22X (0.65)
SYMM
12
13
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4220208/A 02/2017
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
VQFN - 1 mm max height
RHL0024A
PLASTIC QUAD FLATPACK- NO LEAD
A
3.6
3.4
B
PIN 1 INDEX AREA
5.6
5.4
C
1 MAX
SEATING PLANE
0.08 C
0.05
0.00
2.05±0.1
2X 1.5
SYMM
0.5
0.3
24X
(0.1) TYP
13
12
18X 0.5
11
14
21
SYMM
2X
4.05±0.1
4.5
23
2
0.30
24X
0.18
0.1
0.05
24
1
PIN 1 ID
(OPTIONAL)
C A B
C
4X (0.2)
2X (0.55)
4225250/A 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
VQFN - 1 mm max height
RHL0024A
PLASTIC QUAD FLATPACK- NO LEAD
(3.3)
(2.05)
2X (1.5)
SYMM
1
24
24X (0.6)
24X (0.24)
2X (0.4)
23
2
18X (0.5)
2X (1.105)
6X (0.67)
(4.05)
25
SYMM
4.6
4.4
(5.3)
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
(Ø 0.2) VIA
TYP
(R0.05) TYP
11
14
13
12
4X
(0.775)
4X (0.2)
2X (0.55)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 18X
SOLDER MASK
OPENING
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
EXPOSED METAL
EXPOSED METAL
METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4225250/A 09/2019
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
VQFN - 1 mm max height
RHL0024A
PLASTIC QUAD FLATPACK- NO LEAD
(3.3)
(2.05)
2X (1.5)
SYMM
SOLDER MASK EDGE
TYP
1
24
24X (0.6)
24X (0.24)
23
2
18X (0.5)
25
SYMM
4.6
4.4
(5.3)
4X
(1.34)
METAL TYP
(R0.05) TYP
11
14
13
12
2X (0.84)
6X (0.56)
4X (0.2)
2X (0.55)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
80% PRINTED COVERAGE BY AREA
SCALE: 18X
4225250/A 09/2019
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
GENERIC PACKAGE VIEW
RJW 24
2 x 4, 0.4 mm pitch
UQFN - 0.55 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4228367/A
www.ti.com
PACKAGE OUTLINE
RJW0024A
UQFN - 0.55 mm max height
SCALE 4.300
PLASTIC QUAD FLATPACK - NO LEAD
2.1
1.9
B
A
PIN 1 INDEX AREA
4.1
3.9
C
0.55 MAX
SEATING PLANE
0.05 C
0.05
0.00
2X 0.4
(0.1) TYP
11
12
10
0.6
0.5
13
4X
SYMM
2X
3.6
1
22
24
8X
23
0.25
0.15
20X 0.4
24X
SYMM
0.1
C A B
C
0.85
0.75
12X
0.05
0.55
0.45
4223932/B 04/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
RJW0024A
UQFN - 0.55 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
SYMM
24
12X 1
8X (0.7)
23
1
22
24X (0.2)
20X (0.4)
SYMM
(3.65)
(R0.05) TYP
13
10
(4X 0.75)
11
(1.4)
12
(1.7)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:20X
0.0375 MAX
ALL AROUND
0.0375 MIN
ALL AROUND
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
METAL
UNDER
SOLDER MASK
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4223932/B 04/2018
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
RJW0024A
UQFN - 0.55 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
SYMM
24
23
12X 0.95
8X
(0.65)
1
22
24X (0.2)
20X (0.4)
SYMM
(3.7)
(R0.05) TYP
EXPOSED METAL
TYP
13
10
4X (0.7)
11
(1.45)
12
(1.75)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICKNESS
SCALE: 25X
4223932/B 04/2018
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
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保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务，TI 对此概不负责。
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TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2022，德州仪器 (TI) 公司
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