SN74BCT374N-10 [TI]
BCT/FBT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20;
| 型号： | SN74BCT374N-10 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | BCT/FBT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20 驱动 信息通信管理 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总19页 (文件大小：866K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54BCT374, SN74BCT374
OCTAL EDGE-TRIGGERED D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS019C – SEPTEMBER 1988 – REVISED MARCH 2003
Operating Voltage Range of 4.5 V to 5.5 V
State-of-the-Art BiCMOS Design
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
Significantly Reduces I
ESD Protection Exceeds JESD 22
CCZ
– 2000-V Human-Body Model (A114-A)
Full Parallel Access for Loading
Buffered Control Inputs
SN54BCT374 . . . J OR W PACKAGE
SN74BCT374 . . . DW, N, OR NS PACKAGE
(TOP VIEW)
SN54BCT374 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
3
2
1
20 19
18
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
4
5
6
7
8
17
16
15
14
9 10 11 12 13
GND
description/ordering information
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight flip-flops of the ’BCT374 devices are edge-triggered D-type flip-flops. On the positive transition of the
clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without
need for interface or pullup components. The output-enable (OE) input does not affect internal operations of
the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance
state.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP – N
Tube
SN74BCT374N
SN74BCT374N
Tube
SN74BCT374DW
SN74BCT374DWR
SN74BCT374NSR
SNJ54BCT374J
SNJ54BCT374W
SNJ54BCT374FK
0°C to 70°C
SOIC – DW
BCT374
Tape and reel
Tape and reel
Tube
SOP – NS
CDIP – J
BCT374
SNJ54BCT374J
SNJ54BCT374W
SNJ54BCT374FK
–55°C to 125°C
CFP – W
LCCC – FK
Tube
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT374, SN74BCT374
OCTAL EDGE-TRIGGERED D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS019C – SEPTEMBER 1988 – REVISED MARCH 2003
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
Q
OE
L
CLK
D
H
L
↑
↑
H
L
L
L
H or L
X
X
X
Q
0
H
Z
logic diagram (positive logic)
1
OE
11
CLK
C1
1D
2
1Q
3
1D
To Seven Other Channels
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Voltage range applied to any output in the disabled or power-off state, V . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
O
Voltage range applied to any output in the high state, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
CC
Input clamp current, I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA
IK
Current into any output in the low state: SN54BCT374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74BCT374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Package thermal impedance, θ (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT374, SN74BCT374
OCTAL EDGE-TRIGGERED D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS019C – SEPTEMBER 1988 – REVISED MARCH 2003
recommended operating conditions (see Note 3)
SN54BCT374
MIN NOM MAX
SN74BCT374
MIN NOM MAX
UNIT
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input clamp current
0.8
–18
–2
0.8
–18
–15
64
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
Operating free-air temperature
OH
OL
48
T
A
–55
125
0
70
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54BCT374
SN74BCT374
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
= 4.5 V,
= 4.5 V
I = –18 mA
–1.2
–1.2
V
IK
CC
I
I
I
I
I
I
= –3 mA
= –12 mA
= –15 mA
= 48 mA
= 64 mA
2.4
2
3.3
3.2
2.4
2
3.3
3.1
OH
OH
OH
OL
OL
V
OH
V
CC
0.38
0.55
V
OL
V
CC
= 4.5 V
V
0.42
0.55
0.4
20
I
I
I
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V
= 5.5 V
= 5.5 V
= 5 V,
V = 5.5 V
I
0.4
20
mA
µA
I
V = 2.7 V
I
IH
IL
V = 0.5 V
I
–0.6
–225
50
–0.6
–225
50
mA
mA
µA
‡
V
O
V
O
V
O
= 0
–100
–100
OS
= 2.7 V
= 0.5 V
OZH
OZL
CCL
CCH
CCZ
–50
60
–50
60
µA
37
2
37
2
mA
mA
mA
pF
5
5
5
8
5
8
C
C
V = 2.5 V or 0.5 V
I
6
6
i
= 5 V,
V
O
= 2.5 V or 0.5 V
10
10
pF
o
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT374, SN74BCT374
OCTAL EDGE-TRIGGERED D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS019C – SEPTEMBER 1988 – REVISED MARCH 2003
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
V
T
= 5 V,
= 25°C
CC
A
SN54BCT374 SN74BCT374
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
f
t
t
t
Clock frequency
70
70
70
MHz
ns
clock
Pulse duration
CLK high
7
6.5
0
8
6.5
0
7
6.5
0
w
Data high or low
Data high or low
ns
Setup time before CLK↑
Hold time after CLK↑
su
h
ns
switching characteristics (see Figure 1)
V
C
= 5 V,
= 50 pF,
V
= 4.5 V to 5.5 V,
C = 50 pF,
L
CC
L
CC
R1 = 500 Ω,
R2 = 500 Ω,
T
A
R1 = 500 Ω,
R2 = 500 Ω,
†
T = MIN to MAX
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
= 25°C
’BCT374
SN54BCT374 SN74BCT374
MIN
70
2
TYP
MAX
MIN
70
2
MAX
MIN
70
2
MAX
f
t
t
t
t
t
t
MHz
ns
max
PLH
PHL
PZH
PZL
PHZ
PLZ
7.2
7.1
8.3
8.6
4.7
4.8
9.1
8.8
11.6
10.6
12.7
13
10.6
10
CLK
Q
Q
Q
2
2
2
1
10.1
10.6
6.3
1
1
12.3
12.7
6.8
ns
ns
OE
OE
1
1
1
1
1
7.1
1
1
6.3
1
7.5
1
6.8
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT374, SN74BCT374
OCTAL EDGE-TRIGGERED D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS019C – SEPTEMBER 1988 – REVISED MARCH 2003
PARAMETER MEASUREMENT INFORMATION
7 V (t
, t
, O.C.)
PZL PLZ
Open
(all others)
S1
From Output
Under Test
Test
Point
C
L
R1
R1
(see Note A)
From Output
Under Test
Test
Point
C
L
R2
(see Note A)
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
R
= R1 = R2
L
LOAD CIRCUIT FOR
3-STATE AND OPEN-COLLECTOR OUTPUTS
High-Level
Pulse
(see Note B)
3 V
0 V
1.5 V
1.5 V
3 V
Timing Input
(see Note B)
1.5 V
t
w
0 V
3 V
0 V
3 V
0 V
t
h
Low-Level
Pulse
t
1.5 V
su
1.5 V
Data Input
(see Note B)
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
Output
Control
(low-level enable)
3 V
1.5 V
1.5 V
Input
(see Note B)
1.5 V
1.5 V
0 V
PHL
t
t
PZL
t
t
PLZ
t
PLH
3.5 V
In-Phase
Output
(see Note D)
V
OH
1.5 V
Waveform 1
(see Notes C and D)
1.5 V
1.5 V
1.5 V
t
V
OL
V
OL
0.3 V
t
PHZ
PLH
t
PHL
PZH
V
OH
V
OH
Out-of-Phase
Output
(see Note D)
Waveform 2
(see Notes C and D)
1.5 V
1.5 V
0.3 V
0 V
V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (see Note D)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, t = t ≤ 2.5 ns, duty cycle = 50%.
r
f
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
E. When measuring propagation delay times of 3-state outputs, switch S1 is open.
F. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9051601M2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9051601M2A
SNJ54BCT
374FK
5962-9051601MRA
5962-9051601MSA
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
1
1
TBD
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
5962-9051601MR
A
SNJ54BCT374J
W
Call TI
5962-9051601MS
A
SNJ54BCT374W
SN74BCT374DBLE
SN74BCT374DBR
OBSOLETE
ACTIVE
SSOP
SSOP
DB
DB
20
20
Call TI
Call TI
0 to 70
0 to 70
2000
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
BT374
SN74BCT374DW
SN74BCT374DWE4
SN74BCT374DWG4
SN74BCT374N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
SO
DW
DW
DW
N
20
20
20
20
20
20
20
20
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
POST-PLATE
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
-55 to 125
BCT374
25
Green (RoHS
& no Sb/Br)
BCT374
25
Green (RoHS
& no Sb/Br)
BCT374
20
Pb-Free
(RoHS)
SN74BCT374N
SN74BCT374N
BCT374
SN74BCT374NE4
SN74BCT374NSR
SN74BCT374NSRE4
SN74BCT374NSRG4
SNJ54BCT374FK
N
20
Pb-Free
(RoHS)
N / A for Pkg Type
NS
NS
NS
FK
2000
2000
2000
1
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
SO
Green (RoHS
& no Sb/Br)
BCT374
SO
Green (RoHS
& no Sb/Br)
BCT374
LCCC
TBD
5962-
9051601M2A
SNJ54BCT
374FK
SNJ54BCT374J
ACTIVE
CDIP
J
20
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9051601MR
A
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SNJ54BCT374J
SNJ54BCT374W
ACTIVE
CFP
W
20
1
TBD
Call TI
N / A for Pkg Type
-55 to 125
5962-9051601MS
A
SNJ54BCT374W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54BCT374, SN74BCT374 :
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Catalog: SN74BCT374
•
Military: SN54BCT374
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
•
Military - QML certified for Military and Defense Applications
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74BCT374DBR
SN74BCT374NSR
SSOP
SO
DB
NS
20
20
2000
2000
330.0
330.0
16.4
24.4
8.2
8.2
7.5
2.5
2.5
12.0
12.0
16.0
24.0
Q1
Q1
13.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74BCT374DBR
SN74BCT374NSR
SSOP
SO
DB
NS
20
20
2000
2000
367.0
367.0
367.0
367.0
38.0
45.0
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
Automotive and Transportation www.ti.com/automotive
Communications and Telecom www.ti.com/communications
Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
www.ti.com/computers
www.ti.com/consumer-apps
www.ti.com/energy
dsp.ti.com
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
www.ti.com/industrial
www.ti.com/medical
Medical
Logic
Security
www.ti.com/security
Power Mgmt
Microcontrollers
RFID
power.ti.com
Space, Avionics and Defense
Video and Imaging
www.ti.com/space-avionics-defense
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/omap
OMAP Applications Processors
Wireless Connectivity
TI E2E Community
e2e.ti.com
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明