SN74BCT756DW [TI]
OCTAL BUFFER/DRIVER WITH OPEN-COLLECTOR OUTPUTS; 八路缓冲器/驱动器，集电极开路输出
| 型号： | SN74BCT756DW |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUFFER/DRIVER WITH OPEN-COLLECTOR OUTPUTS |
| 文件： | 总5页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74BCT756
OCTAL BUFFER/DRIVER
WITH OPEN-COLLECTOR OUTPUTS
SCBS056B – OCTOBER 1990 – REVISED JULY 1997
DW OR N PACKAGE
(TOP VIEW)
BiCMOS Design Significantly Reduces I
ESD Protection Exceeds 2000 V Per
CCZ
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
2OE
1Y1
2A4
1Y2
2A3
1Y3
Open-Collector Outputs Drive Bus Lines or
Buffer Memory Address Registers
Package Options Include Plastic
Small-Outline Packages (DW) and Standard
Plastic 300-mil DIPs (N)
13 2A2
12 1Y4
description
11
2A1
This octal buffer and line driver is designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. The SN74BCT756, SN74BCT757,
and SN74BCT760 provide the choice of selected
combinations of inverting outputs, symmetrical
output-enable (OE) inputs, and complementary
OE and OE inputs.
The SN74BCT756 is characterized for operation
from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OUTPUT
Y
OE
A
X
L
H
L
L
H
H
L
H
†
logic symbol
1
19
EN
1OE
2OE
EN
2
18
11
13
15
17
9
7
5
3
1A1
4
1Y1
1Y2
1Y3
1Y4
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
16
14
12
1A2
6
1A3
8
1A4
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74BCT756
OCTAL BUFFER/DRIVER
WITH OPEN-COLLECTOR OUTPUTS
SCBS056B – OCTOBER 1990 – REVISED JULY 1997
logic diagram (positive logic)
1
19
11
13
15
17
1OE
2OE
2A1
2A2
2A3
2A4
18
16
14
12
9
7
5
3
2
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
1A1
4
1A2
6
1A3
8
1A4
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Input current range, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA to 5 mA
I
Voltage range applied to any output in the disabled or power-off state, V . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
O
Voltage range applied to any output in the high state, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
O
CC
Package thermal impedance, θ (see Note 1): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions
MIN NOM
MAX
UNIT
V
V
V
V
V
Supply voltage
4.5
2
5
5.5
CC
High-level input voltage
Low-level input voltage
High-level output voltage
Input clamp current
V
IH
0.8
5.5
–18
64
V
IL
V
OH
I
I
mA
mA
°C
IK
Low-level output current
Operating free-air temperature
OL
T
A
0
70
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74BCT756
OCTAL BUFFER/DRIVER
WITH OPEN-COLLECTOR OUTPUTS
SCBS056B – OCTOBER 1990 – REVISED JULY 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
I = –18 mA
MIN TYP
MAX
–1.2
0.1
0.55
0.1
20
UNIT
V
V
IK
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.5 V,
= 4.5 V,
= 4.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
I
I
V
= 5.5 V
mA
V
OH
OH
= 64 mA
V
OL
I
0.42
OL
V = 7 V
I
I
I
mA
µA
mA
I
I
V = 2.7 V
I
IH
IL
V = 0.5 V
I
–1
Outputs high
Outputs low
OE disable
21
55
6
33
I
V
CC
= 5.5 V,
Outputs open
86
mA
CC
10
C
C
V
V
= 5 V,
= 5 V,
V = 2.5 V or 0.5 V
6
pF
pF
i
CC
I
V = 2.5 V or 0.5 V
I
10
o
CC
†
All typical values are at V
= 5 V, T = 25°C.
A
CC
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)
L
V
C
= 5 V,
= 50 pF,
V
= 4.5 to 5.5 V,
C = 50 pF,
L
CC
L
CC
R1 = 500 Ω,
R2 = 500 Ω,
T
A
R1 = 500 Ω,
R2 = 500 Ω,
‡
T = MIN to MAX
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
= 25°C
TYP
8.5
MIN
MAX
10.5
4.1
MIN
6.2
0.5
8.2
3.4
MAX
11.3
4.2
t
t
t
t
6.2
0.5
8.2
3.4
PLH
PHL
PLH
PHL
A
Y
Y
ns
ns
2
12.5
6.8
14.8
9.2
16.5
10.3
OE
‡
For conditions as MIN or MAX, use the appropriate value specified under recommended operating conditions.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74BCT756
OCTAL BUFFER/DRIVER
WITH OPEN-COLLECTOR OUTPUTS
SCBS056B – OCTOBER 1990 – REVISED JULY 1997
PARAMETER MEASUREMENT INFORMATION
7 V
(t
, t
, O.C.)
PZL PLZ
Open
(all others)
S1
R1
From Output
Under Test
Test
Point
C
L
R2
(see Note A)
R
= R1 = R2
L
LOAD CIRCUIT
3 V
0 V
3 V
0 V
High-Level
Pulse
1.5 V
Timing Input
Data Input
1.5 V
1.5 V
1.5 V
1.5 V
t
h
t
t
w
su
3 V
0 V
3 V
0 V
Low-Level
Pulse
1.5 V
1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
Output
Control
(low-level
enable)
3 V
3 V
0 V
1.5 V
1.5 V
1.5 V
1.5 V
Input
0 V
t
t
t
PZL
PLZ
PHZ
t
t
t
PHL
PLH
V
3.5 V
Output
Waveform 1
(see Note B)
OH
In-Phase
Output
1.5 V
1.5 V
1.5 V
t
1.5 V
V
OL
V
OL
0.3 V
0.3 V
t
PZH
PHL
PLH
V
V
Output
Waveform 2
(see Note B)
V
OH
OH
Out-of-Phase
Output
1.5 V
1.5 V
0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, t = t ≤ 2.5 ns, duty cycle = 50%.
r
f
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
相关型号：
SN74BCT756DWE4
BCT/FBT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, GREEN, PLASTIC, SOIC-20
TI
SN74BCT756DWG4
BCT/FBT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, GREEN, PLASTIC, SOIC-20
TI
SN74BCT756DWR
BCT/FBT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, GREEN, PLASTIC, SOIC-20
TI
SN74BCT756DWRG4
BCT/FBT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, GREEN, PLASTIC, SOIC-20
TI
SN74BCT756NE4
BCT/FBT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDIP20, 0.300 INCH, ROHS COMPLIANT, MS-001AD, DIP-20
TI
SN74BCT757NE4
BCT/FBT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDIP20, 0.300 INCH, PLASTIC, DIP-20
TI
©2020 ICPDF网 联系我们和版权申明