SN74CBT16214 [TI]
12-BIT 1-OF-3 FET MULTIPLEXER/DEMULTIPLEXER; 12位1 - OF- 3 FET复用器/解复用器型号: | SN74CBT16214 |
厂家: | TEXAS INSTRUMENTS |
描述: | 12-BIT 1-OF-3 FET MULTIPLEXER/DEMULTIPLEXER |
文件: | 总5页 (文件大小:81K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN74CBT16214
12-BIT 1-OF-3 FET MULTIPLEXER/DEMULTIPLEXER
SCDS008I – MAY 1993 – REVISED MAY 1998
DGG OR DL PACKAGE
5-Ω Switch Connection Between Two Ports
(TOP VIEW)
TTL-Compatible Input Levels
Package Options Include Plastic Thin
Shrink Small-Outline (DGG) and 300-mil
Shrink Small-Outline (DL) Packages
S0
1A
S1
1
2
3
4
5
6
7
8
9
56
55
54
53
52
51
50
S2
1B3
2A
1B1
1B2
2B1
2B2
3B1
description
2B3
3A
The SN74CBT16214 provides 12 bits of
high-speed TTL-compatible bus switching
between three separate ports. The low on-state
resistance of the switch allows connections to be
made with minimal propagation delay.
3B3
GND
4A
49 GND
48 3B2
47 4B1
46 4B2
45 5B1
4B3 10
5A 11
The device operates as a 12-bit bus-select switch
via the data-select (S0–S2) terminals.
5B3 12
6A 13
6B3 14
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
5B2
6B1
The SN74CBT16214 is characterized for
operation from –40°C to 85°C.
15
16
17
18
19
20
21
22
23
24
25
26
27
28
7A
6B2
7B3
7B1
V
7B2
CC
8A
8B1
GND
8B3
9A
GND
8B2
9B1
9B3
10A
10B3
11A
9B2
10B1
10B2
11B1
11B2
12B1
12B2
11B3
12A
12B3
FUNCTION TABLE
INPUTS
INPUT/OUTPUT
A
FUNCTION
S2
L
S1
L
S0
L
Z
Disconnect
A port = B1 port
A port = B2 port
Disconnect
L
L
H
L
B1
B2
Z
L
H
H
L
L
H
L
H
H
H
H
Z
Disconnect
L
H
L
B3
B1
B2
A port = B3 port
A port = B1 port
A port = B2 port
H
H
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBT16214
12-BIT 1-OF-3 FET MULTIPLEXER/DEMULTIPLEXER
SCDS008I – MAY 1993 – REVISED MAY 1998
logic diagram (positive logic)
2
54
53
3
1B1
1B2
1B3
1A
27
30
29
28
12A
12B1
12B2
12B3
1
S0
56
S1
55
S2
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
IK
I
Package thermal impedance, θ (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C
JA
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBT16214
12-BIT 1-OF-3 FET MULTIPLEXER/DEMULTIPLEXER
SCDS008I – MAY 1993 – REVISED MAY 1998
recommended operating conditions (see Note 3)
MIN
4
MAX
UNIT
V
V
V
V
Supply voltage
5.5
CC
IH
IL
High-level control input voltage
Low-level control input voltage
Operating free-air temperature
2
V
0.8
85
V
T
A
–40
°C
NOTE 3: All unused control inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
I = –18 mA
MIN TYP
MAX
–1.2
10
UNIT
V
V
V
V
V
V
= 4.5 V,
= 0,
V
IK
CC
CC
CC
CC
CC
I
V = 5.5 V
I
I
I
µA
= 5.5 V,
= 5.5 V,
= 5.5 V,
V = 5.5 V or GND
I
±1
I
I
O
= 0,
V = V
I
or GND
3
µA
mA
pF
CC
CC
‡
∆I
CC
Control inputs
One input at 3.4 V,
A = Z
Other inputs at V
or GND
2.5
CC
C
C
Control inputs V = 3 V or 0
4
i
I
V
O
= 3 V or 0,
7.5
pF
io(OFF)
V
= 4 V,
CC
V = 2.4 V,
I
I = 15 mA
I
TYP at V
= 4 V
CC
§
r
on
I = 64 mA
I
4
4
6
7
7
Ω
V = 0
I
V
CC
= 4.5 V
I = 30 mA
I
V = 2.4 V,
I
I = 15 mA
I
12
†
‡
§
All typical values are at V
= 5 V (unless otherwise noted), T = 25°C.
A
CC
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
or GND.
CC
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lower of the voltages of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
V
= 5 V
CC
± 0.5 V
V
= 4 V
FROM
(INPUT)
TO
(OUTPUT)
CC
PARAMETER
UNIT
MIN
MAX
MIN
MAX
0.25
13.9
14.5
11.7
¶
A or B
B or A
B or A
A or B
A or B
0.35
15.3
16
ns
ns
ns
ns
t
t
t
t
pd
pd
en
dis
S
S
S
5.5
5.1
3.6
12.1
¶
Thepropagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBT16214
12-BIT 1-OF-3 FET MULTIPLEXER/DEMULTIPLEXER
SCDS008I – MAY 1993 – REVISED MAY 1998
PARAMETER MEASUREMENT INFORMATION
7 V
Open
TEST
S1
S1
500 Ω
t
pd
/t
Open
7 V
From Output
Under Test
t
GND
PLZ PZL
t
/t
Open
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
3 V
0 V
Output
Control
(low-level
enabling)
1.5 V
1.5 V
LOAD CIRCUIT
t
t
PZL
t
PLZ
Output
Waveform 1
S1 at 7 V
3.5 V
3 V
0 V
1.5 V
Input
1.5 V
1.5 V
V
OL
+ 0.3 V
V
OL
(see Note B)
t
PHZ
t
t
PHL
PZH
PLH
Output
Waveform 2
S1 at Open
(see Note B)
V
OH
V
V
OH
V
OH
– 0.3 V
0 V
1.5 V
Output
1.5 V
1.5 V
OL
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
C includes probe and jig capacitance.
L
ENABLE AND DISABLE TIMES
NOTES: A.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
PHL
are the same as t
.
dis
PLZ
PZL
PLH
PHZ
PZH
are the same as t
.
en
are the same as t .
pd
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
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BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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