SN74CBT16292DGVR [TI]
12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER WITH INTERNAL PULLDOWN RESISTORS;型号: | SN74CBT16292DGVR |
厂家: | TEXAS INSTRUMENTS |
描述: | 12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER WITH INTERNAL PULLDOWN RESISTORS 光电二极管 逻辑集成电路 |
文件: | 总12页 (文件大小:337K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN74CBT16292
12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
WITH INTERNAL PULLDOWN RESISTORS
SCDS053E – MARCH 1998 – REVISED OCTOBER 2000
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
Member of Texas Instruments’ Widebus
Family
4-Ω Switch Connection Between Two Ports
TTL-Compatible Control Input Levels
Make-Before-Break Feature
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
S
1A
NC
2A
NC
3A
NC
GND
4A
NC
5A
NC
6A
NC
7A
NC
NC
NC
2
3
1B1
1B2
2B1
2B2
3B1
GND
3B2
4B1
4B2
5B1
5B2
6B1
6B2
7B1
7B2
8B1
GND
8B2
9B1
9B2
10B1
10B2
11B1
11B2
12B1
12B2
4
Internal 500-Ω Pulldown Resistors to
Ground
5
6
Latch-Up Performance Exceeds 250 mA Per
JESD 17
7
8
9
description
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
The SN74CBT16292 is a 12-bit 1-of-2 high-speed
TTL-compatible FET multiplexer/demultiplexer.
The low on-state resistance of the switch allows
connections to be made with minimal propagation
delay.
When the select (S) input is low, port A is
V
connected to port B1, and R
is connected to
CC
INT
8A
GND
NC
9A
NC
10A
NC
11A
NC
12A
NC
portB2. WhenSishigh, portAisconnectedtoport
B2, and R is connected to port B1.
INT
NC – No internal connection
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
Tube
SN74CBT16292DL
SSOP – DL
CBT16292
Tape and reel SN74CBT16292DLR
Tape and reel SN74CBT16292DGGR
Tape and reel SN74CBT16292DGVR
–40°C to 85°C
TSSOP – DGG
TVSOP – DGV
CBT16292
CY292
†
Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBT16292
12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
WITH INTERNAL PULLDOWN RESISTORS
SCDS053E – MARCH 1998 – REVISED OCTOBER 2000
FUNCTION TABLE
INPUT
FUNCTION
S
A port = B1 port
L
R
= B2 port
INT
A port = B2 port
= B1 port
H
R
INT
logic diagram (positive logic)
2
54
1A
1B1
R
INT
R
INT
53
30
1B2
27
12A
12B1
R
INT
R
INT
29
12B2
1
S
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBT16292
12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
WITH INTERNAL PULLDOWN RESISTORS
SCDS053E – MARCH 1998 – REVISED OCTOBER 2000
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
IK
I
Package thermal impedance, θ (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
JA
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN
4
MAX
UNIT
V
V
V
V
Supply voltage
5.5
CC
IH
IL
High-level control input voltage
Low-level control input voltage
Operating free-air temperature
2
V
0.8
85
V
T
A
–40
°C
NOTE 3: All unused control inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
‡
PARAMETER
TEST CONDITIONS
I = –18 mA
MIN TYP
MAX
–1.2
±5
UNIT
V
V
IK
V
V
V
V
= 4.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
CC
CC
CC
CC
I
I
I
V = V
or GND
µA
µA
mA
pF
I
I
CC
= 0,
I
O
V = V
I
or GND
3
CC
CC
§
∆I
CC
Control input
Control input
One input at 3.4 V,
Other inputs at V
or GND
2.5
CC
C
C
V = 3 V or 0
I
3
8
i
V
= 0,
V = 3 V or 0
O
pF
io
CC
CC
V
= 4 V,
V = 2.4 V,
I
I = 15 mA
I
10
20
TYP at V
= 4 V
CC
¶
r
on
I = 64 mA
I
3
3
5
7
7
Ω
V = 0
I
V
CC
= 4.5 V
I = 30 mA
I
V = 2.4 V,
I
I = 15 mA
I
15
‡
§
¶
All typical values are at V
= 5 V (unless otherwise noted), T = 25°C.
A
CC
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
or GND.
CC
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lower of the voltages of the two (A or B) terminals.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBT16292
12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
WITH INTERNAL PULLDOWN RESISTORS
SCDS053E – MARCH 1998 – REVISED OCTOBER 2000
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
V
= 5 V
CC
± 0.5 V
V
= 4 V
FROM
(INPUT)
TO
(OUTPUT)
CC
PARAMETER
UNIT
MIN
MAX
MIN
MAX
0.25
6
†
A or B
B or A
A or B
A or B
0.5
6.8
7
ns
ns
ns
t
t
t
pd
en
dis
S
S
1
1
6.3
†
Thepropagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
V = 5 V
CC
± 0.5 V
V
CC
= 4 V
PARAMETER
DESCRIPTION
UNIT
MIN
MAX
MIN
MAX
‡
t
Make-before-break time
0
2
0
2
ns
mbb
‡
The make-before-break time is the time interval between make and break, during the transition from one selected port to the other.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBT16292
12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
WITH INTERNAL PULLDOWN RESISTORS
SCDS053E – MARCH 1998 – REVISED OCTOBER 2000
PARAMETER MEASUREMENT INFORMATION
7 V
Open
TEST
S1
S1
500 Ω
t
Open
7 V
pd
/t
From Output
Under Test
t
PZL PLZ
/t
GND
t
Open
PZH PHZ
C
= 50 pF
L
500 Ω
(see Note A)
3 V
0 V
Output
Control
1.5 V
1.5 V
LOAD CIRCUIT
t
t
PLZ
PZL
Output
Waveform 1
S1 at 7 V
2.3 V
3 V
0 V
1.2 V
Input
1.5 V
1.5 V
V
OL
+ 0.3 V
(see Note B)
V
OL
t
t
t
t
PLH
PHL
PZH
PHZ
Output
Waveform 2
S1 at Open
(see Note B)
2.3 V
0 V
V
OH
V
OH
– 0.3 V
1.2 V
Output
1.5 V
1.5 V
V
OL
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
C includes probe and jig capacitance.
L
ENABLE AND DISABLE TIMES
NOTES: A.
B. Waveform 1 is for an output with internal conditions such that the output is low except when connected to the internal 500-Ω
pulldown resistor. Waveform 2 is for an output with internal conditions such that the output is high except when connected to the
internal 500-Ω pulldown resistor.
C. All pulse inputs and DC inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω,
O
t ≤ 2.5 ns, t ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
r
f
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t . Z = R
= 500 Ω
= 500 Ω
PLZ
PZL
PLH
PHZ
PZH
PHL
dis
INT
INT
are the same as t . Z = R
en
are the same as t
.
pd
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
27-Sep-2007
PACKAGING INFORMATION
Orderable Device
74CBT16292DGGRE4
74CBT16292DGGRG4
74CBT16292DGVRE4
74CBT16292DGVRG4
SN74CBT16292DGGR
SN74CBT16292DGVR
SN74CBT16292DL
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
DGG
56
56
56
56
56
56
56
56
56
56
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TVSOP
TVSOP
TSSOP
TVSOP
SSOP
DGG
DGV
DGV
DGG
DGV
DL
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74CBT16292DLG4
SN74CBT16292DLR
SN74CBT16292DLRG4
SSOP
DL
20 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SSOP
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SSOP
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
SN74CBT16292DGGR TSSOP
DGG
DGV
DL
56
56
56
2000
2000
1000
330.0
330.0
330.0
24.4
24.4
32.4
8.6
6.8
15.6
11.7
1.8
1.6
3.1
12.0
12.0
16.0
24.0
24.0
32.0
Q1
Q1
Q1
SN74CBT16292DGVR
SN74CBT16292DLR
TVSOP
SSOP
11.35
18.67
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74CBT16292DGGR
SN74CBT16292DGVR
SN74CBT16292DLR
TSSOP
TVSOP
SSOP
DGG
DGV
DL
56
56
56
2000
2000
1000
346.0
346.0
346.0
346.0
346.0
346.0
41.0
41.0
49.0
Pack Materials-Page 2
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
48
0.0135 (0,343)
0.008 (0,203)
0.005 (0,13)
M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
0°–ā8°
1
24
0.040 (1,02)
0.020 (0,51)
A
Seating Plane
0.004 (0,10)
0.008 (0,20) MIN
PINS **
0.110 (2,79) MAX
28
48
0.630
56
DIM
0.380
(9,65)
0.730
A MAX
A MIN
(16,00) (18,54)
0.370
(9,40)
0.620
0.720
(15,75) (18,29)
4040048/E 12/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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相关型号:
SN74CBT16292DLG4
CBT/FST/QS/5C/B SERIES, 12 1 LINE TO 2 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, SSOP-56
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SN74CBT16292DLR
5-V, 2:1 (SPDT), 12-channel general-purpose FET bus switch with internal pulldown resistors 56-SSOP -40 to 85
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SN74CBT16292DLRG4
CBT/FST/QS/5C/B SERIES, 12 1 LINE TO 2 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, SSOP-56
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