SN74CBT16390DL [TI]

16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH; 16位到32位FET复用器/解复用器总线开关
SN74CBT16390DL
型号: SN74CBT16390DL
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
16位到32位FET复用器/解复用器总线开关

解复用器 开关
文件: 总5页 (文件大小:78K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74CBT16390  
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH  
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998  
DGG, DGV, OR DL PACKAGE  
5-Switch Connection Between Two Ports  
(TOP VIEW)  
TTL-Compatible Input Levels  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
A1  
2B1  
2B2  
A3  
1B1  
1B2  
A2  
1B3  
1B4  
A4  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
2
3
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
4
2B3  
2B4  
A5  
5
Package Options Include Plastic Thin  
Shrink Small-Outline (DGG), Thin Very  
Small-Outline (DGV), and 300-mil Shrink  
Small-Outline (DL) Packages  
6
1B5  
1B6  
A6  
7
2B5  
2B6  
A7  
2B7  
2B8  
GND  
8
9
1B7  
1B8  
A8  
10  
11  
12  
13  
14  
15  
16  
description  
The SN74CBT16390 is a 16-bit to 32-bit switch  
used in applications in which two separate data  
paths must be multiplexed onto, or demultiplexed  
from, a single path. This device can be used for  
memory interleaving, in which two different banks  
of memory must be addressed simultaneously.  
ThisalsocanbeusedtoconnectorisolatethePCI  
bus to one or two slots simultaneously.  
GND  
V
V
CC  
CC  
A9  
2B9  
1B9  
1B10  
2B10 17  
A11 18  
40 A10  
39 1B11  
38 1B12  
37 A12  
36 1B13  
35 1B14  
2B11 19  
2B12 20  
A13 21  
2B13 22  
Two output enables (OE1 and OE2) control the  
data flow. When OE1 is low, A port is connected  
to 1B port. When OE2 is low, A port is connected  
to 2B port. When both OE1 and OE2 are low, the  
A port is connected to both 1B and 2B ports. The  
control inputs can be driven with a 5-V CMOS, 5-V  
TTL, or an LVTTL driver.  
23  
24  
25  
26  
27  
28  
34  
33  
32  
31  
30  
29  
2B14  
A15  
2B15  
2B16  
NC  
A14  
1B15  
1B16  
A16  
OE1  
OE2  
NC  
The SN74CBT16390 is characterized for  
operation from –40°C to 85°C.  
NC – No internal connection  
FUNCTION TABLE  
INPUTS  
FUNCTION  
OE1  
OE2  
L
L
L
A = 1B and A = 2B  
A = 1B  
H
H
H
L
A = 2B  
H
Isolation  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT16390  
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH  
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998  
logic diagram (positive logic)  
1
56  
2
A1  
1B1  
2B1  
31  
32  
26  
A16  
1B16  
2B16  
30  
29  
OE1  
OE2  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V  
+ 0.5 V  
I
CC  
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
IK  
I
Package thermal impedance, θ (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W  
JA  
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W  
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51.  
recommended operating conditions (see Note 3)  
MIN  
4.5  
2
MAX  
UNIT  
V
V
V
V
Supply voltage  
5.5  
CC  
IH  
IL  
High-level control input voltage  
Low-level control input voltage  
Operating free-air temperature  
V
0.8  
85  
V
T
A
–40  
°C  
NOTE 3: All unused control inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT16390  
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH  
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
PARAMETER  
TEST CONDITIONS  
I = –18 mA  
MIN TYP  
MAX  
–1.2  
10  
UNIT  
V
IK  
V
V
V
V
V
= 4.5 V,  
= 0,  
V
CC  
CC  
CC  
CC  
CC  
I
V = 5.5 V  
I
I
I
µA  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
V = 5.5 V or GND  
I
±1  
I
I
O
= 0,  
V = V  
I
or GND  
3
µA  
mA  
pF  
CC  
CC  
I  
CC  
Control inputs  
Control inputs  
One input at 3.4 V,  
Other input at V  
or GND  
2.5  
CC  
C
C
V = 3 V or 0  
I
5
i
V
= 3 V or 0  
= 4.5 V  
5.5  
5
pF  
io(OFF)  
O
I = 64 mA  
I
7
7
V = 0  
I
§
V
CC  
I = 30 mA  
I
5
r
on  
V = 2.4 V,  
I
I = 15 mA  
I
7
12  
§
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V  
or GND.  
CC  
Measured by the voltage drop between A and B terminals at the indicated current through the switch. On-state resistance is determined by the  
lower of the voltages of the two (A or B) terminals.  
switching characteristics over recommended operating free-air temperature range (unless  
otherwise noted) (see Figure 1)  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
MIN  
MAX  
UNIT  
t
t
t
A or B  
OE  
B or A  
A or B  
A or B  
0.25  
5.9  
ns  
ns  
ns  
pd  
en  
1.3  
1
5.3  
OE  
dis  
The propagation delay is based on the RC time constant of the typical on-state resistance of the switch and a load capacitance of 50 pF, when  
driven by an ideal voltage source (zero output impedance).  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT16390  
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH  
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998  
PARAMETER MEASUREMENT INFORMATION  
TEST  
S1  
7 V  
Open  
GND  
S1  
t
Open  
7 V  
pd  
/t  
500 Ω  
From Output  
Under Test  
t
PLZ PZL  
/t  
t
Open  
PHZ PZH  
C
= 50 pF  
L
500 Ω  
(see Note A)  
Output  
Control  
(low-level  
enabling)  
3 V  
0 V  
1.5 V  
1.5 V  
LOAD CIRCUIT  
t
PZL  
t
PLZ  
Output  
Waveform 1  
S1 at 7 V  
3.5 V  
3 V  
0 V  
1.5 V  
Input  
V
+ 0.3 V  
1.5 V  
1.5 V  
OL  
V
OL  
(see Note B)  
t
PHZ  
t
PZH  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
OH  
V
OH  
V
OH  
– 0.3 V  
0 V  
1.5 V  
Output  
1.5 V  
1.5 V  
V
OL  
VOLTAGE WAVEFORMS  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
ENABLE AND DISABLE TIMES  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
PHL  
are the same as t  
.
dis  
PLZ  
PZL  
PLH  
PHZ  
PZH  
are the same as t  
.
en  
are the same as t .  
pd  
Figure 1. Load Circuit and Voltage Waveforms  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1998, Texas Instruments Incorporated  

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