SN74CBTS3306DG4 [TI]

CBT/FST/QS/5C/B SERIES, 2-BIT DRIVER, TRUE OUTPUT, PDSO8, GREEN, PLASTIC, SOIC-8;


型号：	SN74CBTS3306DG4
厂家：	TEXAS INSTRUMENTS
描述：	CBT/FST/QS/5C/B SERIES, 2-BIT DRIVER, TRUE OUTPUT, PDSO8, GREEN, PLASTIC, SOIC-8 驱动光电二极管输出元件逻辑集成电路
文件：	总11页 (文件大小：752K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢀ ꢇꢇ ꢈꢉ

ꢊꢋꢌ ꢍ ꢎ ꢏꢆ ꢅꢋ ꢀ ꢀ ꢐꢑ ꢆꢄ ꢒ

ꢐ ꢑꢆ ꢒ ꢀꢄꢒ ꢓꢆ ꢆ ꢔꢕ ꢊꢑ ꢓꢊ ꢏ ꢄ ꢍꢌ ꢖꢗ ꢑ ꢁꢘ

SCDS029I − JANUARY 1996 − REVISED JANUARY 2004

D OR PW PACKAGE

(TOP VIEW)

5-Ω Switch Connection Between Two Ports

TTL-Compatible Input Levels

1OE

description/ordering information

2OE

The SN74CBTS3306 features independent line

switches with Schottky diodes on the I/Os to

clamp undershoot. Each switch is disabled when

the associated output-enable (OE) input is high.

GND

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

Tube

SN74CBTS3306D

SOIC − D

CR306

Tape and reel SN74CBTS3306DR

Tube SN74CBTS3306PW

Tape and reel SN74CBTS3306PWR

−40°C to 85°C

TSSOP − PW

CR306

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

FUNCTION TABLE

(each bus switch)

INPUT

FUNCTION

A port = B port

Disconnect

logic diagram (positive logic)

1OE

2OE

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ

ꢞ

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢀꢇ ꢇꢈꢉ

ꢊ ꢋꢌꢍ ꢎ ꢏꢆ ꢅ ꢋ ꢀ ꢀ ꢐꢑ ꢆ ꢄꢒ

ꢐꢑ ꢆ ꢒ ꢀꢄ ꢒ ꢓꢆ ꢆ ꢔ ꢕ ꢊꢑ ꢓ ꢊꢏ ꢄꢍ ꢌꢖ ꢗꢑ ꢁꢘ

SCDS029I − JANUARY 1996 − REVISED JANUARY 2004

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V

Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V

Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA

Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA

IK I/O

Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W

PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

Storage temperature range, T

stg

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 3)

MIN

MAX

UNIT

Supply voltage

5.5

High-level control input voltage

Low-level control input voltage

Operating free-air temperature

0.8

−40

°C

NOTE 3: All unused control inputs of the device must be held at V

or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

‡

PARAMETER

A or B inputs

Control inputs

TEST CONDITIONS

MIN TYP

MAX

−0.7

−1.2

−1

UNIT

= 4.5 V,

I = −18 mA

= 5.5 V,

V = GND

µA

V = 5.5 V

150

= 0,

V = V

I CC

or GND

µA

∆I

Control inputs

One input at 3.4 V,

Other inputs at V

or GND

2.5

Control inputs V = 3 V or 0

= 3 V or 0,

OE = V

io(OFF)

= 4 V,

V = 2.4 V,

I = 15 mA

TYP at V

= 4 V

I = 64 mA

Ω

V = 0

= 4.5 V

I = 30 mA

V = 2.4 V,

I = 15 mA

‡

All typical values are at V

= 5 V (unless otherwise noted), T = 25°C.

This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V

or GND.

Measured by the voltage drop between the A and B pin at the indicated current through the switch. On-state resistance is determined by the lower

of the voltages of the two (A or B) pins.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢀ ꢇꢇ ꢈꢉ

ꢊꢋꢌ ꢍ ꢎ ꢏꢆ ꢅꢋ ꢀ ꢀ ꢐꢑ ꢆꢄ ꢒ

ꢐ ꢑꢆ ꢒ ꢀꢄꢒ ꢓꢆ ꢆ ꢔꢕ ꢊꢑ ꢓꢊ ꢏ ꢄ ꢍꢌ ꢖꢗ ꢑ ꢁꢘ

SCDS029I − JANUARY 1996 − REVISED JANUARY 2004

switching characteristics over recommended operating free-air temperature range, C = 50 pF

(unless otherwise noted) (see Figure 1)

= 5 V

0.5 V

= 4 V

FROM

(INPUT)

(OUTPUT)

PARAMETER

UNIT

MIN

MAX

MIN

MAX

†

A or B

B or A

A or B

0.35

5.6

0.25

1.8

4.6

4.3

dis

†

The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when

driven by an ideal voltage source (zero output impedance).

PARAMETER MEASUREMENT INFORMATION

TEST

Open

7 V

Open

500 Ω

From Output

Under Test

PLZ PZL

GND

0pen

PHZ PZH

= 50 pF

500 Ω

(see Note A)

3 V

0 V

Output

Control

1.5 V

LOAD CIRCUIT

PLZ

PZL

Output

Waveform 1

S1 at 7 V

3.5 V

3 V

0 V

1.5 V

Input

+ 0.3 V

1.5 V

(see Note B)

PHZ

PZH

PHL

PLH

Output

Waveform 2

S1 at Open

(see Note B)

− 0.3 V

1.5 V

Output

1.5 V

0 V

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

NOTES: A.

C includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.

D. The outputs are measured one at a time with one transition per measurement.

and t

are the same as t

dis

PLZ

PZL

PHL

PHZ

PZH

PLH

are the same as t

are the same as t .

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

PACKAGING INFORMATION

Orderable Device

SN74CBTS3306D

Status Package Type Package Pins Package Qty

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

-40 to 85

Top-Side Markings

Samples

Drawing

(1)

(2)

(3)

(4)

ACTIVE

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

CR306

SN74CBTS3306DE4

SN74CBTS3306DG4

SN74CBTS3306DR

SN74CBTS3306DRE4

SN74CBTS3306DRG4

SN74CBTS3306PW

SN74CBTS3306PWE4

SN74CBTS3306PWG4

ACTIVE

Green (RoHS

& no Sb/Br)

CR306

SOIC

Green (RoHS

& no Sb/Br)

SOIC

2500

150

Green (RoHS

& no Sb/Br)

SOIC

Green (RoHS

& no Sb/Br)

SOIC

Green (RoHS

& no Sb/Br)

TSSOP

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

SN74CBTS3306PWLE

SN74CBTS3306PWR

OBSOLETE

ACTIVE

TSSOP

TBD

Call TI

-40 to 85

2000

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

CR306

SN74CBTS3306PWRE4

SN74CBTS3306PWRG4

ACTIVE

TSSOP

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

-40 to 85

Green (RoHS

& no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾Only one of markings shown within the brackets will appear on the physical device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

26-Jan-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

SN74CBTS3306DR

SOIC

2500

2000

330.0

12.4

6.4

7.0

5.2

3.6

2.1

1.6

8.0

12.0

SN74CBTS3306PWR

TSSOP

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

26-Jan-2013

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

SN74CBTS3306DR

SOIC

2500

2000

340.5

367.0

338.1

367.0

20.6

35.0

SN74CBTS3306PWR

TSSOP

Pack Materials-Page 2

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SN74CBTS3306DG4 [TI]

相关型号：

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SN74CBTS3384DBLE

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