SN74F1056DG4 [TI]
8-bit Schottky Barrier Diode Bus-Termination Array 16-SOIC 0 to 70;
| 型号： | SN74F1056DG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8-bit Schottky Barrier Diode Bus-Termination Array 16-SOIC 0 to 70 光电二极管 接口集成电路 |
| 文件： | 总10页 (文件大小：312K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74F1056
8-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDFS085A – AUGUST 1992 – REVISED JULY 1997
SC PACKAGE
(TOP VIEW)
Designed to Reduce Reflection Noise
Repetitive Peak Forward Current 300 mA
8-Bit Array Structure Suited for
Bus-Oriented Systems
D01
D02
D03
D04
GND
GND
D05
D06
D07
1
2
3
4
5
6
7
8
9
description
This Schottky barrier diode bus-termination array
is designed to reduce reflection noise on memory
bus lines. This device consists of an 8-bit
high-speed Schottky diode array suitable for a
clamp to GND.
D08 10
The SN74F1056 is characterized for operation
from 0°C to 70°C.
D PACKAGE
(TOP VIEW)
NC
D01
D02
D03
D04
D05
D06
D07
D08
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
GND
GND
GND
GND
GND
NC
schematic diagrams
SC Package
D Package
1
1
D01
D01
D02
2
2
3
4
5
6
7
8
D02
15
GND
GND
GND
GND
GND
GND
3
D03
D03
D04
D05
D06
D07
14
13
12
11
6
GND
4
D04
7
D05
5
GND
8
D06
9
D07
10
10
D08
D08
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74F1056
8-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDFS085A – AUGUST 1992 – REVISED JULY 1997
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Steady-state reverse voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
R
Continuous forward current, I : Any D terminal from GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
F
Total through all GND terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 mA
Repetitive peak forward current, I
(see Note 1): Any D terminal from GND . . . . . . . . . . . . . . . . . . 300 mA
Total through all GND terminals . . . . . . . . . . . . . . . 1.2 A
FRM
Continuous total power dissipation at (or below) 25°C free-air temperature . . . . . . . . . . . . . . . . . . . . . 500 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: These values apply for t ≤ 100 µs, duty cycle ≤ 20%.
w
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
single-diode operation (see Note 2)
‡
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
2
UNIT
I
R
Static reverse current
V
R
= 7 V
µA
I
I
I
= 18 mA
= 50 mA
= 200 mA
0.8
1
1
F
F
F
V
V
Static forward voltage
Peak forward voltage
Total capacitance
V
V
F
1.2
1.23
3
FM
V
= 0,
f = 1 MHz
f = 1 MHz
3.75
3
R
R
C
pF
t
V
= 2 V,
2.5
‡
All typical values are at T = 25°C.
A
NOTE 2: Test conditions and limits apply separately to each of the diodes. The diodes not under test are open-circuited during the measurement
of these characteristics.
multiple-diode operation
‡
PARAMETER
TEST CONDITIONS
Total GND current = 1.2 A, See Note 3
MIN TYP
MAX
UNIT
I
x
Internal crosstalk current
10
50
µA
‡
All typical values are at T = 25°C.
A
NOTE 3: I is measured under the following conditions with one diode static, all others switching:
x
Switching diodes: t = 100 µs, duty cycle = 20%
w
Static diode: V = 5 V
R
The static diode input current is the internal crosstalk current I .
x
switching characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
= 10 mA,
MIN
MIN
TYP
MAX
UNIT
t
rr
Reverse recovery time
I
F
= 10 mA,
I
I
= 1 mA,
R = 100 Ω
L
5
7
ns
RM(REC)
R(REC)
undershoot characteristics
PARAMETER
TEST CONDITIONS
TYP
MAX
UNIT
t = 2 ns, t = 50 ns, V = 5 V, V = 0, Z = 25 Ω, Z = 50 Ω,
L = 36-inch coax
f
w
IH IL
S
O
V
US
Undershoot voltage
0.6
0.7
V
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74F1056
8-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDFS085A – AUGUST 1992 – REVISED JULY 1997
APPLICATION INFORMATION
Large negative transients occurring at the inputs of memory devices (DRAMs, SRAMs, EPROMs, etc.) or on the
CLOCK lines of many clocked devices can result in improper operation of the devices. The SN74F1056 diode
termination array helps suppress negative transients caused by transmission-line reflections, crosstalk, and
switching noise.
Diode terminations have several advantages when compared to resistor termination schemes. Split resistor or
Thevenin equivalent termination can cause a substantial increase in power consumption. The use of a single resistor
togroundtoterminatealineusuallyresultsindegradationoftheoutputhighlevel, resultinginreducednoiseimmunity.
Series damping resistors placed on the outputs of the driver reduce negative transients, but they also can increase
propagation delays down the line, as a series resistor reduces the output drive capability of the driving device. Diode
terminations have none of these drawbacks.
The operation of the diode arrays in reducing negative transients is explained in the following figures. The diode
conducts current when the voltage reaches a negative value large enough for the diode to turn on. Suppression of
negative transients is tracked by the current-voltage characteristic curve for that diode. A typical current versus
voltage plot for the SN74F1056 is shown in Figure 1.
To illustrate how the diode arrays act to reduce negative transients at the end of a transmission line, the test setup
in Figure 2(a) was evaluated. The resulting waveforms with and without the diode are shown in Figure 2(b).
The maximum effectiveness of the diode arrays in suppressing negative transients occurs when the diode arrays are
placed at the end of a line and/or the end of a long stub branching off a main transmission line. The diodes also can
be used to reduce the negative transients that occur due to discontinuities in the middle of a line. An example of this
is a slot in a backplane that is provided for an add-on card.
DIODE FORWARD CURRENT
vs
DIODE FORWARD VOLTAGE
–100
T
A
= 25°C
–90
–80
–70
–60
–50
–40
–30
Variable 1:
V
IN
–Ch 1
Linear Sweep:
Start
Stop
Step
0.000 V
–2.000 V
–0.010 V
Constants:
V
V
–Vs1
–Vs2
3.5000 V
0.0000 V
HI
LO
–20
–10
0
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
V
F
– Forward Voltage – V
Figure 1. Current Versus Voltage for the SN74F1056
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74F1056
8-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDFS085A – AUGUST 1992 – REVISED JULY 1997
APPLICATION INFORMATION
Z
= 50 Ω
O
Length = 36 in.
S1
Z
S
= 25Ω
(a) UNDERSHOOT TEST SETUP
1.03610 µs
1.06110 µs
1.08610 µs
S1 Open
S1 Closed
Vmarker 1
–2.6 V
Vmarker 2
Ch 1
= 2.000 V/div
Offset = 2.340 V
Timebase = 5.00 ns/div
Vmarker 1 = 0.0000 V
Vmarker 2 = –600.00 mV
Delay = 1.06110 µs
Delta V = –600.0 mV
(b) OSCILLOSCOPE DISPLAY
Figure 2. Undershoot Test Setup and Oscilloscope Display
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
SN74F1056D
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
SOIC
SOIC
SOIC
D
16
16
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
F1056
SN74F1056DG4
SN74F1056DR
ACTIVE
ACTIVE
D
D
40
Green (RoHS
& no Sb/Br)
0 to 70
F1056
F1056
2500
Green (RoHS
& no Sb/Br)
0 to 70
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
SN74F1056DR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC 16
SPQ
Length (mm) Width (mm) Height (mm)
333.2 345.9 28.6
SN74F1056DR
D
2500
Pack Materials-Page 2
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