SN74F299 [TI]
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS; 8位通用移位/存储寄存器具有三态输出
| 型号： | SN74F299 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS |
| 文件： | 总7页 (文件大小：111K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54F299, SN74F299
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
WITH 3-STATE OUTPUTS
SDFS071A – MARCH 1987 – REVISED OCTOBER 1993
SN54F299 . . . J PACKAGE
SN74F299 . . . DW OR N PACKAGE
(TOP VIEW)
• Four Modes of Operation:
Hold (Store)
Shift Right
Shift Left
Load Data
S0
OE1
OE2
V
CC
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
S1
SL
Q
• Operates With Outputs Enabled or at High
Impedance
G/Q
G
H′
• 3-State Outputs Drive Bus Lines Directly
• Can Be Cascaded for N-Bit Word Lengths
• Direct Overriding Clear
E/Q
H/Q
F/Q
E
H
C/Q
C
F
A/Q
Q
D/Q
A
D
B/Q
A′
B
• Applications:
CLR
CLK
Stacked or Push-Down Registers
Buffer Storage
GND 10
11 SR
Accumulator Registers
SN54F299 . . . FK PACKAGE
(TOP VIEW)
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
description
3
2
1
20 19
18
SL
Q
G/Q
4
5
6
7
8
G
E/Q
C/Q
17
16
15
14
These 8-bit universal shift/storage registers
feature multiplexed I/O ports to achieve full 8-bit
data handling in a single 20-pin package. Two
function-select (S0, S1) inputs and two
output-enable (OE1, OE2) inputs can be used to
choose the modes of operation listed in the
function table.
H′
E
H/Q
F/Q
H
C
A/Q
F
A
D/Q
Q
D
A′
9 10 11 12 13
Synchronous parallel loading is accomplished by
takingbothS0andS1high. Thisplacesthe3-state
outputs in a high-impedance state and permits
data that is applied on the I/O ports to be clocked into the register. Reading out of the register can be
accomplished while the outputs are enabled in any mode. Clearing occurs when the clear (CLR) input is low.
Taking either OE1 or OE2 high disables the outputs but has no effect on clearing, shifting, or storage of data.
The SN54F299 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74F299 is characterized for operation from 0°C to 70°C.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F299, SN74F299
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
WITH 3-STATE OUTPUTS
SDFS071A – MARCH 1987 – REVISED OCTOBER 1993
FUNCTION TABLE
INPUTS
I/O PORTS
OUTPUTS
MODE
†
†
CLR S1 S0 OE1
OE2
CLK SL SR A/Q
B/Q
C/Q
D/Q
E/Q
F/Q
G/Q
H/Q
Q
Q
H′
A
B
C
D
E
F
G
H
A′
L
L
L
X
L
H
L
X
H
L
L
X
L
L
X
X
X
X
X
X
X
X
X
X
L
L
X
L
L
X
L
L
X
L
L
X
L
L
X
L
L
X
L
L
X
L
L
X
L
L
L
L
L
L
Clear
Hold
H
H
L
X
L
X
L
L
L
L
X
L
X
X
X
X
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
A0
A0
B0
B0
C0
C0
D0
D0
E0
E0
F0
F0
G0
G0
H0
H0
A0
A0
H0
H0
Shift
Right
H
H
L
L
H
H
L
L
L
L
↑
↑
X
X
H
L
H
L
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
H
L
Q
Q
An
An
Bn
Bn
Cn
Cn
Dn
Dn
En
En
Fn
Fn
Gn
Gn
Gn
Gn
Shift
Left
H
H
H
H
L
L
L
L
L
L
↑
↑
H
L
X
X
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
H
L
Q
Q
H
L
Bn
Bn
Cn
Cn
Dn
Dn
En
En
Fn
Fn
Gn
Gn
Hn
Hn
Bn
Bn
Load
H
H
H
X
X
↑
X
X
a
b
c
d
e
f
g
h
a
h
NOTE: a . . . h=thelevelofthesteady-stateinputatinputsAthroughH,respectively.Thisdataisloadedintotheflip-flopswhiletheflip-flopoutputs
are isolated from the I/O terminals.
†
When one or both output-enable inputs are high the eight I/O terminals are disabled to the high-impedance state; however, sequential operation
or clearing of the register is not affected.
‡
logic symbol
9
2
3
SRG8
R
CLR
&
OE1
OE2
S0
3EN5
0
1
0
1
19
12
M
3
S1
CLK
C4/1→/2→
11
7
SR
1,4D
3,4D
8
A/Q
Q
A
A′
5
3,4D
5
13
B/Q
B
6
C/Q
D/Q
C
D
14
5
E/Q
E
15
4
F/Q
F
G/Q
G
16
H/Q
3,4D
H
17
Q
5
H′
18
SL
2,4D
‡
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F299, SN74F299
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
WITH 3-STATE OUTPUTS
SDFS071A – MARCH 1987 – REVISED OCTOBER 1993
logic diagram (positive logic)
1
S0
19
S1
18
SL
(shift left
serial input)
11
SR
(shift right
serial input)
Six
Identical
Channels
Not
†
Shown
12
CLK
1D
C1
1D
C1
R
R
8
17
Q
Q
A′
H′
9
CLR
2
OE1
3
OE2
7
16
H/Q
A/Q
A
H
†
I/O ports not shown: B/Q (13), C/Q (6), D/Q (14), E/Q (5), F/Q (15), and G/Q (4).
B
C
D
E
F
G
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 7 V
I
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA to 5 mA
Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
CC
Current into any output in the low state: Q or Q
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
A′
H′
SN54F299 (Q thru Q ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
SN74F299 (Q thru Q ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA
A
H
A
H
Operating free-air temperature range: SN54F299 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
SN74F299 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F299, SN74F299
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
WITH 3-STATE OUTPUTS
SDFS071A – MARCH 1987 – REVISED OCTOBER 1993
recommended operating conditions
SN54F299
SN74F299
UNIT
MIN NOM
MAX
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input clamp current
0.8
–18
– 1
– 3
20
0.8
–18
– 1
– 3
20
V
I
IK
mA
Q
Q
Q
Q
or Q
H′
A′
A
I
High-level output current
mA
OH
OL
thru Q
H
or Q
A′
A
H′
I
Low-level output current
mA
thru Q
20
24
H
T
A
Operating free-air temperature
–55
125
0
70
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54F299
SN74F299
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
V
V
= 4.5 V,
= 4.5 V
= 4.75 V,
= 4.5 V
I = –18 mA
–1.2
–1.2
V
IK
CC
CC
CC
CC
I
Q
Q
or Q
I
I
I
I
I
I
I
= – 1 mA
= – 1 mA
2.5
2.5
2.4
3.4
3.4
3.3
2.5
2.5
2.4
2.7
3.4
3.4
3.3
A′
H′
OH
OH
OH
OH
OL
OL
OL
thru Q
V
V
OH
A
H
= – 3 mA
Any output
= – 1 mA to –3 mA
= 20 mA
Q
or Q
0.3
0.3
0.5
0.5
0.3
0.5
A′
H′
V
OL
= 20 mA
Q
thru Q
A
H
= 24 mA
0.35
0.5
1
A thru H
Any other
A thru H
Any other
A thru H
S0 or S1
Any other
V = 5.5 V
I
1
0.1
I
I
V
V
= 5.5 V
= 5.5 V,
mA
I
CC
V = 7 V
I
0.1
70
70
‡
V = 2.7 V
I
µA
CC
IH
20
20
–0.65
–1.2
–0.6
–150
95
–0.65
–1.2
–0.6
–150
95
‡
V
CC
= 5.5 V,
V = 0.5 V
I
mA
I
IL
§
I
I
V
V
= 5.5 V,
= 5.5 V,
V = 0
O
–60
–60
mA
mA
OS
CC
CC
See Note 2
68
68
CC
†
‡
§
All typical values are at V
= 5 V, T = 25°C.
A
CC
For I/O ports (Q thru Q ), the parameters I and I include the off-state output current.
A
H
IH
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
is measured with OE1, OE2, and CLK at 4.5 V.
IL
NOTE 2: I
CC
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F299, SN74F299
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
WITH 3-STATE OUTPUTS
SDFS071A – MARCH 1987 – REVISED OCTOBER 1993
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
V
T
= 5 V,
= 25°C
CC
A
SN54F299
SN74F299
UNIT
′F299
MIN
0
MAX
MIN
0
MAX
65
MIN
0
MAX
70
f
t
Clock frequency
Pulse duration
70
MHz
ns
clock
CLK high or low
CLR low
7
8
7
w
7
8
7
S0 or S1
High or low
High or low
8.5
5.5
9.5
6.5
8.5
5.5
Setup time before
CLK↑
A/Q thru H/Q , SR, or SL
A
H
t
t
ns
ns
su
Inactive-state setup
time before CLK↑
CLR
High
7
13
7
†
S0 or S1
A/Q thru H/Q , SR, or SL
High or low
High or low
0
2
0
2
0
2
Hold time after CLK↑
h
A
H
†
Inactive-state setup time is also referred to as recovery time.
switching characteristics (see Note 3)
V
C
R
= 5 V,
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
CC
L
L
= 50 pF,
= 500 Ω,
= 25°C
= 500Ω,
= MIN to MAX
FROM
(INPUT)
TO
(OUTPUT)
‡
PARAMETER
UNIT
T
A
T
A
′F299
TYP
100
6.6
SN54F299
SN74F299
MIN
MAX
MIN
65
MAX
MIN
70
MAX
f
70
3.2
2.7
3.2
4.2
3.7
5.7
2.7
3.2
1.7
1.2
MHz
ns
max
PLH
PHL
PLH
PHL
t
t
t
t
9
8.5
9
2.7
2.2
2.7
3.7
3.2
5
10.5
10
3.2
2.7
3.2
4.2
3.7
5.7
2.7
3.2
1.7
1.2
10
9.5
10
12
10.5
15
9
CLK
CLK
CLR
Q
or Q
A′
H′
6.1
6.6
11
ns
ns
ns
ns
Q
thru Q
A
H
8.1
11
9.5
14
8
12.5
11.5
15.5
10.5
12
7.1
Q
or Q
H′
A′
t
PHL
10.6
5.6
Q
thru Q
A
A
H
t
t
2.2
2.7
1.7
1.2
PZH
OE1 or OE2
OE1 or OE2
Q
thru Q
H
t
6.6
10
6
11
PZL
4.1
9
7
PHZ
Q
thru Q
A
H
t
3.6
5.5
7.5
6.5
PLZ
‡
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 3: Load circuits and waveforms are shown in Section 1.
2–5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–6
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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