SN74LV123ATPWREP [TI]

DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR WITH SCHMITT-TRIGGER INPUTS; 施密特触发器输入??双可重触发单稳多谐振荡器
SN74LV123ATPWREP
型号: SN74LV123ATPWREP
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR WITH SCHMITT-TRIGGER INPUTS
施密特触发器输入??双可重触发单稳多谐振荡器

振荡器 预分频器 多谐振动器 触发器 逻辑集成电路 光电二极管 输入元件 时钟
文件: 总12页 (文件大小:475K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢐꢏ  
ꢖ ꢑꢐ ꢗ ꢀꢘ ꢗꢔꢑ ꢐꢐꢊꢐ ꢏꢑꢒ ꢒ ꢋ ꢏ ꢑ ꢁꢌ ꢎ ꢐꢀ  
SCLS498A − MAY 2003 − REVISED MAY 2004  
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
D
D
D
D
D
Edge Triggered From Active-High or  
Active-Low Gated Logic Inputs  
I
Supports Partial-Power-Down Mode  
off  
D
D
D
D
D
D
D
D
Extended Temperature Performance of  
−40°C to 105°C  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
Operation  
Retriggerable for Very Long Output Pulses,  
Up To 100% Duty Cycle  
Overriding Clear Terminates Output Pulse  
Glitch-Free Power-Up Reset on Outputs  
Enhanced Product-Change Notification  
Qualification Pedigree  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
OLP  
CC  
A
− 1000-V Charged-Device Model (C101)  
Typical V  
>2.3 V at V  
(Output V  
= 3.3 V, T = 25°C  
Undershoot)  
OHV  
CC  
OH  
A
PW PACKAGE  
(TOP VIEW)  
Supports Mixed-Mode Voltage Operation on  
All Ports  
1A  
1B  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
Schmitt-Trigger Circuitry on A, B, and CLR  
Inputs for Slow Input Transition Rates  
1R /C  
ext ext  
1CLR  
1Q  
1C  
1Q  
ext  
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
2Q  
12 2Q  
11  
10  
9
2C  
2CLR  
2B  
ext  
2R /C  
ext ext  
GND  
2A  
description/ordering information  
The SN74LV123A is a dual retriggerable monostable multivibrator designed for 2-V to 5.5-V V  
operation.  
CC  
This edge-triggered multivibrator features output pulse-duration control by three methods. In the first method,  
the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes  
low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high.  
The output pulse duration is programmable by selecting external resistance and capacitance values. The  
external timing capacitor must be connected between C  
and R /C  
(positive) and an external resistor  
ext  
ext ext  
connected between R /C  
resistance between R /C and V . The output pulse duration also can be reduced by taking CLR low.  
and V . To obtain variable pulse durations, connect an external variable  
ext ext  
CC  
ext ext  
CC  
Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input  
pulse. The A, B, and CLR inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition  
rates with jitter-free triggering at the outputs.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
−40°C to 105°C  
TSSOP − PW Tape and reel SN74LV123ATPWREP L123AEP  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢐꢤ  
Copyright 2004, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢉ ꢊꢋꢌ  
ꢍ ꢎꢉꢄ ꢏ ꢋꢐ ꢏ ꢑꢒꢒꢋ ꢏꢉ ꢓꢄ ꢋ ꢔꢕ ꢁꢕ ꢀꢐꢉꢓ ꢄꢋ ꢔ ꢎꢄꢐ ꢑꢅ ꢑꢓꢏꢉꢐꢕ ꢏ  
ꢖꢑ ꢐ ꢗ ꢀꢘ ꢗ ꢔꢑ ꢐ ꢐꢊꢐ ꢏꢑ ꢒ ꢒꢋ ꢏ ꢑ ꢁꢌ ꢎꢐ ꢀ  
SCLS498A − MAY 2003 − REVISED MAY 2004  
description/ordering information (continued)  
Once triggered, the basic pulse duration can be extended by retriggering the gated low-level-active (A) or  
high-level-active (B) input. Pulse duration can be reduced by taking CLR low. The input/output timing diagram  
illustrates pulse control by retriggering the inputs and early clearing.  
During power up, Q outputs are in the low state, and Q outputs are in the high state. The outputs are glitch free,  
without applying a reset pulse.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
FUNCTION TABLE  
(each multivibrator)  
INPUTS  
OUTPUTS  
CLR  
L
A
X
H
X
L
B
X
X
L
Q
Q
L
H
L
X
H
H
L
X
H
H
L
H
H
These outputs are based on the  
assumption that the indicated  
steady-state conditions at the A and  
B inputs have been set up long enough to  
complete any pulse started before the  
setup.  
logic diagram, each multivibrator (positive logic)  
R
C
/C  
ext ext  
A
B
ext  
Q
Q
CLR  
R
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢋ ꢌ  
ꢍꢎꢉ ꢄ ꢏꢋꢐ ꢏꢑ ꢒ ꢒꢋ ꢏꢉꢓꢄ ꢋ ꢔ ꢕꢁ ꢕꢀ ꢐꢉꢓꢄ ꢋ ꢔ ꢎꢄꢐ ꢑꢅ ꢑ ꢓꢏ ꢉꢐꢕ ꢏ  
ꢖ ꢑꢐ ꢗ ꢀꢘ ꢗꢔꢑ ꢐꢐꢊꢐ ꢏꢑꢒ ꢒ ꢋ ꢏ ꢑ ꢁꢌ ꢎ ꢐꢀ  
SCLS498A − MAY 2003 − REVISED MAY 2004  
input/output timing diagram  
t
rr  
A
B
CLR  
R
/C  
ext ext  
Q
Q
t
t
t
+ t  
w
w
w
rr  
absolute maximum ratings over operating free-air temperature (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
I
Voltage range applied to any output in the high-impedance  
or power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
O
Output voltage range in high or low state, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . −0.5 V to V  
+ 0.5 V  
O
CC  
Output voltage range in power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA  
IK  
OK  
I
Output clamp current, I  
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA  
O
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA  
Continuous current through V  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
Package thermal impedance, θ (see Note 3)  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W  
JA  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.  
2. This value is limited to 5.5 V maximum.  
3. The package thermal impedance is calculated in accordance with JESD 51-7.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢉ ꢊꢋꢌ  
ꢖꢑ ꢐ ꢗ ꢀꢘ ꢗ ꢔꢑ ꢐ ꢐꢊꢐ ꢏꢑ ꢒ ꢒꢋ ꢏ ꢑ ꢁꢌ ꢎꢐ ꢀ  
ꢐꢉ  
ꢄꢐ  
ꢉꢐꢕ  
SCLS498A − MAY 2003 − REVISED MAY 2004  
recommended operating conditions (see Note 4)  
MIN  
2
MAX  
UNIT  
V
Supply voltage  
5.5  
V
CC  
IH  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
1.5  
= 2.3 V to 2.7 V  
= 3 V to 3.6 V  
= 4.5 V to 5.5 V  
= 2 V  
V
V
V
× 0.7  
CC  
CC  
CC  
V
High-level input voltage  
V
V
× 0.7  
× 0.7  
0.5  
= 2.3 V to 2.7 V  
= 3 V to 3.6 V  
= 4.5 V to 5.5 V  
V
V
V
× 0.3  
CC  
CC  
CC  
V
IL  
Low-level input voltage  
× 0.3  
× 0.3  
5.5  
V
V
Input voltage  
0
0
V
V
I
Output voltage  
V
CC  
O
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
−50  
−2  
−6  
−12  
50  
2
µA  
= 2.3 V to 2.7 V  
= 3 V to 3.6 V  
= 4.5 V to 5.5 V  
= 2 V  
I
High-level output current  
OH  
OL  
mA  
µA  
= 2.3 V to 2.7 V  
= 3 V to 3.6 V  
= 4.5 V to 5.5 V  
= 2 V  
I
Low-level output current  
External timing resistance  
6
mA  
12  
5k  
1k  
R
C
ext  
ext  
3 V  
External timing capacitance  
Power-up ramp rate  
No restriction  
1
pF  
ms/V  
°C  
t/V  
CC  
T
Operating free-air temperature  
−40  
105  
A
NOTE 4: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢋ ꢌ  
ꢍꢎꢉ ꢄ ꢏꢋꢐ ꢏꢑ ꢒ ꢒꢋ ꢏꢉꢓꢄ ꢋ ꢔ ꢕꢁ ꢕꢀ ꢐꢉꢓꢄ ꢋ ꢔ ꢎꢄꢐ ꢑꢅ ꢑ ꢓꢏ ꢉꢐꢕ ꢏ  
ꢖ ꢑꢐ ꢗ ꢀꢘ ꢗꢔꢑ ꢐꢐꢊꢐ ꢏꢑꢒ ꢒ ꢋ ꢏ ꢑ ꢁꢌ ꢎ ꢐꢀ  
SCLS498A − MAY 2003 − REVISED MAY 2004  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
−0.1  
2
TYP  
MAX  
UNIT  
V
CC  
I
I
I
I
I
I
I
I
= −50 µA  
= −2 mA  
= −6 mA  
= −12 mA  
= 50 µA  
= 2 mA  
2 V to 5.5 V  
2.3 V  
3 V  
V
CC  
OH  
OH  
OH  
OH  
OL  
OL  
OL  
OL  
V
V
OH  
2.48  
3.8  
4.5 V  
2 V to 5.5 V  
2.3 V  
3 V  
0.1  
0.4  
0.44  
0.55  
2.5  
1
V
V
OL  
= 6 mA  
= 12 mA  
4.5 V  
2 V to 5.5 V  
0
V = 5.5 V or GND  
I
R
/C  
ext ext  
I
I
µA  
µA  
µA  
I
V = 5.5 V or GND  
I
A, B, and CLR  
Quiescent  
0 to 5.5 V  
5.5 V  
3 V  
1
V = V  
or GND,  
I = 0  
O
20  
CC  
I
CC  
280  
650  
975  
5
Active state  
(per circuit)  
V = V  
I
R
or GND,  
CC  
4.5 V  
5.5 V  
0
I
CC  
off  
/C  
ext ext  
= 0.5 V  
CC  
I
V or V = 0 to 5.5 V  
µA  
I
O
3.3 V  
5 V  
1.9  
1.9  
C
V = V  
or GND  
pF  
i
I
CC  
This test is performed with the terminal in the off-state condition.  
timing requirements over recommended operating free-air temperature range, V  
(unless otherwise noted) (see Figure 1)  
= 3.3 V 0.3 V  
CC  
T
A
= 25°C  
TEST CONDITIONS  
MIN  
MAX  
UNIT  
MIN  
TYP  
MAX  
CLR  
5
5
Pulse  
duration  
t
t
ns  
w
A or B trigger  
5
5
C
C
= 100 pF  
76  
ns  
ext  
ext  
Pulse retrigger time  
R
= 1 kΩ  
rr  
ext  
= 0.01 mF  
1.8  
ms  
See retriggering data in the application information section.  
timing requirements over recommended operating free-air temperature range, V  
(unless otherwise noted) (see Figure 1)  
= 5 V 0.5 V  
CC  
T
A
= 25°C  
TEST CONDITIONS  
MIN  
MAX  
UNIT  
MIN  
TYP  
MAX  
CLR  
5
5
Pulse  
duration  
t
t
ns  
w
A or B trigger  
5
5
C
C
= 100 pF  
59  
ns  
ext  
ext  
Pulse retrigger time  
R
= 1 kΩ  
rr  
ext  
= 0.01 mF  
1.5  
ms  
See retriggering data in the application information section.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢉ ꢊꢋꢌ  
ꢍ ꢎꢉꢄ ꢏ ꢋꢐ ꢏ ꢑꢒꢒꢋ ꢏꢉ ꢓꢄ ꢋ ꢔꢕ ꢁꢕ ꢀꢐꢉꢓ ꢄꢋ ꢔ ꢎꢄꢐ ꢑꢅ ꢑꢓꢏꢉꢐꢕ ꢏ  
ꢖꢑ ꢐ ꢗ ꢀꢘ ꢗ ꢔꢑ ꢐ ꢐꢊꢐ ꢏꢑ ꢒ ꢒꢋ ꢏ ꢑ ꢁꢌ ꢎꢐ ꢀ  
SCLS498A − MAY 2003 − REVISED MAY 2004  
switching characteristics over recommended operating free-air temperature range,  
V
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
FROM  
(INPUT)  
TO  
(OUTPUT)  
TEST  
CONDITIONS  
PARAMETER  
MIN  
MAX  
UNIT  
MIN  
MAX  
11.8  
24.1  
1
1
1
27.5  
22  
A or B  
Q or Q  
Q or Q  
Q or Q  
10.5  
12.3  
19.3  
25.9  
t
pd  
C
= 50 pF  
= 50 pF,  
= 28 pF,  
= 2 kΩ  
ns  
CLR  
L
29.5  
CLR trigger  
C
L
C
R
182  
100  
240  
110  
1.1  
300  
110  
1.1  
ns  
ext  
ext  
C
= 50 pF,  
= 0.01 µF,  
= 10 kΩ  
L
t
C
90  
90  
ms  
Q or Q  
ext  
w
R
ext  
C
= 50 pF,  
= 0.1 µF,  
= 10 kΩ  
L
C
R
0.9  
1
1
0.9  
ms  
%
ext  
ext  
t  
w
C
= 50 pF  
L
t
= Duration of pulse at Q and Q outputs  
w
t = Output pulse-duration variation (Q and Q) between circuits in same package  
w
switching characteristics over recommended operating free-air temperature range,  
V
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
8.3  
FROM  
(INPUT)  
TO  
(OUTPUT)  
TEST  
CONDITIONS  
PARAMETER  
MIN  
MAX  
UNIT  
MIN  
MAX  
14  
1
1
1
16  
13  
17  
A or B  
Q or Q  
Q or Q  
Q or Q  
7.4  
8.7  
11.4  
14.9  
t
pd  
C
= 50 pF  
= 50 pF,  
ns  
CLR  
L
CLR trigger  
C
L
C
R
= 28 pF,  
167  
100  
200  
110  
1.1  
240  
110  
1.1  
ns  
ext  
= 2 kΩ  
ext  
C
= 50 pF,  
= 0.01 µF,  
L
t
C
90  
90  
ms  
Q or Q  
ext  
R
w
= 10 kΩ  
ext  
C
= 50 pF,  
L
C
R
= 0.1 µF,  
= 10 kΩ  
0.9  
1
1
0.9  
ms  
%
ext  
ext  
t  
w
t
= Duration of pulse at Q and Q outputs  
w
t = Output pulse-duration variation (Q and Q) between circuits in same package  
w
operating characteristics, T = 25°C  
A
PARAMETER  
TEST CONDITIONS  
= 50 pF, f = 10 MHz  
L
V
TYP  
44  
UNIT  
CC  
3.3 V  
C
Power dissipation capacitance  
C
pF  
pd  
5 V  
49  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢋ ꢌ  
ꢍꢎꢉ ꢄ ꢏꢋꢐ ꢏꢑ ꢒ ꢒꢋ ꢏꢉꢓꢄ ꢋ ꢔ ꢕꢁ ꢕꢀ ꢐꢉꢓꢄ ꢋ ꢔ ꢎꢄꢐ ꢑꢅ ꢑ ꢓꢏ ꢉꢐꢕ ꢏ  
ꢖ ꢑꢐ ꢗ ꢀꢘ ꢗꢔꢑ ꢐꢐꢊꢐ ꢏꢑꢒ ꢒ ꢋ ꢏ ꢑ ꢁꢌ ꢎ ꢐꢀ  
SCLS498A − MAY 2003 − REVISED MAY 2004  
PARAMETER MEASUREMENT INFORMATION  
From Output  
Under Test  
Test  
Point  
t
w
V
CC  
C
L
Inputs or  
Outputs  
(see Note A)  
50% V  
50% V  
CC  
CC  
0 V  
LOAD CIRCUIT  
VOLTAGE WAVEFORMS  
PULSE DURATION  
V
CC  
Input A  
(see Note B)  
50% V  
CC  
0 V  
V
V
CC  
Input CLR  
(see Note B)  
50% V  
CC  
50% V  
CC  
CC  
Input B  
0 V  
50% V  
(see Note B)  
CC  
t
t
t
0 V  
PLH  
PHL  
t
t
V
PLH  
OH  
In-Phase  
Output  
V
V
OH  
50% V  
50% V  
CC  
CC  
V
In-Phase  
Output  
50% V  
CC  
OL  
OL  
t
PHL  
PLH  
PHL  
V
V
V
OH  
OH  
Out-of-Phase  
Output  
Out-of-Phase  
Output  
50% V  
50% V  
50% V  
CC  
CC  
CC  
V
OL  
OL  
VOLTAGE WAVEFORMS  
DELAY TIMES  
VOLTAGE WAVEFORMS  
DELAY TIMES  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t + 3 ns, t + 3 ns.  
O
r
f
C. The outputs are measured one at a time, with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢉ ꢊꢋꢌ  
ꢍ ꢎꢉꢄ ꢏ ꢋꢐ ꢏ ꢑꢒꢒꢋ ꢏꢉ ꢓꢄ ꢋ ꢔꢕ ꢁꢕ ꢀꢐꢉꢓ ꢄꢋ ꢔ ꢎꢄꢐ ꢑꢅ ꢑꢓꢏꢉꢐꢕ ꢏ  
ꢖꢑ ꢐ ꢗ ꢀꢘ ꢗ ꢔꢑ ꢐ ꢐꢊꢐ ꢏꢑ ꢒ ꢒꢋ ꢏ ꢑ ꢁꢌ ꢎꢐ ꢀ  
SCLS498A − MAY 2003 − REVISED MAY 2004  
APPLICATION INFORMATION  
OUTPUT PULSE DURATION  
vs  
OUTPUT PULSE DURATION  
vs  
EXTERNAL TIMING CAPACITANCE  
EXTERNAL TIMING CAPACITANCE  
1.00E+07  
1.00E+06  
1.00E+07  
1.00E+06  
V
T
A
= 3 V  
V
= 4.5 V  
CC  
= 25°C  
CC  
T = 25°C  
A
R
= 1 MΩ  
R
= 1 MΩ  
T
T
1.00E+05  
1.00E+04  
1.00E+05  
1.00E+04  
R
= 100 kΩ  
R
= 100 kΩ  
T
T
T
T
R
= 10 kΩ  
= 1 kΩ  
R
= 10 kΩ  
= 1 kΩ  
1.00E+03  
1.00E+02  
1.00E+03  
1.00E+02  
R
R
T
T
1
2
10  
3
10  
4
10  
5
10  
1
2
10  
3
10  
4
10  
5
10  
10  
10  
C
− External Timing Capacitance − pF  
C
− External Timing Capacitance − pF  
T
T
Figure 2  
Figure 3  
MINIMUM TRIGGER TIME  
vs  
OUTPUT PULSE-DURATION CONSTANT  
vs  
V
CHARACTERISTICS  
CC  
SUPPLY VOLTAGE  
10.00  
1.00  
0.10  
1.20  
1.15  
R
T
A
= 1 kΩ  
= 25°C  
R
T
t
= 10 kΩ  
= 25°C  
T
T
A
w
= K × C × R  
T T  
C
= 0.01 µF  
T
1.10  
1.05  
1.00  
C
= 1000 pF  
T
C
= 1000 pF  
T
C
= 0.01 µF  
T
C
= 1 µF, C = 0.1 µF  
T
T
C
= 100 pF  
T
0.95  
0.90  
0.01  
0
1
2
3
4
5
6
1.5  
2
2.5  
V
3
3.5  
4
4.5  
5
5.5  
6
V
CC  
− Supply Voltage − V  
− Supply Voltage − V  
CC  
Figure 5  
Figure 4  
Operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
18-Sep-2008  
PACKAGING INFORMATION  
Orderable Device  
SN74LV123ATPWREP  
V62/03661-01XE  
Status (1)  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
TSSOP  
PW  
16  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
PW  
16  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN74LV123A-EP :  
Catalog: SN74LV123A  
Automotive: SN74LV123A-Q1  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN74LV123ATPWREP TSSOP  
PW  
16  
2000  
330.0  
12.4  
6.9  
5.6  
1.6  
8.0  
12.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
TSSOP PW 16  
SPQ  
Length (mm) Width (mm) Height (mm)  
367.0 367.0 35.0  
SN74LV123ATPWREP  
2000  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All  
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time  
of order acknowledgment.  
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily  
performed.  
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide  
adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or  
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information  
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or  
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the  
third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration  
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered  
documentation. Information of third parties may be subject to additional restrictions.  
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service  
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.  
TI is not responsible or liable for any such statements.  
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements  
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support  
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which  
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause  
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use  
of any TI components in safety-critical applications.  
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to  
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and  
requirements. Nonetheless, such components are subject to these terms.  
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties  
have executed a special agreement specifically governing such use.  
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in  
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components  
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and  
regulatory requirements in connection with such use.  
TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which  
have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such  
components to meet such requirements.  
Products  
Audio  
Applications  
www.ti.com/audio  
amplifier.ti.com  
dataconverter.ti.com  
www.dlp.com  
Automotive and Transportation www.ti.com/automotive  
Communications and Telecom www.ti.com/communications  
Amplifiers  
Data Converters  
DLP® Products  
DSP  
Computers and Peripherals  
Consumer Electronics  
Energy and Lighting  
Industrial  
www.ti.com/computers  
www.ti.com/consumer-apps  
www.ti.com/energy  
dsp.ti.com  
Clocks and Timers  
Interface  
www.ti.com/clocks  
interface.ti.com  
logic.ti.com  
www.ti.com/industrial  
www.ti.com/medical  
www.ti.com/security  
Medical  
Logic  
Security  
Power Mgmt  
Microcontrollers  
RFID  
power.ti.com  
Space, Avionics and Defense www.ti.com/space-avionics-defense  
microcontroller.ti.com  
www.ti-rfid.com  
Video and Imaging  
www.ti.com/video  
OMAP Mobile Processors www.ti.com/omap  
Wireless Connectivity www.ti.com/wirelessconnectivity  
TI E2E Community  
e2e.ti.com  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2012, Texas Instruments Incorporated  

相关型号:

SN74LV123ATPWRG4Q1

汽车类双路可再触发单稳多谐振荡器 | PW | 16 | -40 to 125
TI

SN74LV123ATPWRQ1

DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR WITH SCHMITT - TRIGGER INPUTS
TI

SN74LV125

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
TI

SN74LV125A

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
TI

SN74LV125A-Q1

QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
TI

SN74LV125AD

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
TI

SN74LV125ADB

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
TI

SN74LV125ADBE4

LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14
TI

SN74LV125ADBLE

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
TI

SN74LV125ADBR

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
TI

SN74LV125ADBRE4

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
TI

SN74LV125ADBRG4

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
TI