SN74LVC16T245GQLR_技术文档

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SCES585 − JULY 2004

DGG OR DGV PACKAGE

(TOP VIEW)

D

Control Inputs V /V Levels are

IH IL

Referenced to V

Voltage

CCA

V

Isolation Feature − If Either V

Input

CC

1

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

1DIR

1B1

1B2

GND

1B3

1B4

1OE

1A1

1A2

GND

1A3

1A4

Is at GND, Both Ports Are in the

High-Impedance State

2

3

D

Overvoltage-Tolerant Inputs/Outputs Allow

Mixed-Voltage-Mode Data Communications

4

5

Fully Configurable Dual-Rail Design Allows

Each Port to Operate Over the Full 1.65-V to

5.5-V Power-Supply Range

6

7

V

CCB

1B5

CCA

8

1A5

1A6

GND

1A7

1A8

2A1

2A2

GND

2A3

2A4

D

I

Supports Partial-Power-Down Mode

9

1B6

GND

1B7

1B8

2B1

2B2

GND

2B3

2B4

off

Operation

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

description/ordering information

This 16-bit noninverting bus transceiver uses two

separate configurable power-supply rails. The

A port is designed to track V

. V

accepts

CCA CCA

any supply voltage from 1.65 V to 5.5 V. The B port

is designed to track V . V accepts any

CCB

V

CCB

2B5

CCA

supply voltage from 1.65 V to 5.5 V. This allows for

universal low-voltage bidirectional translation

between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V

voltage nodes.

2A5

2A6

GND

2A7

2A8

2OE

2B6

GND

2B7

2B8

2DIR

The

SN74LVC16T245

is

designed

for

asynchronous communication between data

buses. The device transmits data from the A bus

to the B bus or from the B bus to the A bus,

depending on the logic level at the

direction-control (DIR) input. The output-enable

(OE) input can be used to disable the outputs so

the buses are effectively isolated.

The SN74LVC16T245 is designed so that the

control pins (1DIR, 2DIR, 1OE, and 2OE) are

supplied by V

.

CCA

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

T

A

TSSOP − DGG Tape and reel SN74LVC16T245DGGR

−40°C to 85°C

TVSOP − DGV

VFBGA − GQL

Tape and reel SN74LVC16T245DGVR

Tape and reel SN74LVC16T245GQLR

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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ꢨꢥ ꢦ ꢜ ꢬꢝ ꢧꢪ ꢢ ꢦ ꢥ ꢟꢞ ꢨꢥ ꢫ ꢥ ꢭꢟ ꢧꢡꢥ ꢝꢣꢮ ꢆ ꢪꢢ ꢠꢢ ꢤꢣ ꢥꢠ ꢜꢦ ꢣꢜ ꢤ ꢨꢢ ꢣꢢ ꢢꢝ ꢨ ꢟꢣ ꢪꢥꢠ

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Copyright  2004, Texas Instruments Incorporated

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1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢖꢎ ꢉ ꢗ ꢆ ꢘꢁ ꢙꢎ ꢚꢐ ꢔ ꢑꢍꢄ ꢕ ꢅ ꢘꢄꢉꢑꢚ ꢕ ꢉꢔ ꢑꢁ ꢀꢄ ꢑꢉ ꢎꢘ ꢁ ꢑꢁꢏ ꢛ ꢌꢀꢉꢑꢉ ꢕ ꢘ ꢐꢉ ꢒꢐꢉ ꢀ

SCES585 − JULY 2004

description/ordering information (continued)

This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,

off

preventing damaging current backflow through the device when it is powered down.

The V isolation feature ensures that if either V input is at GND, both ports are in the high-impedance state.

CC

To ensure the high-impedance state during power up or power down, OE should be tied to V

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

through a pullup

CC

GQL PACKAGE

(TOP VIEW)

terminal assignments

1

2

3

4

5

6

1

2

3

4

5

6

A

B

C

D

E

F

1DIR

1B2

1B4

1B6

1B8

2B1

2B3

2B5

2B7

2DIR

NC

1OE

1A2

1A4

1A6

1A8

2A1

2A3

2A5

2A7

2OE

1B1

1B3

1B5

1B7

2B2

2B4

2B6

2B8

NC

GND

1A1

1A3

1A5

1A7

2A2

2A4

2A6

2A8

NC

A

B

C

D

V

CCB

GND

V

CCA

GND

E

F

G

H

J

GND

V

CCB

GND

V

CCA

GND

G

H

J

K

NC

NC − No internal connection

K

FUNCTION TABLE

(each 8-bit section)

INPUTS

OPERATION

B data to A bus

OE

L

DIR

L

H

A data to B bus

Isolation

H

X

logic diagram (positive logic)

24

1

2DIR

1DIR

48

25

1OE

1B1

2OE

2B1

36

47

1A1

2A1

13

2

To Seven Other Channels

2

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SCES585 − JULY 2004

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

and V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V

CCA

CCB

Input voltage range, V (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V

I

I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V

Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V

Voltage range applied to any output in the high-impedance or power-off state, V

O

(see Note 1): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V

(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V

Voltage range applied to any output in the high or low state, V

O

(see Notes 1 and 2): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V

(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V

+ 0.5 V

CCA

CCB

Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA

IK

OK

I

Output clamp current, I

(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA

O

Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

Continuous current through each V

O

, V

, and GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA

CCA CCB

Package thermal impedance, θ (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W

JA

DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W

GQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

Storage temperature range, T

stg

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.

2. The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed.

3. The package thermal impedance is calculated in accordance with JESD 51-7.

3

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SCES585 − JULY 2004

recommended operating conditions (see Notes 4 through 6)

V

CCI

V

CCO

MIN

1.65

MAX

5.5

UNIT

V

CCA

Supply voltage

V

5.5

CCB

1.65 V to 1.95 V

2.3 V to 2.7 V

3 V to 3.6 V

V

× 0.65

1.7

CCI

High-level input

voltage

Data inputs

(see Note 7)

V

IH

V

IL

V

IH

V

IL

V

2

4.5 V to 5.5 V

1.65 V to 1.95 V

2.3 V to 2.7 V

3 V to 3.6 V

V

× 0.7

CCI

V

× 0.35

CCI

0.7

0.8

Low-level input

voltage

Data inputs

(see Note 7)

4.5 V to 5.5 V

1.65 V to 1.95 V

2.3 V to 2.7 V

3 V to 3.6 V

V

× 0.3

CCI

V

CCA

× 0.65

1.7

DIR

High-level input

voltage

(Referenced to V

)

CCA

2

(see Note 8)

4.5 V to 5.5 V

1.65 V to 1.95 V

2.3 V to 2.7 V

3 V to 3.6 V

V

× 0.7

CCA

V

CCA

× 0.35

0.7

DIR

Low-level input

voltage

(Referenced to V

CCA

0.8

(see Note 8)

4.5 V to 5.5 V

V

CCA

× 0.3

5.5

V

Input voltage

0

V

I

Active state

V

CCO

Output voltage

O

3-State

3.6

−4

−8

−24

−32

4

1.65 V to 1.95 V

2.3 V to 2.7 V

3 V to 3.6 V

I

High-level output current

Low-level output current

mA

OH

4.5 V to 5.5 V

1.65 V to 1.95 V

2.3 V to 2.7 V

3 V to 3.6 V

8

I

OL

24

32

20

10

5

4.5 V to 5.5 V

1.65 V to 1.95 V

2.3 V to 2.7 V

3 V to 3.6 V

Input transition rise or

fall rate

∆t/∆v

Data inputs

ns/V

4.5 V to 5.5 V

T

A

Operating free-air temperature

−40

85

°C

NOTES: 4. V is the V associated with the data input port.

CCI

CCO

CC

is the V associated with the output port.

CC

5.

V

6. All unused data inputs of the device must be held at V

or GND to ensure proper device operation. Refer to the TI application report,

CCI

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

7. For V

8. For V

values not specified in the data sheet, V

= V

x 0.7 V, V

= V

CCI

x 0.3 V.

CCI

IH(min)

CCI

IL(max)

x 0.7 V, V

= V

CCA

IL(max)

CCA

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢃꢋ

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SCES585 − JULY 2004

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted) (see Notes 9 and 10)

T

A

= 25°C

−40°C to 85°C

PARAMETER

TEST CONDITIONS

UNIT

V

CCA

V

CCB

MIN

TYP

MAX

MIN

MAX

V

− 0.1 V

I

= −100 µA, V = V

IH

1.65 V to 4.5 V 1.65 V to 4.5 V

CCO

OH

OL

I

= −4 mA,

= −8 mA,

= −24 mA,

= −32 mA,

= 100 µA,

= 4 mA,

V = V

I

1.65V

2.3 V

3 V

1.65 V

2.3 V

3 V

1.2

1.9

2.4

3.8

IH

IL

V = V

I

V

OH

V

V = V

I

V = V

I

4.5 V

V = V

I

1.65 V to 4.5 V 1.65 V to 4.5 V

0.1

0.45

0.3

V = V

I

1.65 V

2.3 V

3 V

1.65 V

2.3 V

3 V

= 8 mA,

V = V

I

V

OL

V

= 24 mA,

= 32 mA,

V = V

0.55

I

V = V

I

4.5 V

DIR

input

I

V = V

I CCA

or GND

1.65 V to 5.5 V 1.65 V to 5.5 V

1

2

µA

0 V

0 to 5.5 V

0 V

1

2

A or B

port

I

V or V = 0 to 5.5 V

µA

off

I

O

0 to 5.5 V

A or B

ports

V

GND

= V or

CCO

O

I

OE = V

IH

1.65 V to 5.5 V 1.65 V to 5.5 V

1

2

OZ

20

−2

20

−2

20

V = V

I

or

CCI

5 V

0 V

5 V

I

O

= 0

µA

CCA

GND

1.65 V to 5.5 V 1.65 V to 5.5 V

V = V

I

or

CCI

5 V

0 V

5 V

I

= 0

µA

CCB

O

GND

V = V

I

CCI

ꢀ

I

1.65 V to 5.5 V 1.65 V to 5.5 V

30

50

CCA

CCB

O

GND

One A port at V

CCA

− 0.6 V,

A port

DIR

DIR at V , B port = OPEN

CCA

∆I

3 V to 5.5 V

µA

DIR at V

B port = OPEN,

A port at V

− 0.6 V,

CCA

50

or GND

− 0.6 V,

CCA

One B port at V

CCB

DIR at GND, A port = OPEN

B port

3 V to 5.5 V

3.3 V

3 V to 5.5 V

3.3 V

µA

pF

CCB

DIR

input

C

V = V or GND

I CCA

i

A or B

ports

V = V

O CCA/B

or GND

3.3 V

io

NOTES: 9. V

is the V

associated with the output port.

associated with the input port.

CC

CCO

V is the V

CCI

CC

10.

5

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SCES585 − JULY 2004

switching characteristics over recommended operating free-air temperature range,

= 1.8 V 0.15 V (unless otherwise noted) (see Figure 1)

V

CCA

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

V

= 5 V

CCB

0.5 V

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

MIN MAX

t

PLH

PHL

PLH

PHL

PHZ

B

A

B

A

B

A

ns

B

t

OE

t

PLZ

PHZ

t

PLZ

PZH

t

PZL

PZH

t

PZL

switching characteristics over recommended operating free-air temperature range,

= 2.5 V 0.2 V (unless otherwise noted) (see Figure 1)

V

CCA

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

V

= 5 V

CCB

0.5 V

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

MIN MAX

t

PLH

PHL

PLH

PHL

PHZ

B

A

B

A

B

A

ns

B

t

OE

t

PLZ

PHZ

t

PLZ

PZH

t

PZL

PZH

t

PZL

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢃꢋ

ꢇ ꢈ ꢌꢍꢎ ꢉ ꢏꢐꢑ ꢄꢌꢀ ꢐꢒꢒꢄꢓ ꢍꢐꢀ ꢉ ꢔꢑꢁꢀ ꢆꢕ ꢎ ꢅꢕ ꢔ

ꢖ ꢎ ꢉꢗ ꢆꢘ ꢁꢙ ꢎ ꢚꢐ ꢔ ꢑꢍꢄ ꢕ ꢅꢘ ꢄꢉꢑꢚ ꢕ ꢉ ꢔꢑꢁꢀ ꢄꢑꢉ ꢎꢘ ꢁ ꢑꢁꢏ ꢛ ꢌꢀꢉꢑꢉ ꢕ ꢘ ꢐꢉ ꢒ ꢐꢉꢀ

SCES585 − JULY 2004

switching characteristics over recommended operating free-air temperature range,

= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)

V

CCA

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

V

= 5 V

CCB

0.5 V

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

MIN MAX

t

PLH

PHL

PLH

PHL

PHZ

B

A

B

A

B

A

ns

B

t

OE

t

PLZ

PHZ

t

PLZ

PZH

t

PZL

PZH

t

PZL

switching characteristics over recommended operating free-air temperature range,

= 5 V 0.5 V (unless otherwise noted) (see Figure 1)

V

CCA

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

V

= 5 V

CCB

0.5 V

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

MIN MAX

t

PLH

PHL

PLH

PHL

PHZ

B

A

B

A

B

A

ns

B

t

OE

t

PLZ

PHZ

t

PLZ

†

t

PZH

†

t

PZL

†

t

PZH

†

t

PZL

operating characteristics, T = 25°C

A

V

=

V

=

V

=

V

=

CCA

V

= 1.8 V

V

= 2.5 V

V

= 3.3 V

V

= 5 V

PARAMETER

CCB

TEST CONDITIONS

UNIT

TYP

A port input, B port output

B port input, A port output

A port input, B port output

B port input, A port output

†

C

pdA

C

= 0, f = 10 MHz,

t = t =1 ns

L

pF

r

f

pdB

†

Power-dissipation capacitance per transceiver

7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢉ ꢊ ꢃꢋ

ꢇꢈ ꢌꢍꢎ ꢉ ꢏ ꢐ ꢑꢄ ꢌꢀꢐ ꢒꢒ ꢄꢓ ꢍꢐ ꢀ ꢉꢔ ꢑꢁ ꢀꢆ ꢕꢎ ꢅ ꢕꢔ

ꢖꢎ ꢉ ꢗ ꢆ ꢘꢁ ꢙꢎ ꢚꢐ ꢔ ꢑꢍꢄ ꢕ ꢅ ꢘꢄꢉꢑꢚ ꢕ ꢉꢔ ꢑꢁ ꢀꢄ ꢑꢉ ꢎꢘ ꢁ ꢑꢁꢏ ꢛ ꢌꢀꢉꢑꢉ ꢕ ꢘ ꢐꢉ ꢒꢐꢉ ꢀ

SCES585 − JULY 2004

power-up considerations

A proper power-up sequence always should be followed to avoid excessive supply current, bus contention,

oscillations, or other anomalies. To guard against such power-up problems, take the following precautions:

1. Connect ground before any supply voltage is applied.

2. Power up V

.

CCA

3. V

can be ramped up along with or after V

.

CCB

CCA

typical total static power consumption (I

+ I

)

CCA

CCB

Table 1

V

CCA

2.5 V

V

CCB

UNIT

0 V

1.8 V

3.3 V

5 V

0 V

1.8 V

2.5 V

3.3 V

5 V

µA

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢃꢋ

ꢇ ꢈ ꢌꢍꢎ ꢉ ꢏꢐꢑ ꢄꢌꢀ ꢐꢒꢒꢄꢓ ꢍꢐꢀ ꢉ ꢔꢑꢁꢀ ꢆꢕ ꢎ ꢅꢕ ꢔ

ꢖ ꢎ ꢉꢗ ꢆꢘ ꢁꢙ ꢎ ꢚꢐ ꢔ ꢑꢍꢄ ꢕ ꢅꢘ ꢄꢉꢑꢚ ꢕ ꢉ ꢔꢑꢁꢀ ꢄꢑꢉ ꢎꢘ ꢁ ꢑꢁꢏ ꢛ ꢌꢀꢉꢑꢉ ꢕ ꢘ ꢐꢉ ꢒ ꢐꢉꢀ

SCES585 − JULY 2004

TYPICAL CHARACTERISTICS

TYPICAL PROPAGATION DELAY (A TO B) vs LOAD CAPACITANCE

T = 25°C, V

= 1.8 V

A

CCA

10

9

10

9

8

7

6

8

7

6

5

4

3

2

5

4

3

2

1

0

1

0

5

10

15

20

− pF

25

30

35

10

15

20

− pF

25

30

35

0

5

C

L

C

L

TYPICAL PROPAGATION DELAY (B TO A) vs LOAD CAPACITANCE

T = 25°C, V

= 1.8 V

A

CCA

10

9

8

7

6

5

4

3

2

1

0

9

8

7

6

5

4

3

2

1

0

10

15

20

− pF

25

30

35

0

5

10

15

20

− pF

25

30

35

0

5

C

L

9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢉ ꢊ ꢃꢋ

ꢇꢈ ꢌꢍꢎ ꢉ ꢏ ꢐ ꢑꢄ ꢌꢀꢐ ꢒꢒ ꢄꢓ ꢍꢐ ꢀ ꢉꢔ ꢑꢁ ꢀꢆ ꢕꢎ ꢅ ꢕꢔ

ꢖꢎ ꢉ ꢗ ꢆ ꢘꢁ ꢙꢎ ꢚꢐ ꢔ ꢑꢍꢄ ꢕ ꢅ ꢘꢄꢉꢑꢚ ꢕ ꢉꢔ ꢑꢁ ꢀꢄ ꢑꢉ ꢎꢘ ꢁ ꢑꢁꢏ ꢛ ꢌꢀꢉꢑꢉ ꢕ ꢘ ꢐꢉ ꢒꢐꢉ ꢀ

SCES585 − JULY 2004

TYPICAL CHARACTERISTICS

TYPICAL PROPAGATION DELAY (A TO B) vs LOAD CAPACITANCE

T = 25°C, V

= 2.5 V

A

CCA

10

9

8

7

6

5

4

3

2

1

0

10

9

8

7

6

5

4

3

2

1

0

10

15

C

20

− pF

25

30

35

0

5

10

15

20

− pF

25

30

35

5

C

L

TYPICAL PROPAGATION DELAY (B TO A) vs LOAD CAPACITANCE

T = 25°C, V

= 2.5 V

A

CCA

10

9

8

7

6

5

4

3

2

1

10

9

8

7

6

5

4

3

2

1

0

5

10

15

C

20

− pF

L

25

30

35

25

0

5

10

15

20

− pF

30

35

C

L

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢃꢋ

ꢇ ꢈ ꢌꢍꢎ ꢉ ꢏꢐꢑ ꢄꢌꢀ ꢐꢒꢒꢄꢓ ꢍꢐꢀ ꢉ ꢔꢑꢁꢀ ꢆꢕ ꢎ ꢅꢕ ꢔ

ꢖ ꢎ ꢉꢗ ꢆꢘ ꢁꢙ ꢎ ꢚꢐ ꢔ ꢑꢍꢄ ꢕ ꢅꢘ ꢄꢉꢑꢚ ꢕ ꢉ ꢔꢑꢁꢀ ꢄꢑꢉ ꢎꢘ ꢁ ꢑꢁꢏ ꢛ ꢌꢀꢉꢑꢉ ꢕ ꢘ ꢐꢉ ꢒ ꢐꢉꢀ

SCES585 − JULY 2004

TYPICAL CHARACTERISTICS

TYPICAL PROPAGATION DELAY (A TO B) vs LOAD CAPACITANCE

T = 25°C, V

= 3.3 V

A

CCA

10

9

10

9

8

7

6

8

7

6

5

4

3

2

5

4

3

2

1

0

1

0

5

10

15

20

− pF

25

30

35

0

5

10

15

20

− pF

25

30

35

C

L

C

L

TYPICAL PROPAGATION DELAY (B TO A) vs LOAD CAPACITANCE

T = 25°C, V

= 3.3 V

A

CCA

10

9

10

9

8

7

6

5

4

3

2

5

4

3

2

1

0

1

0

5

10

15

20

− pF

25

30

35

0

5

10

15

20

− pF

25

30

35

C

L

11

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢉ ꢊ ꢃꢋ

ꢇꢈ ꢌꢍꢎ ꢉ ꢏ ꢐ ꢑꢄ ꢌꢀꢐ ꢒꢒ ꢄꢓ ꢍꢐ ꢀ ꢉꢔ ꢑꢁ ꢀꢆ ꢕꢎ ꢅ ꢕꢔ

ꢖꢎ ꢉ ꢗ ꢆ ꢘꢁ ꢙꢎ ꢚꢐ ꢔ ꢑꢍꢄ ꢕ ꢅ ꢘꢄꢉꢑꢚ ꢕ ꢉꢔ ꢑꢁ ꢀꢄ ꢑꢉ ꢎꢘ ꢁ ꢑꢁꢏ ꢛ ꢌꢀꢉꢑꢉ ꢕ ꢘ ꢐꢉ ꢒꢐꢉ ꢀ

SCES585 − JULY 2004

TYPICAL CHARACTERISTICS

TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE

T = 25°C, V

= 5 V

A

CCA

10

9

8

7

6

7

6

5

4

3

2

5

4

3

2

1

0

1

0

5

10

15

C

20

− pF

25

30

35

0

5

10

15

C

20

25

30

35

− pF

L

TYPICAL PROPAGATION DELAY (B TO A) vs LOAD CAPACITANCE

T = 25°C, V

= 5 V

A

CCA

10

9

8

9

8

7

6

7

6

5

4

3

2

5

4

3

2

1

0

1

0

5

10

15

C

20

− pF

25

30

35

0

5

10

15

C

20

− pF

25

30

35

L

12

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢃꢋ

ꢇ ꢈ ꢌꢍꢎ ꢉ ꢏꢐꢑ ꢄꢌꢀ ꢐꢒꢒꢄꢓ ꢍꢐꢀ ꢉ ꢔꢑꢁꢀ ꢆꢕ ꢎ ꢅꢕ ꢔ

ꢖ

ꢎ

ꢉ

ꢗ

ꢆ

ꢘ

ꢁ

ꢙ

ꢎ

ꢚꢐ

ꢔ

ꢑ

ꢍ

ꢄ

ꢕ

ꢅ

ꢘ

ꢄ

ꢉ

ꢑ

ꢚ

ꢕ

ꢉ

ꢔ

ꢑ

ꢁ

ꢀ

ꢄꢑꢉ

ꢎ

ꢘ

ꢁ

ꢑ

ꢁ

ꢏ

ꢛ

ꢌ

ꢀ

ꢉ

ꢑ

ꢉ

ꢕ

ꢘ

ꢐ

ꢉ

ꢒ

ꢐ

ꢉ

ꢀ

SCES585 − JULY 2004

PARAMETER MEASUREMENT INFORMATION

2 × V

CCO

TEST

S1

Open

2 × V

S1

R

Open

GND

t

L

pd

From Output

Under Test

t

/t

PLZ PZL

CCO

GND

t

/t

PHZ PZH

C

L

R

L

(see Note A)

t

LOAD CIRCUIT

w

V

CCI

V /2

CCI

V /2

CCI

Input

V

TP

C

R

V

CCO

L

0 V

1.8 V 0.15 V

2.5 V 0.2 V

3.3 V 0.3 V

5 V 0.5 V

2 kΩ

0.15 V

0.3 V

15 pF

VOLTAGE WAVEFORMS

PULSE DURATION

0.3 V

V

CCA

Output

Control

(low-level

enabling)

V

CCA

/2

V

CCA

/2

0 V

t

PLZ

PZL

V

CCO

Output

Waveform 1

V

CCI

V

CCO

/2

Input

t

V /2

CCI

V /2

CCI

V

OL

+ V

TP

S1 at 2 × V

CCO

OL

0 V

(see Note B)

t

PZH

PHZ

t

PLH

PHL

Output

Waveform 2

S1 at GND

V

OH

V

OH

V

OH

− V

TP

V

CCO

Output

V

CCO

/2

V

/2

CCO

(see Note B)

0 V

V

OL

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

NOTES: A.

C

includes probe and jig capacitance.

L

B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRRꢁ10 MHz, Z = 50 Ω, dv/dt ≥ 1 V/ns,

O

dv/dt ≥1 V/ns.

D. The outputs are measured one at a time, with one transition per measurement.

E.

F.

G.

H.

I.

t

V

and t

are the same as t

.

PLZ

PZL

PLH

PHZ

PZH

PHL

dis

are the same as t

are the same as t .

en

pd

is the V

associated with the input port.

associated with the output port.

CC

CCI

CC

is the V

CCO

J. All parameters and waveforms are not applicable to all devices.

Figure 2. Load Circuit and Voltage Waveforms

13

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000

DGV (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

24 PINS SHOWN

0,23

0,13

M

0,07

0,40

24

13

0,16 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

0°–ā8°

0,75

1

12

0,50

A

Seating Plane

0,08

0,15

0,05

1,20 MAX

PINS **

14

16

20

24

38

48

56

DIM

A MAX

A MIN

3,70

3,50

3,70

3,50

5,10

4,90

5,10

4,90

7,90

7,70

9,80

9,60

11,40

11,20

4073251/E 08/00

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.

D. Falls within JEDEC: 24/48 Pins – MO-153

14/16/20/56 Pins – MO-194

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MTSS003D – JANUARY 1995 – REVISED JANUARY 1998

DGG (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

48 PINS SHOWN

0,27

0,17

M

0,08

0,50

48

25

6,20

6,00

8,30

7,90

0,15 NOM

Gage Plane

0,25

1

24

0°–8°

A

0,75

0,50

Seating Plane

0,10

0,15

0,05

1,20 MAX

PINS **

48

56

64

DIM

A MAX

12,60

12,40

14,10

13,90

17,10

16,90

A MIN

4040078/F 12/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold protrusion not to exceed 0,15.

D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

enhancements, improvements, and other changes to its products and services at any time and to discontinue

any product or service without notice. Customers should obtain the latest relevant information before placing

orders and should verify that such information is current and complete. All products are sold subject to TI’s terms

and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for

their products and applications using TI components. To minimize the risks associated with customer products

and applications, customers should provide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,

copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process

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does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.

Use of such information may require a license from a third party under the patents or other intellectual property

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is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.

Following are URLs where you can obtain information on other Texas Instruments products and application

solutions:

Products

Applications

Audio

Amplifiers

amplifier.ti.com

www.ti.com/audio

Data Converters

dataconverter.ti.com

Automotive

www.ti.com/automotive

DSP

dsp.ti.com

Broadband

Digital Control

Military

www.ti.com/broadband

www.ti.com/digitalcontrol

www.ti.com/military

Interface

Logic

interface.ti.com

logic.ti.com

Power Mgmt

Microcontrollers

power.ti.com

Optical Networking

Security

www.ti.com/opticalnetwork

www.ti.com/security

www.ti.com/telephony

www.ti.com/video

microcontroller.ti.com

Telephony

Video & Imaging

Wireless

www.ti.com/wireless

Mailing Address:

Texas Instruments

Post Office Box 655303 Dallas, Texas 75265


型号：	SN74LVC16T245GQLR
厂家：	TEXAS INSTRUMENTS
描述：	16 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS 可配置电压转换和3态输出16位双电源总线收发器总线收发器输出元件
文件：	总17页 (文件大小：325K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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