SN74LVC1T45QDCKRQ1 [TI]
具有可配置电压转换的汽车类 Single-Bit 双电源总线收发器 | DCK | 6 | -40 to 125;型号: | SN74LVC1T45QDCKRQ1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有可配置电压转换的汽车类 Single-Bit 双电源总线收发器 | DCK | 6 | -40 to 125 光电二极管 逻辑集成电路 总线收发器 |
文件: | 总20页 (文件大小:542K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN74LVC1T45-Q1
www.ti.com .......................................................................................................................................... SCES677A –SEPTEMBER 2006–REVISED AUGUST 2009
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
Check for Samples: SN74LVC1T45-Q1
1
FEATURES
•
Qualified for Automotive Applications
•
Maximum Data Rates
•
Customer-Specific Configuration Control Can
Be Supported Along With Major-Change
Approval
–
–
–
–
420 Mbps (3.3-V to 5-V Translation)
210 Mbps (Translate to 3.3 V)
140 Mbps (Translate to 2.5 V)
75 Mbps (Translate to 1.8 V)
•
•
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
DCK PACKAGE
(TOP VIEW)
VCC Isolation Feature – If Either VCC Input Is at
GND, Both Ports Are in the High-Impedance
State
VCCA
GND
A
VCCB
DIR
B
1
2
3
6
5
4
•
•
•
DIR Input Circuit Referenced to VCCA
±24-mA Output Drive at 3.3 V
Ioff Supports Partial-Power-Down Mode
Operation
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is
designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track
VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional
translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVC1T45 is designed for asynchronous communication between two data buses. The logic levels of
the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data
from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the
A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic
HIGH or LOW level applied to prevent excess ICC and ICCZ
.
The SN74LVC1T45 is designed so that the DIR input is powered by VCCA
.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance
state.
ORDERING INFORMATION(1)
(2)
TA
PACKAGE
ORDERABLE PART NUMBER
TOP-SIDE MARKING
–40°C to 105°C
SOT (SC-70) – DCK
Reel of 3000
SN74LVC1T45TDCKRQ1
5TR
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006–2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LVC1T45-Q1
SCES677A –SEPTEMBER 2006–REVISED AUGUST 2009 .......................................................................................................................................... www.ti.com
FUNCTION TABLE(1)
INPUT
OPERATION
DIR
L
B data to A bus
A data to B bus
H
(1) Input circuits of the data I/Os
always are active.
LOGIC DIAGRAM (POSITIVE LOGIC)
5
3
DIR
A
4
B
VCCA
VCCB
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCCA
Supply voltage range
VCCB
–0.5
6.5
V
VI
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
–0.5
–0.5
6.5
6.5
V
V
VO
A port
Voltage range applied to any output in the high or low state(2) (3)
B port
–0.5 VCCA + 0.5
VO
V
–0.5 VCCB + 0.5
IIK
IOK
IO
Input clamp current
VI < 0
–50
–50
mA
mA
mA
mA
°C/W
°C
Output clamp current
VO < 0
Continuous output current
Continuous current through VCC or GND
Package thermal impedance(4)
Storage temperature range
±50
±100
259
θJA
DCK package
Tstg
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3) The value of VCC is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
2
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www.ti.com .......................................................................................................................................... SCES677A –SEPTEMBER 2006–REVISED AUGUST 2009
Recommended Operating Conditions(1) (2) (3)
VCCI
VCCO
MIN
1.65
MAX
5.5
UNIT
VCCA
VCCB
Supply voltage
V
1.65
5.5
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
VCCI × 0.65
1.7
High-level
input voltage
VIH
VIL
VIH
VIL
Data inputs(4)
V
V
V
V
2
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
VCCI × 0.7
VCCI × 0.35
0.7
Low-level
input voltage
Data inputs(4)
0.8
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
VCCI × 0.3
VCCA × 0.65
1.7
2
High-level
input voltage
(5)
(5)
DIR (referenced to VCCA
DIR (referenced to VCCA
)
)
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
VCCA × 0.7
VCCA × 0.35
0.7
Low-level
input voltage
0.8
4.5 V to 5.5 V
VCCA × 0.3
VI
Input voltage
0
0
5.5
VCCO
–4
V
V
VO
Output voltage
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
–8
IOH
High-level output current
Low-level output current
mA
mA
–24
–32
4
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
8
IOL
24
4.5 V to 5.5 V
32
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
20
20
Data inputs
Input transition
rise or fall rate
Δt/Δv
10
ns/V
°C
4.5 V to 5.5 V
1.65 V to 5.5 V
5
Control inputs
Operating free-air temperature
5
TA
–40
105
(1) VCCI is the VCC associated with the input port.
(2) VCCO is the VCC associated with the output port.
(3) All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
(4) For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V.
(5) For VCCI values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V.
Copyright © 2006–2009, Texas Instruments Incorporated
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SCES677A –SEPTEMBER 2006–REVISED AUGUST 2009 .......................................................................................................................................... www.ti.com
Electrical Characteristics(1) (2)
over recommended operating free-air temperature range (unless otherwise noted)
TA = –40°C to
TA = 25°C
105°C
PARAMETER
TEST CONDITIONS
VCCA
VCCB
UNIT
MIN
TYP
MAX
MIN
MAX
VCCO
– 0.1
IOH = –100 µA
1.65 V to 4.5 V
1.65 V to 4.5 V
IOH = –4 mA
IOH = –8 mA
IOH = –24 mA
IOH = –32 mA
IOL = 100 µA
IOL = 4 mA
1.65 V
2.3 V
1.65 V
2.3 V
1.2
1.9
2.3
3.8
VOH
VI = VIH
V
3 V
3 V
4.5 V
4.5 V
1.65 V to 4.5 V
1.65 V
1.65 V to 4.5 V
1.65 V
0.1
0.45
0.4
VOL
IOL = 8 mA
VI = VIL
2.3 V
2.3 V
V
IOL = 24 mA
IOL = 32 mA
VI = VCCA or GND
3 V
3 V
0.65
0.65
±4
4.5 V
4.5 V
II
DIR
1.65 V to 5.5 V
0 V
1.65 V to 5.5 V
0 to 5.5 V
0 V
±1
±1
±1
µA
µA
A port
B port
±10
±10
Ioff
VI or VO = 0 to 5.5 V
VO = VCCO or GND
0 to 5.5 V
A or B
port
IOZ
1.65 V to 5.5 V
1.65 V to 5.5 V
±1
±10
µA
µA
1.65 V to 5.5 V
5.5 V
1.65 V to 5.5 V
0 V
10
4
ICCA
VI = VCCI or GND,
IO = 0
0 V
5.5 V
–10
10
–10
4
1.65 V to 5.5 V
5.5 V
1.65 V to 5.5 V
0 V
ICCB
VI = VCCI or GND,
VI = VCCI or GND,
IO = 0
IO = 0
µA
µA
0 V
5.5 V
ICCA + ICCB
A port
1.65 V to 5.5 V
1.65 V to 5.5 V
20
A port at VCCA – 0.6 V,
DIR at VCCA, B port = open
50
50
50
ΔICCA
3 V to 5.5 V
3 V to 5.5 V
µA
DIR at VCCA – 0.6 V,
B port = open,
A port at VCCA or GND
DIR
B port at VCCB – 0.6 V,
DIR at GND, A port = open
ΔICCB
Ci
B port
DIR
3 V to 5.5 V
3.3 V
3 V to 5.5 V
3.3 V
µA
pF
pF
VI = VCCA or GND
2.5
6
A or B
port
Cio
VO = VCCA/B or GND
3.3 V
3.3 V
(1) VCCO is the VCC associated with the output port.
(2) VCCI is the VCC associated with the input port.
4
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www.ti.com .......................................................................................................................................... SCES677A –SEPTEMBER 2006–REVISED AUGUST 2009
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 1)
VCCB = 1.8 V
±0.15 V
VCCB = 2.5 V
±0.2 V
VCCB = 3.3 V
±0.3 V
VCCB = 5 V
±0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
3
MAX
MIN
2.2
2.2
2.3
2.1
4.8
2.1
4.9
2.2
MAX
MIN
1.7
1.8
2.1
2
MAX
MIN
1.4
1.7
1.9
1.8
5.1
3.1
2.3
2.0
MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
20.7
17.3
20.7
17.3
22.7
13.5
27.9
19
13.3
11.5
19
11.3
10.1
18.5
15.6
21.4
13.7
13.3
11.4
29.9
28.9
25
10.2
10
A
B
A
A
B
A
B
ns
ns
ns
ns
ns
ns
2.8
3
18.1
15.2
20.1
13.9
11.2
9.4
B
2.8
5.2
2.3
7.4
4.2
15.9
21.5
13.5
14.5
12.2
31.2
30.4
26.8
33
4.7
2.4
3.6
2.3
DIR
DIR
DIR
DIR
(1)
tPZH
39.7
45.2
34.2
40.7
27.5
26.4
24.1
30.1
(1)
tPZL
(1)
tPZH
(1)
tPZL
31.5
(1) The enable time is a calculated value, derived using the formula shown in the enable times section.
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 1)
VCCB = 1.8 V
±0.15 V
VCCB = 2.5 V
±0.2 V
VCCB = 3.3 V
±0.3 V
VCCB = 5 V
±0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
2.3
2.1
2.2
2.2
3
MAX
MIN
1.5
1.4
1.5
1.4
2.1
1.3
4.1
2.2
MAX
MIN
MAX
9.4
MIN
1.1
0.9
1
MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
19
15.9
13.3
11.5
11.1
8.9
11.5
10.5
11.5
10.7
11.1
8.9
1.3
1.3
1.4
1.3
2.3
1.3
3.0
2.5
8.1
7.6
A
B
A
A
B
A
B
ns
ns
ns
ns
ns
ns
8.4
11
10.5
9.2
B
10
0.9
3.2
1
11.1
8.9
11.1
8.8
DIR
DIR
DIR
DIR
1.3
6.5
3.5
26.7
21.9
35.2
38.2
27.9
27
14.4
12.6
24.1
24.9
20.4
21.6
13.2
11.4
22.4
23.2
18.3
19.5
1.9
1.6
10.1
8.3
(1)
tPZH
18.8
19.3
16.9
18.7
(1)
tPZL
(1)
tPZH
(1)
tPZL
(1) The enable time is a calculated value, derived using the formula shown in the enable times section.
Copyright © 2006–2009, Texas Instruments Incorporated
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SCES677A –SEPTEMBER 2006–REVISED AUGUST 2009 .......................................................................................................................................... www.ti.com
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 1)
VCCB = 1.8 V
±0.15 V
VCCB = 2.5 V
±0.2 V
VCCB = 3.3 V
±0.3 V
VCCB = 5 V
±0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
2.1
2
MAX
MIN
1.4
1.3
1.3
1.3
2.4
1.6
3.9
2.1
MAX
MIN
0.7
0.8
0.7
0.8
1.5
1.9
2.9
2.4
MAX
MIN
0.7
0.7
0.6
0.7
2.4
2.0
1.7
1.5
MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
18.5
15.6
11.3
10.1
10.3
8.6
11
10
8.8
8
7.4
7
A
B
A
A
B
A
B
ns
ns
ns
ns
ns
ns
1.7
1.8
2.3
1.8
5.4
2.3
9.4
8.8
8.4
B
8.4
8
7.5
10.3
8.6
10.3
8.7
10.3
8.7
DIR
DIR
DIR
DIR
27.5
17.5
28.8
37.6
27.1
25.9
13.1
10.8
20.2
21.5
19.6
20.3
11.8
10.1
18.9
19.8
17.5
18.3
9.8
7.9
(1)
tPZH
16.3
17.3
16.1
17.3
(1)
tPZL
(1)
tPZH
(1)
tPZL
(1) The enable time is a calculated value, derived using the formula shown in the enable times section.
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 5 V ± 0.5 V (see Figure 1)
VCCB = 1.8 V
±0.15 V
VCCB = 2.5 V
±0.2 V
VCCB = 3.3 V
±0.3 V
VCCB = 5 V
±0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
1.9
1.8
1.4
1.7
2.1
0.9
4.8
2.6
MAX
MIN
1
MAX
MIN
MAX
8.4
7.5
7.4
7
MIN
0.5
0.5
0.5
0.5
2.0
0.9
1.7
1.6
MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
18.1
15.2
10.2
10
10.5
9.2
0.6
0.7
0.7
0.7
2.2
1
6.9
6.5
A
B
A
A
B
A
B
ns
ns
ns
ns
ns
ns
0.9
1
8.1
6.9
B
0.9
2.0
1
7.6
6.5
8.4
8.4
8.5
6.7
11.5
10
8.4
DIR
DIR
DIR
DIR
6.8
6.8
6.7
26.2
17.8
28
2.5
2.0
14.8
10.4
18.5
22.4
17.3
17.6
1
9.5
2.5
7.5
(1)
tPZH
17.4
18.5
15.1
16
14.4
16
(1)
tPZL
36.2
24.9
23.6
(1)
tPZH
13.6
14.9
(1)
tPZL
(1) The enable time is a calculated value, derived using the formula shown in the enable times section.
6
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Product Folder Link(s): SN74LVC1T45-Q1
SN74LVC1T45-Q1
www.ti.com .......................................................................................................................................... SCES677A –SEPTEMBER 2006–REVISED AUGUST 2009
Operating Characteristics
TA = 25°C
VCCA
VCCB = 1.8 V
=
VCCA
VCCB = 2.5 V
=
VCCA
VCCB = 3.3 V
=
VCCA =
VCCB = 5 V
TEST
CONDITIONS
PARAMETER
UNIT
TYP
TYP
TYP
TYP
A-port input,
B-port output
3
18
18
3
4
19
19
4
4
20
20
4
4
21
21
4
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
(1)
CpdA
pF
B-port input,
A-port output
A-port input,
B-port output
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
(1)
CpdB
pF
B-port input,
A-port output
(1) Power dissipation capacitance per transceiver
Power-Up Considerations
A proper power-up sequence always should be followed to avoid excessive supply current, bus contention,
oscillations, or other anomalies. To guard against such power-up problems, take the following precautions:
1. Connect ground before any supply voltage is applied.
2. Power up VCCA
.
3. VCCB can be ramped up along with or after VCCA
.
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TYPICAL CHARACTERISTICS
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 1.8 V
10
9
10
9
8
7
6
5
4
3
2
1
0
V
= 1.8 V
CCB
8
V
= 1.8 V
= 2.5 V
CCB
7
6
V
V
= 2.5 V
= 3.3 V
CCB
V
V
CCB
5
CCB
4
V
CCB
= 5 V
= 3.3 V
= 5 V
CCB
3
V
CCB
2
1
0
20
0
5
10
15
C − pF
25
30
35
10
15
20
25
30
35
0
5
C − pF
L
L
TYPICAL PROPAGATION DELAY (B to A) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 1.8 V
10
9
10
9
V
V
= 1.8 V
= 2.5 V
CCB
8
7
6
5
4
3
2
1
0
8
7
6
5
4
3
2
1
0
CCB
V
= 1.8 V
CCB
V
V
= 3.3 V
= 5 V
CCB
CCB
V
CCB
V
CCB
V
CCB
= 2.5 V
= 3.3 V
= 5 V
0
5
10
15
20
C − pF
25
30
35
35
10
15
20
25
30
0
5
C − pF
L
L
8
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TYPICAL CHARACTERISTICS (continued)
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 2.5 V
10
9
10
9
8
7
6
5
4
3
2
1
0
V
CCB
= 1.8 V
8
7
V
= 1.8 V
= 2.5 V
CCB
6
5
4
3
2
1
0
V
CCB
= 2.5 V
V
CCB
V
V
= 3.3 V
= 5 V
CCB
CCB
V
V
= 3.3 V
= 5 V
CCB
CCB
10
15
20
25
30
35
0
5
10
15
C − pF
20
25
30
35
0
5
C − pF
L
L
TYPICAL PROPAGATION DELAY (B to A) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 2.5 V
10
10
9
8
7
6
5
4
3
2
1
0
9
8
7
6
V
CCB
= 1.8 V
V
= 1.8 V
= 2.5 V
CCB
5
4
3
2
1
0
V
V
= 2.5 V
= 3.3 V
CCB
CCB
V
CCB
V
CCB
= 5 V
V
V
= 3.3 V
= 5 V
CCB
CCB
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
C − pF
L
C − pF
L
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SN74LVC1T45-Q1
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TYPICAL CHARACTERISTICS (continued)
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 3.3 V
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
V
= 1.8 V
CCB
V
V
= 1.8 V
= 2.5 V
CCB
V
V
= 2.5 V
= 3.3 V
CCB
CCB
CCB
V
= 5 V
CCB
V
V
= 3.3 V
= 5 V
CCB
CCB
15
C − pF
25
10
20
30
35
0
5
10
15
C − pF
25
0
5
20
30
35
L
L
TYPICAL PROPAGATION DELAY (B to A) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 3.3 V
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
V
= 1.8 V
= 2.5 V
CCB
V
V
= 1.8 V
= 2.5 V
CCB
V
CCB
CCB
V
V
= 3.3 V
= 5 V
CCB
V
V
= 3.3 V
= 5 V
CCB
CCB
CCB
35
10
15
20
25
30
35
0
5
10
15
20
25
30
0
5
C − pF
L
C − pF
L
10
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Product Folder Link(s): SN74LVC1T45-Q1
SN74LVC1T45-Q1
www.ti.com .......................................................................................................................................... SCES677A –SEPTEMBER 2006–REVISED AUGUST 2009
TYPICAL CHARACTERISTICS (continued)
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 5 V
10
9
8
7
6
5
4
3
2
1
0
10
9
8
V
= 1.8 V
CCB
7
V
= 1.8 V
= 2.5 V
CCB
6
5
4
3
2
V
V
= 2.5 V
= 3.3 V
CCB
V
CCB
CCB
V
= 5 V
10
CCB
V
V
= 3.3 V
= 5 V
CCB
1
0
CCB
35
20
15
C − pF
25
30
0
5
0
5
10
15
20
25
30
35
C − pF
L
L
TYPICAL PROPAGATION DELAY (B to A) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 5 V
10
10
9
8
7
6
5
4
3
2
1
0
9
8
7
6
5
V
V
= 1.8 V
= 2.5 V
CCB
V
= 1.8 V
= 2.5 V
CCB
4
3
2
CCB
V
CCB
V
V
= 3.3 V
= 5 V
CCB
V
V
= 3.3 V
= 5 V
CCB
CCB
1
0
CCB
5
0
10
15
20
25
30
35
25
30
35
10
15
20
0
5
C − pF
L
C − pF
L
Copyright © 2006–2009, Texas Instruments Incorporated
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SN74LVC1T45-Q1
SCES677A –SEPTEMBER 2006–REVISED AUGUST 2009 .......................................................................................................................................... www.ti.com
PARAMETER MEASUREMENT INFORMATION
2 × V
CCO
TEST
S1
S1
R
L
Open
GND
t
Open
pd
From Output
Under Test
t
t
/t
/t
2 × V
CCO
GND
PLZ PZL
PHZ PZH
C
L
R
L
(see Note A)
t
w
LOAD CIRCUIT
V
CCI
V
CCI
/2
V
CCI
/2
Input
C
L
V
TP
R
L
V
CCO
0 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
2 kΩ
2 kΩ
2 kΩ
2 kΩ
0.15 V
0.15 V
0.3 V
15 pF
15 pF
15 pF
15 pF
VOLTAGE WAVEFORMS
PULSE DURATION
0.3 V
V
CCA
Output
Control
(low-level
enabling)
V /2
CCA
V
CCA
/2
t
0 V
t
PZL
PLZ
V
V
CCO
Output
Waveform 1
V
CCI
V
/2
/2
CCO
Input
V
CCI
/2
V
CCI
/2
V
+ V
OL
TP
S1 at 2 × V
CCO
OL
0 V
(see Note B)
t
t
PZH
PHZ
t
t
PHL
PLH
Output
Waveform 2
S1 at GND
V
OH
V
OH
V
OH
− V
TP
V
CCO
Output
V /2
CCO
V
CCO
/2
(see Note B)
0 V
V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR v10 MHz, Z = 50 Ω, dv/dt ≥ 1 V/ns.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
H.
I.
t
t
t
V
V
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PLH
PHZ
are the same as t
PZH
en
are the same as t .
pd
PHL
is the V associated with the input port.
CC
CCI
is the V associated with the output port.
CCO
CC
J. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
12
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Product Folder Link(s): SN74LVC1T45-Q1
SN74LVC1T45-Q1
www.ti.com .......................................................................................................................................... SCES677A –SEPTEMBER 2006–REVISED AUGUST 2009
APPLICATION INFORMATION
Figure 2 shows an example of the SN74LVC1T45 being used in a unidirectional logic level-shifting application.
VCC1
VCC1
VCC2
VCC2
1
2
3
6
5
4
SYSTEM-1
SYSTEM-2
PIN
1
NAME
VCCA
GND
A
FUNCTION
VCC1
GND
OUT
DESCRIPTION
SYSTEM-1 supply voltage (1.65 V to 5.5 V)
Device GND
2
3
Output level depends on VCC1 voltage.
Input threshold value depends on VCC2 voltage.
GND (low level) determines B-port to A-port direction.
SYSTEM-2 supply voltage (1.65 V to 5.5 V)
4
B
IN
5
DIR
VCCB
DIR
6
VCC2
Figure 2. Unidirectional Logic Level-Shifting Application
Copyright © 2006–2009, Texas Instruments Incorporated
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SCES677A –SEPTEMBER 2006–REVISED AUGUST 2009 .......................................................................................................................................... www.ti.com
Figure 3 shows the SN74LVC1T45 being used in a bidirectional logic level-shifting application. Since the
SN74LVC1T45 does not have an output-enable (OE) pin, the system designer should take precautions to avoid
bus contention between SYSTEM-1 and SYSTEM-2 when changing directions.
VCC1
VCC1
VCC2
VCC2
Pullup/Down
or Bus Hold(1)
Pullup/Down
or Bus Hold(1)
I/O-1
I/O-2
1
2
3
6
5
4
DIR CTRL
SYSTEM-1
SYSTEM-2
The following table shows data transmission from SYSTEM-1 to SYSTEM-2 and then from SYSTEM-2 to
SYSTEM-1.
STATE DIR CTRL
I/O-1
I/O-2
DESCRIPTION
1
H
Out
In
SYSTEM-1 data to SYSTEM-2
SYSTEM-2 is getting ready to send data to SYSTEM-1. I/O-1 and I/O-2 are disabled. The
bus-line state depends on pullup or pulldown.(1)
2
H
Hi-Z
Hi-Z
DIR bit is flipped. I/O-1 and I/O-2 still are disabled. The bus-line state depends on pullup or
pulldown.(1)
3
4
L
L
Hi-Z
Out
Hi-Z
In
SYSTEM-2 data to SYSTEM-1
(1) SYSTEM-1 and SYSTEM-2 must use the same conditions, i.e., both pullup or both pulldown.
Figure 3. Bidirectional Logic Level-Shifting Application
Enable Times
Calculate the enable times for the SN74LVC1T45 using the following formulas:
•
•
•
•
tPZH (DIR to A) = tPLZ (DIR to B) + tPLH (B to A)
tPZL (DIR to A) = tPHZ (DIR to B) + tPHL (B to A)
tPZH (DIR to B) = tPLZ (DIR to A) + tPLH (A to B)
tPZL (DIR to B) = tPHZ (DIR to A) + tPHL (A to B)
In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is
switched until an output is expected. For example, if the SN74LVC1T45 initially is transmitting from A to B, then
the DIR bit is switched; the B port of the device must be disabled before presenting it with an input. After the B
port has been disabled, an input signal applied to it appears on the corresponding A port after the specified
propagation delay.
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Product Folder Link(s): SN74LVC1T45-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
30-Jan-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
SN74LVC1T45TDCKRQ1
ACTIVE
SC70
DCK
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVC1T45-Q1 :
Catalog: SN74LVC1T45
•
Enhanced Product: SN74LVC1T45-EP
•
NOTE: Qualified Version Definitions:
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
30-Jan-2012
Catalog - TI's standard catalog product
•
•
Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Jan-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74LVC1T45TDCKRQ1 SC70
DCK
6
3000
180.0
8.4
2.25
2.4
1.22
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Jan-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SC70 DCK
SPQ
Length (mm) Width (mm) Height (mm)
202.0 201.0 28.0
SN74LVC1T45TDCKRQ1
6
3000
Pack Materials-Page 2
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