SN74LVC2G07DCKRT [TI]
LVC/LCX/Z SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6;型号: | SN74LVC2G07DCKRT |
厂家: | TEXAS INSTRUMENTS |
描述: | LVC/LCX/Z SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6 驱动器 输出元件 |
文件: | 总13页 (文件大小:363K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢂ
ꢊꢋꢌ ꢄ ꢍꢋꢎ ꢎ ꢏ ꢐꢑ ꢊꢐ ꢒ ꢅꢏ ꢐ
ꢓ ꢒꢔ ꢕ ꢖ ꢗꢏꢁ ꢘꢊꢐꢌꢒ ꢁ ꢖ ꢋꢔ ꢗ ꢋꢔꢀ
SCES308E − AUGUST 2001 − REVISED SEPTEMBER 2003
DBV OR DCK PACKAGE
(TOP VIEW)
D
Available in the Texas Instruments
NanoStar and NanoFree Packages
D
Supports 5-V V
Operation
CC
1
2
3
6
5
4
1A
GND
2A
1Y
D
Inputs and Open-Drain Outputs Accept
Voltages Up To 5.5 V
V
CC
2Y
D
D
D
D
D
D
D
D
Max t of 3.7 ns at 3.3 V
pd
Low Power Consumption, 10-µA Max I
CC
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
24-mA Output Drive at 3.3 V
Typical V (Output Ground Bounce)
OLP
CC
3 4
2 5
1 6
2A
GND
1A
2Y
<0.8 V at V
= 3.3 V, T = 25°C
A
V
CC
Typical V
(Output V
Undershoot)
1Y
OHV
OH
>2 V at V
= 3.3 V, T = 25°C
CC
A
I
Supports Partial-Power-Down Mode
off
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
This dual buffer/driver is designed for 1.65-V to 5.5-V V
operation. The output of the SN74LVC2G07 is open
CC
drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high
wired-AND functions. The maximum sink current is 32 mA.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
‡
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
SN74LVC2G07YEAR
SN74LVC2G07YZAR
SN74LVC2G07YEPR
SN74LVC2G07YZPR
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
Reel of 3000
_ _ _CV_
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
−40°C to 85°C
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
SOT (SOT-23) − DBV
Reel of 3000
Reel of 3000
Reel of 250
SN74LVC2G07DBVR
SN74LVC2G07DCKR
SN74LVC2G07DCKT
C07_
CV_
SOT (SC-70) − DCK
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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Copyright 2003, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢉꢂ
ꢊ ꢋꢌꢄ ꢍ ꢋ ꢎꢎ ꢏꢐ ꢑꢊ ꢐꢒ ꢅ ꢏꢐ
ꢓꢒ ꢔꢕ ꢖꢗꢏ ꢁꢘꢊ ꢐ ꢌꢒ ꢁ ꢖ ꢋꢔꢗ ꢋꢔ ꢀ
SCES308E − AUGUST 2001 − REVISED SEPTEMBER 2003
description/ordering information (continued)
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
FUNCTION TABLE
(each buffer/driver)
INPUT
A
OUTPUT
Y
H
L
H
L
logic diagram (positive logic)
1
3
6
4
1A
2A
1Y
2Y
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
I
Voltage range applied to any output in the high-impedance or power-off state, V
O
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, V
O
(see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
O
Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous current through V
O
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
CC
Package thermal impedance, θ (see Note 3): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165°C/W
JA
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259°C/W
YEA/YZA package . . . . . . . . . . . . . . . . . . . . . . . . . . . 143°C/W
YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . 123°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of V is provided in the recommended operating conditions table.
CC
3. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢂ
ꢊꢋꢌ ꢄ ꢍꢋꢎ ꢎ ꢏ ꢐꢑ ꢊꢐ ꢒ ꢅꢏ ꢐ
ꢓ ꢒꢔ ꢕ ꢖ ꢗꢏꢁ ꢘꢊꢐꢌꢒ ꢁ ꢖ ꢋꢔ ꢗ ꢋꢔꢀ
SCES308E − AUGUST 2001 − REVISED SEPTEMBER 2003
recommended operating conditions (see Note 4)
MIN
1.65
MAX
UNIT
Operating
5.5
V
Supply voltage
V
CC
IH
Data retention only
1.5
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3 V to 3.6 V
0.65 × V
1.7
CC
V
High-level input voltage
V
V
2
= 4.5 V to 5.5 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3 V to 3.6 V
0.7 × V
CC
0.35 × V
0.7
0.8
0.3 × V
5.5
5.5
4
CC
V
IL
Low-level input voltage
= 4.5 V to 5.5 V
CC
V
V
Input voltage
0
0
V
V
I
Output voltage
O
V
V
= 1.65 V
= 2.3 V
CC
8
CC
16
I
Low-level output current
mA
OL
V
CC
= 3 V
24
V
CC
V
CC
V
CC
V
CC
= 4.5 V
32
= 1.8 V 0.15 V, 2.5 V 0.2 V
= 3.3 V 0.3 V
= 5 V 0.5 V
20
10
∆t/∆v Input transition rise or fall rate
ns/V
5
T
A
Operating free-air temperature
−40
85
°C
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
TYP
PARAMETER
TEST CONDITIONS
V
MIN
MAX
0.1
UNIT
CC
I
I
I
I
I
= 100 mA
= 4 mA
1.65 V to 5.5 V
1.65 V
OL
OL
OL
OL
OL
0.45
0.3
= 8 mA
2.3 V
V
V
OL
= 16 mA
= 24 mA
0.4
3 V
0.55
4.5 V
0 to 5.5 V
0
0.55
5
I
= 32 mA
OL
I
I
I
A inputs
V = 5.5 V or GND
mA
mA
mA
mA
pF
I
I
V or V = 5.5 V
10
off
I
O
V = 5.5 V or GND,
I = 0
O
1.65 V to 5.5 V
3 V to 5.5 V
3.3 V
10
CC
I
∆I
CC
One input at V
CC
− 0.6 V,
Other inputs at V
CC
or GND
500
C
V = V
or GND
= 3.3 V, T = 25°C.
3.5
i
I
CC
†
All typical values are at V
CC
A
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢊ ꢋꢌꢄ ꢍ ꢋ ꢎꢎ ꢏꢐ ꢑꢊ ꢐꢒ ꢅ ꢏꢐ
ꢓꢒ ꢔꢕ ꢖꢗꢏ ꢁꢘꢊ ꢐ ꢌꢒ ꢁ ꢖ ꢋꢔꢗ ꢋꢔ ꢀ
SCES308E − AUGUST 2001 − REVISED SEPTEMBER 2003
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
V
= 1.8 V
V
= 2.5 V
V
= 3.3 V
V
= 5 V
CC
0.15 V
CC
0.2 V
CC
0.3 V
CC
0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
1.5
MAX
MIN
MAX
MIN
MAX
MIN
MAX
2.9
t
pd
A
8.6
1
4.4
1
3.7
1
ns
Y
operating characteristics, T = 25°C
A
V
CC
= 1.8 V
V
= 2.5 V
V
CC
= 3.3 V
V
= 5 V
CC
TYP
CC
TYP
PARAMETER
TEST CONDITIONS
f = 10 MHz
UNIT
TYP
TYP
C
Power dissipation capacitance
3
3
4
4
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢂ
ꢊꢋꢌ ꢄ ꢍꢋꢎ ꢎ ꢏ ꢐꢑ ꢊꢐ ꢒ ꢅꢏ ꢐ
ꢓ ꢒꢔ ꢕ ꢖ ꢗꢏꢁ ꢘꢊꢐꢌꢒ ꢁ ꢖ ꢋꢔ ꢗ ꢋꢔꢀ
SCES308E − AUGUST 2001 − REVISED SEPTEMBER 2003
PARAMETER MEASUREMENT INFORMATION
(OPEN DRAIN)
V
LOAD
Open
GND
S1
R
L
TEST
S1
From Output
Under Test
t
(see Notes E and F)
(see Notes E and G)
V
V
V
PZL
LOAD
LOAD
LOAD
C
L
t
PLZ
R
(see Note A)
L
t
/t
PHZ PZH
LOAD CIRCUIT
INPUT
t /t
V
M
V
V
∆
C
R
V
CC
LOAD
L
L
V
I
r f
1.8 V 0.15 V
2.5 V 0.2 V
3.3 V 0.3 V
5 V 0.5 V
V
V
V
V
/2
/2
2 × V
2 × V
6 V
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
≤ 2 ns
≤ 2 ns
≤ 2.5 ns
≤ 2.5 ns
30 pF
30 pF
50 pF
50 pF
CC
CC
CC
CC
CC
CC
3 V
1.5 V
/2
V
CC
V
CC
2 × V
CC
0.3 V
V
I
Timing Input
Data Input
V
M
0 V
t
w
t
t
h
su
V
I
V
I
V
M
V
M
Input
V
M
V
M
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
I
I
Output
Control
V
M
V
M
V
M
V
M
Input
0 V
0 V
t
t
t
t
t
PHL
PZL
PLZ
+ V
PLH
Output
Waveform 1
V
V
OH
V
/2
/2
LOAD
S1 at V
(see Note B)
V
V
V
V
V
M
LOAD
M
M
V
V
OL
∆
Output
V
OL
OL
t
t
t
PHZ
PHL
PLH
PZH
Output
Waveform 2
V
V
OH
V
− VLOAD
LOAD/2
∆
S1 at V
(see Note B)
V
M
M
M
LOAD
Output
≈0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω.
O
D. The outputs are measured one at a time with one transition per measurement.
E. Since this device has open-drain outputs, t
and t
PZL
are the same as t .
pd
PLZ
F.
G.
t
t
is measured at V
.
M
PZL
PLZ
is measured at V
+ V .
OL
∆
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
4-Oct-2005
PACKAGING INFORMATION
Orderable Device
SN74LVC2G07DBVR
SN74LVC2G07DBVRE4
SN74LVC2G07DBVRG4
SN74LVC2G07DCKR
SN74LVC2G07DCKRE4
SN74LVC2G07DCKRG4
SN74LVC2G07DCKT
SN74LVC2G07DCKTE4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
6
6
6
6
6
6
6
6
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SC70
DBV
DBV
DCK
DCK
DCK
DCK
DCK
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC2G07YEAR
SN74LVC2G07YEPR
SN74LVC2G07YZAR
ACTIVE
ACTIVE
ACTIVE
WCSP
WCSP
WCSP
YEA
YEP
YZA
6
6
6
3000
3000
3000
TBD
TBD
SNPB
SNPB
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Pb-Free
(RoHS)
SNAGCU
SN74LVC2G07YZPR
ACTIVE
WCSP
YZP
6
3000
Pb-Free
(RoHS)
SNAGCU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS114 – FEBRUARY 2002
DCK (R-PDSO-G6)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
M
0,10
0,65
6
4
0,13 NOM
1,40 2,40
1,10 1,80
1
3
Gage Plane
2,15
1,85
0,15
0°–8°
0,46
0,26
Seating Plane
0,10
1,10
0,80
0,10
0,00
4093553-3/D 01/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-203
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