SN74LVC4245A-EP_15 [TI]
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS;型号: | SN74LVC4245A-EP_15 |
厂家: | TEXAS INSTRUMENTS |
描述: | OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS 输出元件 |
文件: | 总8页 (文件大小:123K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
SCAS375D – MARCH 1994 – REVISED JUNE 1998
DB, DW, OR PW PACKAGE
EPIC (Enhanced-Performance Implanted
CMOS) Submicron Process
(TOP VIEW)
3.3-V to 5-V Bidirectional Level Shifter
(5 V) V
1
2
3
4
5
6
7
8
9
24
23
V
V
(3.3 V)
(3.3 V)
CCA
DIR
CCB
CCB
Latch-Up Performance Exceeds 250 mA Per
JESD 17
A1
A2
A3
A4
A5
A6
A7
22 OE
21 B1
20 B2
19 B3
18 B4
17 B5
16 B6
15 B7
14 B8
13 GND
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages
description
A8 10
This 8-bit (octal) noninverting bus transceiver
contains two separate supply rails; B port has
GND 11
GND 12
V
, which is set at 3.3 V, and A port has V
,
CCB
CCA
which is set at 5 V. This allows for translation from
a 3.3-V to a 5-V environment, and vice versa.
The SN74LVC4245A is designed for asynchronous communication between data buses. The device transmits
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are
effectively isolated.
The SN74LVC4245A pinout allows the designer to switch to a normal all-3.3-V or all-5-V 20-pin ’245 device
without board re-layout. The designer uses the data paths for pins 2–11 and 14–23 of the SN74LVC4245A to
align with the conventional ’245 pinout.
The SN74LVC4245A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OPERATION
OE
L
DIR
L
B data to A bus
A data to B bus
Isolation
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
SCAS375D – MARCH 1994 – REVISED JUNE 1998
logic diagram (positive logic)
2
DIR
22
21
OE
B1
3
A1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range for V
= 5 V (unless
CCA
†
otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V
CCA
Input voltage range, V : A port (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
I
CCA
Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V
Output voltage range, V : A port (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V + 0.5 V
O
CCA
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
O
Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each V
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104°C/W
O
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
CCA
JA
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. This value is limited to 6 V maximum.
2. The package thermal impedance is calculated in accordance with JESD 51.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
SCAS375D – MARCH 1994 – REVISED JUNE 1998
absolute maximum ratings over operating free-air temperature range for V
= 3.3 V (unless
CCB
†
otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V
CCB
Input voltage range, V : B port (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CCB
CCB
Output voltage range, V : B port (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
IK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
OK
O
Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104°C/W
O
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
CCB
JA
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 2. The package thermal impedance is calculated in accordance with JESD 51.
3. This value is limited to 4.6 V maximum.
recommended operating conditions for V
= 5 V (see Note 4)
CCA
MIN
4.5
2
MAX
UNIT
V
V
V
V
V
V
Supply voltage
5.5
CCA
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
V
0.8
V
0
0
V
CCA
V
I
Output voltage
V
CCA
–24
V
O
I
I
High-level output current
Low-level output current
Operating free-air temperature
mA
mA
°C
OH
OL
24
85
T
A
–40
NOTE 4: All unused inputs of the device must be held at the associated V
or GND to ensure proper device operation. Refer to the TI application
report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CC
recommended operating conditions for V
= 3.3 V (see Note 4)
CCB
MIN
2.7
2
MAX
UNIT
V
V
V
V
V
Supply voltage
3.6
V
V
V
V
V
CCB
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
V
V
= 2.7 V to 3.6 V
= 2.7 V to 3.6 V
CCB
0.8
CCB
0
0
V
CCB
I
Output voltage
V
CCB
–12
O
V
CCB
V
CCB
V
CCB
V
CCB
= 2.7 V
= 3 V
I
High-level output current
mA
OH
–24
12
= 2.7 V
= 3 V
I
Low-level output current
mA
OL
24
T
A
Operating free-air temperature
–40
85
°C
NOTE 4: All unused inputs of the device must be held at the associated V
or GND to ensure proper device operation. Refer to the TI application
CC
report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
SCAS375D – MARCH 1994 – REVISED JUNE 1998
electrical characteristics over recommended operating free-air temperature range for V
(unless otherwise noted) (see Note 5)
= 5 V
CCA
†
PARAMETER
TEST CONDITIONS
V
CCA
MIN TYP
MAX
UNIT
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
Open
5 V
4.3
5.3
3.7
4.7
I
I
I
I
= –100 µA
= –24 mA
= 100 µA
= 24 mA
OH
OH
OL
OL
V
V
V
OH
0.2
0.2
0.55
0.55
±1
V
OL
I
I
I
Control inputs V = V
or GND
µA
µA
µA
mA
pF
pF
I
I
CCA
= V
‡
A port
V
or GND
CCA
or GND,
±5
OZ
CCA
O
V = V
I = 0
O
80
I
CCA
One input at 3.4 V,
Control inputs V = V or GND
§
∆I
CCA
Other inputs at V
or GND
1.5
CCA
C
C
5
i
I
CCA
= V or GND
CCA
A port
V
11
io
O
†
‡
§
All typical values are measured at V
= 5 V, T = 25°C.
A
CC
includes the input leakage current.
For I/O ports, the parameter I
OZ
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or the associated V
.
CC
NOTE 5: V
= 2.7 V to 3.6 V
CCB
electrical characteristics over recommended operating free-air temperaturerangeforV
(unless otherwise noted) (see Note 6)
=3.3 V
CCB
¶
PARAMETER
TEST CONDITIONS
V
CCB
MIN TYP
MAX
UNIT
I
I
= –100 µA
2.7 V to 3.6 V
V
–0.2
2.2
2.4
2
OH
CC
2.7 V
V
= –12 mA
V
OH
OH
3 V
I
I
I
I
= –24 mA
= 100 µA
= 12 mA
= 24 mA
3 V
OH
OL
OL
OL
2.7 V to 3.6 V
0.2
0.4
0.55
±5
V
OL
2.7 V
V
3 V
‡
I
I
B port
B port
V
= V
or GND
3.6 V
3.6 V
µA
µA
mA
pF
OZ
CCB
O
CCB
or GND,
V = V
I = 0
O
50
I
CCB
§
One input at V
– 0.6 V,
Other inputs at V
or GND 2.7 V to 3.6 V
3.3 V
0.5
∆I
CCB
or GND
CCB
CCB
io
C
V
= V
11
O
CCB
includes the input leakage current.
‡
§
¶
For I/O ports, the parameter I
OZ
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or the associated V
.
CC
All typical values are measured at V
= 3.3 V, T = 25°C.
A
CC
NOTE 6: V
= 5 V ± 0.5 V
CCA
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
SCAS375D – MARCH 1994 – REVISED JUNE 1998
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figures 1 and 2)
V
= 5 V ± 0.5 V,
= 2.7 V TO 3.6 V
CCA
FROM
(INPUT)
TO
(OUTPUT)
V
CCB
PARAMETER
UNIT
MIN
MAX
6.3
6.7
6.1
5
t
t
t
t
t
t
t
t
t
t
t
t
1
1
1
1
1
1
1
1
1
1
1
1
PHL
PLH
PHL
PLH
PZL
PZH
PZL
PZH
PLZ
PHZ
PLZ
PHZ
A
B
B
A
A
B
A
B
ns
ns
ns
ns
ns
ns
9
OE
OE
OE
OE
8.1
8.8
9.8
7
5.8
7.7
7.8
operating characteristics, V
= 5 V, V
= 3.3 V, T = 25°C
CCA
CCB
A
PARAMETER
TEST CONDITIONS
= 0, f = 10 MHz
L
TYP
UNIT
Outputs enabled
Outputs disabled
39.5
5
C
Power dissipation capacitance per transceiver
C
pF
pd
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
SCAS375D – MARCH 1994 – REVISED JUNE 1998
PARAMETER MEASUREMENT INFORMATION (A PORT)
2 × V
CC
Open
S1
500 Ω
From Output
Under Test
TEST
S1
GND
t
/t
Open
PLH PHL
/t
C
= 50 pF
L
t
2 × V
CC
GND
PLZ PZL
500 Ω
(see Note A)
t
/t
PHZ PZH
LOAD CIRCUIT
t
w
V
CC
Input
1.5 V
1.5 V
3 V
0 V
0 V
Output
Control
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
t
PZL
t
PLZ
Output
Waveform 1
V
V
CC
V
CC
50% V
CC
CC
V
V
+ 0.3 V
– 0.3 V
S1 at 2 × V
(see Note B)
OL
1.5 V
1.5 V
CC
Input
OL
0 V
V
t
PHZ
t
t
PZH
50% V
t
PHL
PLH
50% V
Output
Waveform 2
S1 at GND
V
OH
OH
OH
Output
50% V
CC
CC
≈ 0 V
(see Note B)
V
OL
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NONINVERTING OUTPUTS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A.
C
includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
SCAS375D – MARCH 1994 – REVISED JUNE 1998
PARAMETER MEASUREMENT INFORMATION (B PORT)
7 V
Open
GND
S1
500 Ω
From Output
Under Test
TEST
S1
t
/t
Open
7 V
PLH PHL
/t
C
= 50 pF
L
t
PLZ PZL
500 Ω
(see Note A)
t
/t
GND
PHZ PZH
LOAD CIRCUIT
t
w
3 V
Input
1.5 V
1.5 V
3 V
0 V
0 V
Output
Control
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
t
PZL
t
PLZ
Output
Waveform 1
S1 at 7 V
3.5 V
3 V
0 V
1.5 V
V
V
+ 0.3 V
– 0.3 V
OL
1.5 V
1.5 V
Input
V
OL
(see Note B)
t
PHZ
t
t
PZH
t
PHL
PLH
V
OH
Output
Waveform 2
S1 at GND
V
V
OH
OH
1.5 V
Output
1.5 V
1.5 V
≈ 0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A.
C
includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
Figure 2. Load Circuit and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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Copyright 1998, Texas Instruments Incorporated
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