SN74LVCC4245ADBLE [TI]

OCTAL DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS; 具有可配置的输出电压和三态输出的八路双电源总线收发器
SN74LVCC4245ADBLE
型号: SN74LVCC4245ADBLE
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

OCTAL DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
具有可配置的输出电压和三态输出的八路双电源总线收发器

总线驱动器 总线收发器 逻辑集成电路 光电二极管 输出元件
文件: 总16页 (文件大小:305K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74LVCC4245A  
OCTAL DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS  
www.ti.com  
SCAS584MNOVEMBER 1996REVISED MARCH 2005  
FEATURES  
DB, DW, NS, OR PW PACKAGE  
(TOP VIEW)  
Bidirectional Voltage Translator  
4.5 V to 5.5 V on A Port and 2.7 V to 5.5 V on  
B Port  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
V
DIR  
V
CCB  
CCA  
2
NC  
OE  
B1  
B2  
B3  
Control Inputs VIH/VIL Levels Are Referenced  
to VCCA Voltage  
3
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
4
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
5
6
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
7
B4  
8
B5  
B6  
B7  
B8  
9
10  
11  
12  
– 1000-V Charged-Device Model (C101)  
GND  
GND  
GND  
NC - No internal connection  
DESCRIPTION/ORDERING INFORMATION  
This 8-bit (octal) noninverting bus transceiver uses two separate power-supply rails. The A port, VCCA, is  
dedicated to accepting a 5-V supply level, and the configurable B port, which is designed to track VCCB, accepts  
voltages from 3 V to 5 V. This allows for translation from a 3.3-V to a 5-V environment and vice versa.  
The SN74LVCC4245A is designed for asynchronous communication between data buses. The device transmits  
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses  
effectively are isolated. The control circuitry (DIR, OE) is powered by VCCA  
.
ORDERING INFORMATION  
TA  
PACKAGE(1)  
Tube of 25  
ORDERABLE PART NUMBER  
SN74LVCC4245ADW  
TOP-SIDE MARKING  
LVCC4245A  
SOIC – DW  
Reel of 2000  
Reel of 2000  
Reel of 2000  
Tube of 60  
SN74LVCC4245ADWR  
SN74LVCC4245ANSR  
SN74LVCC4245ADBR  
SN74LVCC4245APW  
SN74LVCC4245APWR  
SN74LVCC4245APWT  
SOP – NS  
LVCC4245A  
LG245A  
–40°C to 85°C  
SSOP – DB  
TSSOP – PW  
Reel of 2000  
Reel of 250  
LG245A  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
FUNCTION TABLE  
(EACH TRANSCEIVER)  
INPUTS  
OPERATION  
OE DIR  
L
L
L
H
X
B data to A bus  
A data to B bus  
Isolation  
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1996–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
SN74LVCC4245A  
OCTAL DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS  
www.ti.com  
SCAS584MNOVEMBER 1996REVISED MARCH 2005  
LOGIC DIAGRAM (POSITIVE LOGIC)  
2
DIR  
22  
OE  
B1  
3
A1  
21  
To Seven Other Channels  
Absolute Maximum Ratings(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
MAX  
UNIT  
VCCA  
Supply voltage range  
VCCB  
–0.5  
6
V
I/O ports (A port)  
–0.5 VCCA + 0.5  
VI  
Input voltage range(2)  
Output voltage range(2)  
I/O ports (B port)  
Except I/O ports  
A port  
–0.5 VCCB + 0.5  
V
–0.5 VCCA + 0.5  
–0.5 VCCA + 0.5  
VO  
V
B port  
–0.5 VCCB + 0.5  
IIK  
IOK  
IO  
Input clamp current  
VI < 0  
–50  
–50  
±50  
±100  
63  
mA  
mA  
mA  
mA  
Output clamp current  
VO < 0  
Continuous output current  
Continuous current through VCCA, VCCB, or GND  
DB package  
DW package  
NS package  
PW package  
46  
θJA  
Package thermal impedance(3)  
°C/W  
°C  
65  
88  
Tstg  
Storage temperature range  
–65  
150  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) This value is limited to 6 V maximum.  
(3) The package thermal impedance is calculated in accordance with JESD 51-7.  
2
SN74LVCC4245A  
OCTAL DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS  
www.ti.com  
SCAS584MNOVEMBER 1996REVISED MARCH 2005  
Recommended Operating Conditions(1)  
VCCA  
VCCB  
MIN NOM  
MAX  
5.5  
UNIT  
V
VCCA  
VCCB  
Supply voltage  
Supply voltage  
4.5  
2.7  
2
5
3.3  
5.5  
V
2.7 V  
3.6 V  
5.5 V  
2.7 V  
3.6 V  
5.5 V  
2.7 V  
3.6 V  
5.5 V  
2.7 V  
3.6 V  
5.5 V  
2.7 V  
3.6 V  
5.5 V  
2.7 V  
3.6 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
VIHA  
VIHB  
VILA  
VILB  
VIH  
High-level input voltage  
2
V
V
V
V
V
V
2
2
High-level input voltage  
2
3.85  
0.8  
0.8  
Low-level input voltage  
0.8  
0.8  
Low-level input voltage  
0.8  
1.65  
2
2
2
High-level input voltage (control pins) (referenced to VCCA  
)
0.8  
0.8  
VIL  
Low-level input voltage (control pins) (referenced to VCCA)  
0.8  
VIA  
Input voltage  
0
0
0
0
VCCA  
VCCB  
VCCA  
VCCB  
–24  
–24  
24  
V
V
VIB  
Input voltage  
VOA  
VOB  
IOHA  
IOHB  
IOLA  
IOLB  
TA  
Output voltage  
V
Output voltage  
V
High-level output current  
High-level output current  
Low-level output current  
Low-level output current  
Operating free-air temperature  
4.5 V  
4.5 V  
4.5 V  
4.5 V  
3 V  
mA  
mA  
mA  
mA  
°C  
2.7 V to 4.5 V  
3 V  
2.7 V to 4.5 V  
24  
–40  
85  
(1) All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI  
application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
3
SN74LVCC4245A  
OCTAL DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS  
www.ti.com  
SCAS584MNOVEMBER 1996REVISED MARCH 2005  
Electrical Characteristics  
over recommended operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
VCCA  
4.5 V  
4.5 V  
4.5 V  
VCCB  
3 V  
MIN  
4.4  
TYP  
4.49  
4.25  
2.99  
2.5  
MAX UNIT  
IOH = –100 µA  
IOH = –24 mA  
IOH = –100 µA  
VOHA  
V
3 V  
3.76  
2.9  
3 V  
2.7 V  
3 V  
2.2  
IOH = –12 mA  
4.5 V  
2.46  
2.1  
2.85  
2.3  
VOHB  
V
2.7 V  
3 V  
IOH = –24 mA  
4.5 V  
2.25  
3.76  
2.65  
4.25  
4.5 V  
3 V  
IOL = 100 µA  
IOL = 24 mA  
IOL = 100 µA  
IOL = 12 mA  
4.5 V  
4.5 V  
4.5 V  
4.5 V  
0.1  
V
VOLA  
VOLB  
II  
3 V  
0.21  
0.44  
3 V  
0.1  
2.7 V  
2.7 V  
3 V  
0.11  
0.22  
0.21  
0.18  
±0.1  
±0.1  
±0.5  
8
0.44  
0.5  
0.44  
0.44  
±1  
V
IOL = 24 mA  
4.5 V  
4.5 V  
3.6 V  
5.5 V  
3.6 V  
Open  
3.6 V  
5.5 V  
3.6 V  
5.5 V  
Control inputs  
VI = VCCA or GND  
5.5 V  
µA  
µA  
±1  
(1)  
IOZ  
A or B ports  
B to A  
VO = VCCA/B or GND,  
An = VCC or GND  
VI = VIL or VIH  
5.5 V  
5.5 V  
±5  
80  
ICCA  
8
80  
µA  
µA  
IO (A port) = 0,  
Bn = VCCB or GND  
IO (B port) = 0  
5.5 V  
5.5 V  
8
80  
5
50  
ICCB  
A to B  
An = VCCA or GND,  
8
80  
VI = VCCA – 2.1 V, Other inputs at VCCA or GND,  
OE at GND and DIR at VCCA  
A port  
OE  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
3.6 V  
3.6 V  
1.35  
1
1.5  
1.5  
1.5  
0.5  
VI = VCCA – 2.1 V, Other inputs at VCCA or GND,  
DIR at VCCA or GND  
(2)  
(2)  
ICCA  
mA  
mA  
VI = VCCA – 2.1 V, Other inputs at VCCA or GND,  
OE at VCCA or GND  
DIR  
1
VI = VCCB – 0.6 V, Other inputs at VCCB or GND,  
OE at GND and DIR at GND  
ICCB  
B port  
0.35  
Ci  
Control inputs  
A or B ports  
VI = VCCA or GND  
Open  
5 V  
Open  
3.3 V  
5
pF  
pF  
Cio  
VO = VCCA/B or GND  
11  
(1) For I/O ports, the parameter IOZ includes the input leakage current.  
(2) This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or the associated  
VCC  
.
4
SN74LVCC4245A  
OCTAL DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS  
www.ti.com  
SCAS584MNOVEMBER 1996REVISED MARCH 2005  
Switching Characteristics  
over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1 through  
Figure 4)  
VCCA = 5 V ± 0.5 V,  
VCCB = 5 V ± 0.5 V  
VCCA = 5 V ± 0.5 V,  
VCCB = 2.7 V to 3.6 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
1
MAX  
MIN  
1
MAX  
7
tPHL  
tPLH  
tPHL  
tPLH  
tPZL  
tPZH  
tPZL  
tPZH  
tPLZ  
tPHZ  
tPLZ  
tPHZ  
7.1  
6
A
B
A
A
B
A
B
ns  
ns  
ns  
ns  
ns  
ns  
1
1
7
1
6.8  
6.1  
9
1
6.2  
5.3  
9
B
1
1
1
1
OE  
OE  
OE  
OE  
1
8.3  
8.2  
8.1  
4.7  
4.9  
5.4  
6.3  
1
8
1
1
10  
10.2  
5.2  
5.2  
5.4  
7.4  
1
1
1
1
1
1
1
1
1
1
Operating Characteristics  
VCCA = 5 V, VCCB = 3.3 V, TA = 25°C  
PARAMETER  
TEST CONDITIONS  
CL = 0, f = 10 MHz  
TYP  
UNIT  
pF  
Outputs enabled  
Outputs disabled  
20  
Cpd  
Power dissipation capacitance per transceiver  
6.5  
(1)  
Power-Up Considerations  
TI level-translation devices offer an opportunity for successful mixed-voltage signal design. A proper power-up  
sequence always should be followed to avoid excessive supply current, bus contention, oscillations, or other  
anomalies caused by improperly biased device pins. Take these precautions to guard against such power-up  
problems:  
1. Connect ground before any supply voltage is applied.  
2. Power up the control side of the device (VCCA for all four of these devices).  
3. Tie OE to VCCA with a pullup resistor so that it ramps with VCCA  
.
4. Depending on the direction of the data path, DIR can be high or low. If DIR high is needed (A data to B bus),  
ramp it with VCCA. Otherwise, keep DIR low.  
(1) Refer to the TI application report, Texas Instruments Voltage-Level-Translation Devices, literature number SCEA021.  
5
SN74LVCC4245A  
OCTAL DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS  
www.ti.com  
SCAS584MNOVEMBER 1996REVISED MARCH 2005  
PARAMETER MEASUREMENT INFORMATION FOR A TO B  
VCCA = 4.5 V TO 5.5 V AND VCCB = 2.7 V TO 3.6 V  
6 V  
S1  
Open  
GND  
500 Ω  
From Output  
Under Test  
TEST  
/t  
S1  
C = 50 pF  
(see Note A)  
L
t
Open  
6 V  
PLH PHL  
500 Ω  
t
/t  
PLZ PZL  
t
/t  
GND  
PHZ PZH  
LOAD CIRCUIT  
t
w
3 V  
0 V  
1.5 V  
1.5 V  
Input  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
t
t
PZL  
PLZ  
Output  
Waveform 1  
S1 at 6 V  
3 V  
3 V  
0 V  
1.5 V  
V
V
+ 0.3 V  
1.5 V  
1.5 V  
OL  
Input  
V
OL  
(see Note B)  
t
t
PZH  
PHZ  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at GND  
V
V
V
OH  
OH  
- 0.3 V  
1.5 V  
OH  
1.5 V  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
NONINVERTING OUTPUTS  
1.5 V  
Output  
0 V  
(see Note B)  
OL  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.  
E. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
6
SN74LVCC4245A  
OCTAL DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS  
www.ti.com  
SCAS584MNOVEMBER 1996REVISED MARCH 2005  
PARAMETER MEASUREMENT INFORMATION FOR A TO B  
VCCA = 4.5 V TO 5.5 V AND VCCB = 3.6 V TO 5.5 V  
7 V  
S1  
Open  
GND  
500 Ω  
From Output  
Under Test  
TEST  
/t  
S1  
C = 50 pF  
(see Note A)  
L
t
Open  
7 V  
PLH PHL  
500 Ω  
t
/t  
PLZ PZL  
t
/t  
GND  
PHZ PZH  
LOAD CIRCUIT  
t
w
3 V  
0 V  
1.5 V  
1.5 V  
Input  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
t
t
PLZ  
PZL  
Output  
Waveform 1  
S1 at 7 V  
3.5 V  
3 V  
0 V  
1.5 V  
V
+ 0.3 V  
OL  
1.5 V  
1.5 V  
Input  
V
OL  
(see Note B)  
t
t
PZH  
PHZ  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at GND  
V
V
V
OH  
OH  
V
- 0.3 V  
1.5 V  
OH  
1.5 V  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
NONINVERTING OUTPUTS  
1.5 V  
Output  
0 V  
(see Note B)  
OL  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.  
E. All parameters and waveforms are not applicable to all devices.  
Figure 2. Load Circuit and Voltage Waveforms  
7
SN74LVCC4245A  
OCTAL DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS  
www.ti.com  
SCAS584MNOVEMBER 1996REVISED MARCH 2005  
PARAMETER MEASUREMENT INFORMATION FOR B TO A  
VCCA = 4.5 V to 5.5 V AND VCCB = 2.7 V TO 3.6 V  
2 × V  
CCA  
S1  
Open  
GND  
500 Ω  
From Output  
Under Test  
TEST  
/t  
S1  
C = 50 pF  
(see Note A)  
L
t
Open  
PLH PHL  
500 Ω  
t
/t  
2 × V  
CCA  
PLZ PZL  
t
/t  
GND  
PHZ PZH  
LOAD CIRCUIT  
t
w
3 V  
0 V  
1.5 V  
1.5 V  
Input  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
t
t
PZL  
PLZ  
Output  
Waveform 1  
V
V
CCA  
3 V  
0 V  
1.5 V  
S1 at 2 × V  
V + 0.3 V  
OL  
1.5 V  
1.5 V  
CCA  
Input  
OL  
(see Note B)  
t
t
PZH  
PHZ  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at GND  
V
V
V
OH  
OH  
V
- 0.3 V  
1.5 V  
OH  
1.5 V  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
NONINVERTING OUTPUTS  
1.5 V  
Output  
0 V  
(see Note B)  
OL  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.  
E. All parameters and waveforms are not applicable to all devices.  
Figure 3. Load Circuit and Voltage Waveforms  
8
SN74LVCC4245A  
OCTAL DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS  
www.ti.com  
SCAS584MNOVEMBER 1996REVISED MARCH 2005  
PARAMETER MEASUREMENT INFORMATION FOR B TO A  
VCCA = 4.5 V TO 5.5 V AND VCCB = 3.6 V TO 5.5 V  
7 V  
S1  
Open  
GND  
500 Ω  
From Output  
Under Test  
TEST  
/t  
S1  
C = 50 pF  
(see Note A)  
L
t
Open  
7 V  
PLH PHL  
500 Ω  
t
/t  
PLZ PZL  
t
/t  
GND  
PHZ PZH  
LOAD CIRCUIT  
t
w
3 V  
0 V  
1.5 V  
1.5 V  
Input  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
t
t
PLZ  
PZL  
Output  
Waveform 1  
S1 at 7 V  
3 V  
3 V  
0 V  
1.5 V  
V
+ 0.3 V  
OL  
1.5 V  
1.5 V  
Input  
V
OL  
(see Note B)  
t
t
PZH  
PHZ  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at GND  
V
V
V
OH  
OH  
V
- 0.3 V  
1.5 V  
OH  
1.5 V  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
NONINVERTING OUTPUTS  
1.5 V  
Output  
0 V  
(see Note B)  
OL  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.  
E. All parameters and waveforms are not applicable to all devices.  
Figure 4. Load Circuit and Voltage Waveforms  
9
PACKAGE OPTION ADDENDUM  
www.ti.com  
9-Aug-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
SSOP  
SSOP  
Drawing  
SN74LVCC4245ADBLE  
SN74LVCC4245ADBR  
OBSOLETE  
ACTIVE  
DB  
24  
24  
TBD  
Call TI  
Call TI  
DB  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVCC4245ADBRE4  
SN74LVCC4245ADW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SOIC  
SOIC  
SOIC  
SOIC  
SO  
DB  
DW  
DW  
DW  
DW  
NS  
24  
24  
24  
24  
24  
24  
24  
24  
24  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVCC4245ADWE4  
SN74LVCC4245ADWR  
SN74LVCC4245ADWRE4  
SN74LVCC4245ANSR  
SN74LVCC4245ANSRE4  
SN74LVCC4245APW  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
NS  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
PW  
PW  
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVCC4245APWE4  
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVCC4245APWLE  
SN74LVCC4245APWR  
OBSOLETE TSSOP  
PW  
PW  
24  
24  
TBD  
Call TI  
Call TI  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVCC4245APWRE4  
SN74LVCC4245APWT  
SN74LVCC4245APWTE4  
PW  
PW  
PW  
24  
24  
24  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
9-Aug-2005  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to discontinue  
any product or service without notice. Customers should obtain the latest relevant information before placing  
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms  
and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
deems necessary to support this warranty. Except where mandated by government requirements, testing of all  
parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for  
their products and applications using TI components. To minimize the risks associated with customer products  
and applications, customers should provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,  
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process  
in which TI products or services are used. Information published by TI regarding third-party products or services  
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.  
Use of such information may require a license from a third party under the patents or other intellectual property  
of the third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without  
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction  
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for  
such altered documentation.  
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that  
product or service voids all express and any implied warranties for the associated TI product or service and  
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.  
Following are URLs where you can obtain information on other Texas Instruments products and application  
solutions:  
Products  
Applications  
Audio  
Amplifiers  
amplifier.ti.com  
www.ti.com/audio  
Data Converters  
dataconverter.ti.com  
Automotive  
www.ti.com/automotive  
DSP  
dsp.ti.com  
Broadband  
Digital Control  
Military  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
Interface  
Logic  
interface.ti.com  
logic.ti.com  
Power Mgmt  
Microcontrollers  
power.ti.com  
Optical Networking  
Security  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
microcontroller.ti.com  
Telephony  
Video & Imaging  
Wireless  
www.ti.com/wireless  
Mailing Address:  
Texas Instruments  
Post Office Box 655303 Dallas, Texas 75265  
Copyright 2005, Texas Instruments Incorporated  

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