SN74LVCH16T245_15 [TI]
16-bit Dual-supply Bus Transceiver;
| 型号： | SN74LVCH16T245_15 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-bit Dual-supply Bus Transceiver |
| 文件： | 总15页 (文件大小：362K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A–JULY 2005–REVISED AUGUST 2005
FEATURES
DGG OR DGV PACKAGE
•
Control Inputs VIH/VIL Levels Are Referenced
(TOP VIEW)
to VCCA Voltage
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
•
VCC Isolation Feature – If Either VCC Input Is at
GND, All Outputs Are in the High-Impedance
State
1DIR
1B1
1B2
GND
1B3
1B4
1OE
1A1
1A2
GND
1A3
1A4
2
3
4
•
•
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
5
6
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
7
V
CCB
V
CCA
8
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
9
•
•
•
•
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
V
CCB
V
CCA
2B5
2B6
GND
2B7
2B8
2DIR
2A5
2A6
GND
2A7
2A8
2OE
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This 16-bit noninverting bus transceiver uses two
separate configurable power-supply rails. The A port
is designed to track VCCA. VCCA accepts any supply
voltage from 1.65 V to 5.5 V. The B port is designed
to track VCCB. VCCB accepts any supply voltage from
1.65 V to 5.5 V. This allows for universal low-voltage
bidirectional translation between any of the 1.8-V,
2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVCH16T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA
.
The SN74LVCH16T245 is designed for asynchronous communication between two data buses. The logic levels
of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the
A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A
bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs
are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW
level applied to prevent excess ICC and ICCZ
.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
LVCH16T245
LDHT245
TSSOP – DGG
Tape and reel
Tape and reel
Tape and reel
Tape and reel
SN74LVCH16T245DGGR
SN74LVCH16T245DGVR
SN74LVCH16T245GQLR
SN74LVCH16T245ZQLR
TVSOP – DGV
–40°C to 85°C
VFBGA – GQL
LDHT245
VFBGA – ZQL (Pb-free)
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A–JULY 2005–REVISED AUGUST 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, then all outputs are in the high-impedance
state. The bus-hold circuitry on the powered-up side always stays active.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
GQL OR ZQL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
A
B
C
D
E
F
G
H
J
K
TERMINAL ASSIGNMENTS(1)
1
2
3
4
5
6
A
B
C
D
E
F
1DIR
1B2
1B4
1B6
1B8
2B1
2B3
2B5
2B7
2DIR
NC
NC
NC
NC
1OE
1A2
1A4
1A6
1A8
2A1
2A3
2A5
2A7
2OE
1B1
1B3
1B5
1B7
2B2
2B4
2B6
2B8
NC
GND
VCCB
GND
GND
VCCA
GND
1A1
1A3
1A5
1A7
2A2
2A4
2A6
2A8
NC
G
H
J
GND
VCCB
GND
NC
GND
VCCA
GND
NC
K
(1) NC – No internal connection
FUNCTION TABLE(1)
(EACH 16-BIT SECTION)
CONTROL INPUTS
OUTPUT CIRCUITS
OPERATION
OE
L
DIR
L
A PORT
Enabled
Hi-Z
B PORT
Hi-Z
B data to A bus
A data to B bus
Isolation
L
H
Enabled
Hi-Z
H
X
Hi-Z
(1) Input circuits of the data I/Os are always active.
2
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A–JULY 2005–REVISED AUGUST 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
24
1
2DIR
1DIR
48
25
13
1OE
1B1
2OE
2B1
36
47
1A1
2A1
2
To Seven Other Channels
To Seven Other Channels
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCCA
Supply voltage range
VCCB
–0.5
6.5
V
I/O ports (A port)
I/O ports (B port)
Control inputs
A port
–0.5
–0.5
–0.5
–0.5
–0.5
6.5
6.5
6.5
6.5
6.5
VI
Input voltage range(2)
V
VO
Voltage range applied to any output
in the high-impedance or power-off state(2)
V
V
B port
A port
–0.5 VCCA + 0.5
VO
Voltage range applied to any output in the high or low state(2)(3)
B port
–0.5 VCCB + 0.5
IIK
IOK
IO
Input clamp current
VI < 0
–50
–50
±50
±100
70
mA
mA
mA
mA
Output clamp current
VO < 0
Continuous output current
Continuous current through each VCCA, VCCB, and GND
DGG package
θJA
Package thermal impedance(4)
DGV package
58
°C/W
GQL/ZQL package
28
Tstg
Storage temperature range
–65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
3
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A–JULY 2005–REVISED AUGUST 2005
Recommended Operating Conditions(1)(2)(3)
VCCI
VCCO
MIN
1.65
MAX UNIT
VCCA
VCCB
5.5
V
Supply voltage
1.65
5.5
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
VCCI × 0.65
1.7
High-level
input voltage
VIH
VIL
VIH
Data inputs(4)
Data inputs(4)
V
2
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
VCCI × 0.7
VCCI × 0.35
0.7
0.8
Low-level
input voltage
V
V
V
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
VCCI × 0.3
VCCA × 0.65
1.7
2
High-level
input voltage
Control inputs
(referenced to VCCA
(5)
(5)
)
)
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
VCCA × 0.7
VCCA × 0.35
0.7
Low-level
input voltage
Control inputs
(referenced to VCCA
VIL
VI
0.8
4.5 V to 5.5 V
VCCA × 0.3
Input voltage
Control inputs
Active state
3-State
0
0
0
5.5
VCCO
5.5
–4
V
V
VI/O Input/output voltage
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
–8
IOH
High-level output current
mA
mA
–24
–32
4
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
8
IOL
Low-level output current
Input transition
24
4.5 V to 5.5 V
32
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
20
20
∆t/∆v
Data inputs
ns/V
°C
rise or fall rate
10
4.5 V to 5.5 V
5
TA
Operating free-air temperature
–40
85
(1) VCCI is the VCC associated with the data input port.
(2) VCCO is the VCC associated with the output port.
(3) All unused control inputs of the device must be held at VCCA GND to ensure proper device operation and minimize power consumption.
Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
(4) For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V.
(5) For VCCA values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V.
4
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A–JULY 2005–REVISED AUGUST 2005
Electrical Characteristics(1)(2)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCCA
VCCB
MIN TYP MAX
MIN MAX UNIT
VCCO – 0.1
IOH = –100 µA,
VI = VIH
VI = VIH
VI = VIH
VI = VIH
VI = VIH
VI = VIL
VI = VIL
VI = VIL
VI = VIL
VI = VIL
1.65 V to 4.5 V 1.65 V to 4.5 V
IOH = –4 mA,
IOH = –8 mA,
IOH = –24 mA,
IOH = –32 mA,
IOL = 100 µA,
IOL = 4 mA,
1.65 V
2.3 V
3 V
1.65 V
2.3 V
3 V
1.2
1.9
2.4
3.8
VOH
V
4.5 V
4.5 V
1.65 V to 4.5 V 1.65 V to 4.5 V
0.1
0.45
0.3
1.65 V
2.3 V
3 V
1.65 V
2.3 V
3 V
VOL
IOL = 8 mA,
V
IOL = 24 mA,
IOL = 32 mA,
0.55
0.55
4.5 V
4.5 V
Control
inputs
II
VI = VCCA or GND
1.65 V to 5.5 V 1.65 V to 5.5 V
±0.5
±1
±2
µA
µA
VI = 0.58 V
VI = 0.7 V
VI = 0.8 V
VI = 0.1.35 V
VI = 1.07 V
VI = 1.7 V
VI = 2 V
1.65 V
2.3 V
3 V
1.65 V
2.3 V
3 V
15
45
(3)
IBHL
75
4.5 V
1.65 V
2.3 V
3 V
4.5 V
1.65 V
2.3 V
3 V
100
–15
–45
–75
–100
200
300
500
900
–200
–300
–500
–900
(4)
IBHH
µA
µA
µA
VI = 3.15 V
4.5 V
1.95 V
2.7 V
3.6 V
5.5 V
1.95 V
2.7 V
3.6 V
5.5 V
0 V
4.5 V
1.95 V
2.7 V
3.6 V
5.5 V
1.95 V
2.7 V
3.6 V
5.5 V
0 to 5.5 V
0 V
(5)
IBHLO
VI = 0 to VCC
(6)
IBHHO
VI = 0 to VCC
A port
B port
±0.5
±0.5
±1
±1
±2
±2
Ioff
VI or VO = 0 to 5.5 V
µA
µA
0 to 5.5 V
A or B
port
OE = VIH
1.65 V to 5.5 V 1.65 V to 5.5 V
±1
±2
VO = VCCO or
GND,
VI = VCCI or GND
IOZ
B port
A port
0 V
5.5 V
0 V
±1
±1
±2
±2
20
20
–2
20
–2
20
30
OE = don't
care
5.5 V
1.65 V to 5.5 V 1.65 V to 5.5 V
ICCA
VI = VCCI or GND, IO = 0
5 V
0 V
0 V
5 V
µA
1.65 V to 5.5 V 1.65 V to 5.5 V
ICCB
VI = VCCI or GND, IO = 0
VI = VCCI or GND, IO = 0
5 V
0 V
0 V
5 V
µA
µA
ICCA + ICCB
1.65 V to 5.5 V 1.65 V to 5.5 V
(1) VCCO is the VCC associated with the output port.
(2) VCCI is the VCC associated with the input port.
(3) The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND
and then raising it to VIL max.
(4) The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to
VCC and then lowering it to VIH min.
(5) An external driver must source at least IBHLO to switch this node from low to high.
(6) An external driver must sink at least IBHHO to switch this node from high to low.
5
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A–JULY 2005–REVISED AUGUST 2005
Electrical Characteristics (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
DIR at VCCA – 0.6 V,
VCCA
VCCB
MIN TYP MAX
MIN MAX UNIT
∆ICCA DIR
B port = open,
3 V to 5.5 V
3 V to 5.5 V
50
µA
A port at VCCA or GND
Control
inputs
Ci
VI = VCCA or GND
3.3 V
3.3 V
3.3 V
3.3 V
4
5
pF
pF
A or B
port
Cio
VO = VCCA/B or GND
8.5
10
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 1)
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
± 0.2 V
± 0.3 V
PARAMETER
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.7
21.9
23.8
29.6
32.2
24
1.3
9.2
23.8
29.4
13.1
23.8
18
1
7.4
23.4
29.3
12
0.4
7.1
23.4
29.2
10.3
23.7
10.8
ns
ns
ns
ns
ns
ns
B
0.9
1.5
2.4
0.4
1.8
0.8
1.5
1.9
0.4
1.5
0.7
1.5
1.7
0.4
1.2
0.7
1.4
1.3
0.4
0.9
OE
OE
OE
OE
23.7
12.6
32
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
± 0.2 V
± 0.3 V
PARAMETER
UNIT
MIN
MAX
MIN MAX
MIN
MAX
MIN
MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.5
21.4
1.2
1
9
9.1
9
0.8
6.2
0.6
4.8
8.8
9
ns
ns
ns
ns
ns
ns
B
1.2
1.4
2.3
1
9.3
9
1
1.4
1.7
1
8.9
9
0.9
1.4
0.9
1
OE
OE
OE
OE
1.4
1.8
1
29.6
10.9
28.2
11
9.3
10.9
9.4
6.9
10.9
6.9
10.9
1.7
1.5 12.9
1.2
1
6
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A–JULY 2005–REVISED AUGUST 2005
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
± 0.2 V
± 0.3 V
PARAMETER
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.6
21.2
7.2
8.2
29
1.1
8.8
6.2
0.8
6.2
6.1
8.2
8.8
8.1
8.5
0.6
4.4
6
ns
ns
ns
ns
ns
ns
B
0.8
1.6
2.1
0.8
1.8
0.8
1.6
1.7
0.8
1.4
0.7
1.6
1.5
0.8
1.1
0.6
1.6
0.8
0.8
0.8
OE
OE
OE
OE
8.2
8.2
6.3
8.1
6.4
10.3
8.1
7.8
27.7
12.4
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
MAX
MIN MAX
MIN MAX
MIN MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.5
21.4
7
1
0.4
0.3
1.8
0.7
8.8
4.8
5.4
9.7
6.4
0.7
0.3
0.3
1.4
0.7
1
6
4.5
5.4
8
0.4
0.3
0.3
0.7
0.7
0.9
4.2
4.3
5.4
5.7
6.4
6
ns
ns
ns
ns
ns
ns
B
0.7
0.3
2
OE
OE
OE
OE
5.4
28.7
6.4
27.6
0.7
1.5
6.4
8.1
1.3 11.4
Operating Characteristics
TA = 25°C
VCCA
VCCB = 1.8 V
=
VCCA
VCCB = 2.5 V
=
VCCA
VCCB = 3.3 V
=
VCCA =
VCCB = 5 V
TEST
CONDITIONS
PARAMETER
UNIT
TYP
2
TYP
2
TYP
2
TYP
3
A-port input, B-port output
(1)
CpdA
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
B-port input, A-port output
A-port input, B-port output
18
18
2
19
19
2
19
20
2
22
22
2
pF
(1)
CpdB
B-port input, A-port output
(1) Power dissipation capacitance per transceiver
7
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A–JULY 2005–REVISED AUGUST 2005
PARAMETER MEASUREMENT INFORMATION
2 × V
CCO
TEST
S1
S1
R
L
Open
GND
t
Open
pd
From Output
Under Test
t
t
/t
/t
2 × V
CCO
GND
PLZ PZL
PHZ PZH
C
L
R
L
(see Note A)
t
w
LOAD CIRCUIT
V
CCI
V
CCI
/2
V
CCI
/2
Input
C
L
V
TP
R
L
V
CCO
0 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
2 kΩ
2 kΩ
2 kΩ
2 kΩ
0.15 V
0.15 V
0.3 V
15 pF
15 pF
15 pF
15 pF
VOLTAGE WAVEFORMS
PULSE DURATION
0.3 V
V
CCA
Output
Control
(low-level
enabling)
V /2
CCA
V
CCA
/2
t
0 V
t
PZL
PLZ
V
V
CCO
Output
Waveform 1
V
CCI
V
/2
/2
CCO
Input
V
CCI
/2
V
CCI
/2
V
+ V
OL
TP
S1 at 2 × V
CCO
OL
0 V
(see Note B)
t
t
PZH
PHZ
t
t
PHL
PLH
Output
Waveform 2
S1 at GND
V
OH
V
OH
V
OH
− V
TP
V
CCO
Output
V /2
CCO
V
CCO
/2
(see Note B)
0 V
V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, Z = 50 Ω, dv/dt ≥ 1 V/ns,
O
dv/dt ≥1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
H.
I.
t
t
t
V
V
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PLH
PHZ
PZH
are the same as t
en
are the same as t .
pd
PHL
is the V associated with the input port.
CC
CCI
is the V associated with the output port.
CCO
CC
J. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
8
PACKAGE OPTION ADDENDUM
www.ti.com
24-Feb-2006
PACKAGING INFORMATION
Orderable Device
74LVCH16T245DGGRE4
74LVCH16T245DLG4
74LVCH16T245DLRG4
74LVCH16T245ZQLR
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
DGG
48
48
48
56
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SSOP
SSOP
DL
DL
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
BGA MI
CROSTA
R JUNI
OR
ZQL
1000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
SN74LVCH16T245DGGR
SN74LVCH16T245DGVR
SN74LVCH16T245DL
SN74LVCH16T245DLR
SN74LVCH16T245KR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TVSOP
SSOP
DGG
DGV
DL
48
48
48
48
56
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SSOP
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
BGA MI
CROSTA
R JUNI
OR
GQL
1000
TBD
SNPB
Level-1-240C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
48
0.0135 (0,343)
0.008 (0,203)
0.005 (0,13)
M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
0°–ā8°
1
24
0.040 (1,02)
0.020 (0,51)
A
Seating Plane
0.004 (0,10)
0.008 (0,20) MIN
PINS **
0.110 (2,79) MAX
28
48
0.630
56
DIM
0.380
(9,65)
0.730
A MAX
A MIN
(16,00) (18,54)
0.370
(9,40)
0.620
0.720
(15,75) (18,29)
4040048/E 12/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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