SN74LVT245BDBR [TI]

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS; 具有三态输出的3.3V ABT八路总线收发器
SN74LVT245BDBR
型号: SN74LVT245BDBR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
具有三态输出的3.3V ABT八路总线收发器

总线驱动器 总线收发器 触发器 逻辑集成电路 光电二极管 输出元件 信息通信管理
文件: 总15页 (文件大小:490K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇꢃ ꢈꢉ  
ꢋꢊ ꢌꢅ ꢍꢉꢆ ꢎ ꢏꢆꢍꢄ ꢉꢐꢀ ꢆ ꢑꢍꢁ ꢀꢏ ꢒ ꢓꢅ ꢒ ꢑ  
ꢔ ꢓꢆ ꢕ ꢊ ꢌꢀꢆꢍꢆ ꢒ ꢎ ꢐꢆ ꢖꢐ ꢆꢀ  
SCES004H − JANUARY 1995 − REVISED SEPTEMBER 2003  
D
Supports Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
D
D
D
I
and Power-Up 3-State Support Hot  
off  
Insertion  
3.3-V V  
)
CC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
D
D
Supports Unregulated Battery Operation  
Down to 2.7 V  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
− 1000-V Charged-Device Model (C101)  
DB, DW, NS, OR PW PACKAGE  
(TOP VIEW)  
RGY PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DIR  
A1  
V
CC  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
1
20  
A2  
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
10  
11  
description/ordering information  
This octal bus transceiver is designed specifically for low-voltage (3.3-V) V  
to provide a TTL interface to a 5-V system environment.  
operation, but with the capability  
CC  
The SN74LVT245B is designed for asynchronous communication between data buses. The device transmits  
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are  
effectively isolated.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
QFN − RGY  
SOIC − DW  
Tape and reel  
Tube  
SN74LVT245BRGYR  
SN74LVT245BDW  
SN74LVT245BDWR  
SN74LVT245BNSR  
SN74LVT245BDBR  
SN74LVT245BPW  
SN74LVT245BPWR  
SN74LVT245BGQNR  
SN74LVT245BZQNR  
LX245B  
LVT245B  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP − NS  
LVT245B  
LX245B  
SSOP − DB  
−40°C to 85°C  
TSSOP − PW  
LX245B  
LX245B  
Tape and reel  
VFBGA − GQN  
Tape and reel  
VFBGA − ZQN (Pb-free)  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢆꢣ  
Copyright 2003, Texas Instruments Incorporated  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢬ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢋ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢃ ꢈꢉ  
ꢊꢋ ꢊꢌꢅ ꢍ ꢉ ꢆ ꢎꢏ ꢆꢍꢄ ꢉꢐ ꢀ ꢆꢑ ꢍꢁ ꢀꢏ ꢒꢓ ꢅ ꢒ ꢑ  
ꢔꢓ ꢆ ꢕ ꢊ ꢌꢀꢆꢍꢆ ꢒ ꢎꢐꢆ ꢖꢐ ꢆꢀ  
SCES004H − JANUARY 1995 − REVISED SEPTEMBER 2003  
description/ordering information (continued)  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
This device is fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry  
off  
off  
disables the outputs, preventing damaging current backflow through the device when it is powered down. The  
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,  
which prevents driver conflict.  
GQN OR ZQN PACKAGE  
(TOP VIEW)  
terminal assignments  
1
2
3
4
1
A1  
2
3
4
A
B
C
D
E
A
B
C
D
E
DIR  
B2  
A4  
B6  
A8  
V
OE  
B1  
B3  
B5  
B7  
CC  
A3  
A2  
B4  
A6  
B8  
A5  
A7  
GND  
FUNCTION TABLE  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
logic diagram (positive logic)  
1
2
DIR  
19  
18  
OE  
A1  
B1  
To Seven Other Channels  
Pin numbers shown are for the DB, DW, NS, PW, and RGY packages.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇꢃ ꢈꢉ  
ꢊ ꢋꢊ ꢌꢅ ꢍꢉꢆ ꢎ ꢏꢆꢍꢄ ꢉꢐꢀ ꢆ ꢑꢍꢁ ꢀꢏ ꢒ ꢓꢅ ꢒ ꢑ  
ꢔ ꢓꢆ ꢕ ꢊ ꢌꢀꢆꢍꢆ ꢒ ꢎ ꢐꢆ ꢖꢐ ꢆꢀ  
SCES004H − JANUARY 1995 − REVISED SEPTEMBER 2003  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
I
Voltage range applied to any output in the high-impedance  
or power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
O
Voltage range applied to any output in the high state, V (see Note 1) . . . . . . . . . . . . . −0.5 V to V  
+ 0.5 V  
O
CC  
Current into any output in the low state, I  
Current into any output in the high state, I (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 mA  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
O
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA  
IK  
OK  
I
Output clamp current, I  
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA  
O
Package thermal impedance, θ (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W  
JA  
(see Note 3): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
(see Note 3): GQN/ZQN package . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W  
(see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W  
(see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W  
(see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. This current flows only when the output is in the high state and V > V  
.
CC  
O
3. The package thermal impedance is calculated in accordance with JESD 51-7.  
4. The package thermal impedance is calculated in accordance with JESD 51-5.  
recommended operating conditions (see Note 5)  
MIN  
2.7  
2
MAX  
UNIT  
V
V
V
V
V
Supply voltage  
3.6  
CC  
High-level input voltage  
Low-level input voltage  
Input voltage  
V
IH  
0.8  
5.5  
−32  
64  
V
IL  
V
I
I
High-level output current  
Low-level output current  
Input transition rise or fall rate  
Power-up ramp rate  
mA  
mA  
ns/V  
µs/V  
°C  
OH  
OL  
I
t/v  
t/V  
Outputs enabled  
10  
200  
−40  
CC  
T
A
Operating free-air temperature  
85  
NOTE 5: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢃ ꢈꢉ  
ꢊꢋ ꢊꢌꢅ ꢍ ꢉ ꢆ ꢎꢏ ꢆꢍꢄ ꢉꢐ ꢀ ꢆꢑ ꢍꢁ ꢀꢏ ꢒꢓ ꢅ ꢒ ꢑ  
ꢔꢓ ꢆ ꢕ ꢊ ꢌꢀꢆꢍꢆ ꢒ ꢎꢐꢆ ꢖꢐ ꢆꢀ  
SCES004H − JANUARY 1995 − REVISED SEPTEMBER 2003  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
TYP  
PARAMETER  
TEST CONDITIONS  
MIN  
MAX  
UNIT  
V
V
V
V
V
= 2.7 V,  
I = −18 mA  
−1.2  
V
IK  
CC  
CC  
CC  
CC  
I
= 2.7 V to 3.6 V,  
= 2.7 V,  
I
I
I
I
I
I
I
I
= −100 µA  
= −8 mA  
= −32 mA  
= 100 µA  
= 24 mA  
= 16 mA  
= 32 mA  
= 64 mA  
V
−0.2  
OH  
OH  
OH  
OL  
OL  
OL  
OL  
OL  
CC  
2.4  
2
V
OH  
V
V
= 3 V,  
0.2  
0.5  
0.4  
0.5  
0.55  
1
V
= 2.7 V  
CC  
CC  
V
OL  
V
= 3 V  
V
V
= 3.6 V,  
V = V or GND  
I CC  
CC  
Control inputs  
= 0 or 3.6 V,  
V = 5.5 V  
I
10  
CC  
V = 5.5 V  
I
20  
I
I
µA  
V = V  
1
V
CC  
= 3.6 V  
A or B ports  
I
CC  
V = 0  
I
−5  
I
I
I
I
V
CC  
V
CC  
V
CC  
V
CC  
= 0,  
V or V = 0 to 4.5 V  
100  
5
µA  
µA  
µA  
µA  
off  
I
O
= 3.6 V,  
= 3.6 V,  
V
= 3 V  
OZH  
OZL  
O
O
V
= 0.5 V  
−5  
= 0 to 1.5 V, V = 0.5 V to 3 V, OE = don’t care  
O
100  
OZPU  
V
= 1.5 V to 0, V = 0.5 V to 3 V, OE = don’t care  
O
100  
0.19  
5
µA  
I
CC  
OZPD  
Outputs high  
V
I
= 3.6 V,  
CC  
O
Outputs low  
= 0,  
I
mA  
CC  
V = V  
or GND  
I
CC  
Outputs disabled  
0.19  
V
= 3 V to 3.6 V, One input at V − 0.6 V,  
CC  
CC  
Other inputs at V  
§
0.2  
mA  
I  
CC  
or GND  
CC  
C
C
V = 3 V or 0  
4
9
pF  
pF  
i
I
V
O
= 3 V or 0  
io  
§
All typical values are at V  
= 3.3 V, T = 25°C.  
A
CC  
CC  
Unused terminals are at V or GND.  
This is the increase in supply current for each input that is at the specified TTL-voltage level, rather than V  
or GND.  
CC  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
V
= 3.3 V  
CC  
0.3 V  
V
= 2.7 V  
CC  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN TYP  
MAX  
3.5  
3.5  
5.5  
5.5  
5.9  
5
MIN  
MAX  
4
t
t
t
t
t
t
1.2  
1.2  
1.3  
1.7  
2.2  
2.2  
2.3  
2.1  
3.2  
3.4  
3.5  
3.4  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A or B  
OE  
B or A  
A or B  
A or B  
ns  
ns  
ns  
4
7.1  
6.5  
6.5  
5.1  
OE  
All typical values are at V  
CC  
= 3.3 V, T = 25°C.  
A
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇꢃ ꢈꢉ  
ꢊ ꢋꢊ ꢌꢅ ꢍꢉꢆ ꢎ ꢏꢆꢍꢄ ꢉꢐꢀ ꢆ ꢑꢍꢁ ꢀꢏ ꢒ ꢓꢅ ꢒ ꢑ  
ꢔ ꢓꢆ ꢕ ꢊ ꢌꢀꢆꢍꢆ ꢒ ꢎ ꢐꢆ ꢖꢐ ꢆꢀ  
SCES004H − JANUARY 1995 − REVISED SEPTEMBER 2003  
PARAMETER MEASUREMENT INFORMATION  
6 V  
TEST  
S1  
S1  
Open  
GND  
500 Ω  
From Output  
Under Test  
t
/t  
PLH PHL  
Open  
6 V  
t
/t  
PLZ PZL  
C
= 50 pF  
t
/t  
GND  
L
PHZ PZH  
500 Ω  
(see Note A)  
2.7 V  
0 V  
LOAD CIRCUIT  
Timing Input  
Data Input  
1.5 V  
t
w
t
t
h
su  
2.7 V  
0 V  
2.7 V  
0 V  
Input  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
2.7 V  
0 V  
2.7 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
Input  
t
t
PLZ  
PZL  
t
t
t
PHL  
PLH  
PHL  
Output  
Waveform 1  
S1 at 6 V  
3 V  
V
V
OH  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
t
Output  
V
V
+ 0.3 V  
OL  
V
OL  
OL  
(see Note B)  
t
t
PZH  
PHZ  
PLH  
Output  
Waveform 2  
S1 at GND  
V
OH  
V
V
OH  
− 0.3 V  
OH  
1.5 V  
1.5 V  
Output  
0 V  
OL  
(see Note B)  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. includes probe and jig capacitance.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
E. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
6-Dec-2006  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
SSOP  
SSOP  
Drawing  
SN74LVT245BDBLE  
SN74LVT245BDBR  
OBSOLETE  
ACTIVE  
DB  
20  
20  
TBD  
Call TI  
Call TI  
DB  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVT245BDBRE4  
SN74LVT245BDW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
DB  
DW  
DW  
DW  
DW  
DW  
DW  
GQN  
20  
20  
20  
20  
20  
20  
20  
20  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVT245BDWE4  
SN74LVT245BDWG4  
SN74LVT245BDWR  
SN74LVT245BDWRE4  
SN74LVT245BDWRG4  
SN74LVT245BGQNR  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
BGA MI  
CROSTA  
R JUNI  
OR  
1000  
TBD  
SNPB  
Level-1-240C-UNLIM  
SN74LVT245BNSR  
SN74LVT245BNSRE4  
SN74LVT245BPW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SO  
NS  
NS  
PW  
PW  
20  
20  
20  
20  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVT245BPWE4  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVT245BPWLE  
SN74LVT245BPWR  
OBSOLETE TSSOP  
PW  
PW  
20  
20  
TBD  
Call TI  
Call TI  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
TSSOP  
QFN  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVT245BPWRE4  
SN74LVT245BPWRG4  
SN74LVT245BRGYR  
SN74LVT245BRGYRG4  
SN74LVT245BZQNR  
PW  
PW  
20  
20  
20  
20  
20  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
RGY  
RGY  
ZQN  
1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR  
no Sb/Br)  
QFN  
1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR  
no Sb/Br)  
BGA MI  
CROSTA  
R JUNI  
OR  
1000 Green (RoHS &  
no Sb/Br)  
SNAGCU  
Level-1-260C-UNLIM  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
6-Dec-2006  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to discontinue  
any product or service without notice. Customers should obtain the latest relevant information before placing  
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms  
and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
deems necessary to support this warranty. Except where mandated by government requirements, testing of all  
parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for  
their products and applications using TI components. To minimize the risks associated with customer products  
and applications, customers should provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,  
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process  
in which TI products or services are used. Information published by TI regarding third-party products or services  
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.  
Use of such information may require a license from a third party under the patents or other intellectual property  
of the third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without  
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction  
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for  
such altered documentation.  
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that  
product or service voids all express and any implied warranties for the associated TI product or service and  
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.  
Following are URLs where you can obtain information on other Texas Instruments products and application  
solutions:  
Products  
Applications  
Audio  
Amplifiers  
amplifier.ti.com  
www.ti.com/audio  
Data Converters  
dataconverter.ti.com  
Automotive  
www.ti.com/automotive  
DSP  
dsp.ti.com  
Broadband  
Digital Control  
Military  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
Interface  
Logic  
interface.ti.com  
logic.ti.com  
Power Mgmt  
Microcontrollers  
power.ti.com  
Optical Networking  
Security  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
microcontroller.ti.com  
Low Power Wireless www.ti.com/lpw  
Telephony  
Video & Imaging  
Wireless  
www.ti.com/wireless  
Mailing Address:  
Texas Instruments  
Post Office Box 655303 Dallas, Texas 75265  
Copyright 2006, Texas Instruments Incorporated  

相关型号:

SN74LVT245BDBRE4

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TI

SN74LVT245BDBRG4

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TI

SN74LVT245BDW

3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
TI

SN74LVT245BDWE4

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TI

SN74LVT245BDWG4

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TI

SN74LVT245BDWR

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TI

SN74LVT245BDWRE4

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TI

SN74LVT245BDWRG4

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TI

SN74LVT245BGQNR

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TI

SN74LVT245BNSR

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TI

SN74LVT245BNSRE4

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TI

SN74LVT245BNSRG4

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
TI