SN74LVU04AQPWRG4Q1 [TI]
HEX INVERTER;
| 型号： | SN74LVU04AQPWRG4Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HEX INVERTER 栅 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总7页 (文件大小：109K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LVU04A-Q1
HEX INVERTER
www.ti.com
SCES649–SEPTEMBER 2005
FEATURES
•
•
Qualified for Automotive Applications
PW PACKAGE
(TOP VIEW)
Customer-Specific Configuration Control Can
Be Supported Along With Major-Change
Approval
1A
1Y
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
6A
6Y
5A
5Y
4A
4Y
•
•
•
2-V to 5.5-V VCC Operation
Unbuffered Outputs
2A
2Y
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
3A
3Y
•
•
Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
8
GND
Supports Mixed-Mode Voltage Operation on
All Ports
DESCRIPTION/ORDERING INFORMATION
This hex inverter is designed for 2-V to 5.5-V VCC operation.
The SN74LVU04A-Q1 contains six independent inverters with unbuffered outputs. This device performs the
Boolean function Y = A.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
LU04AQ
–40°C to 125°C
TSSOP – PW
Reel of 2000
SN74LVU04AQPWRQ1
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(EACH INVERTER)
INPUT
A
OUTPUT
Y
H
L
L
H
LOGIC DIAGRAM, EACH INVERTER (POSITIVE LOGIC)
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LVU04A-Q1
HEX INVERTER
www.ti.com
SCES649–SEPTEMBER 2005
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX UNIT
VCC
VI
Supply voltage range
Input voltage range(2)
Output voltage range(2)(3)
7
7
V
V
VO
IIK
VCC + 0.5
–20
V
Input clamp current
VI < 0
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
–50
Continuous output current
Continuous current through VCC or GND
Package thermal impedance(4)
VO = 0 to VCC
±25
±50
θJA
113 °C/W
Human-Body Model
Charged-Device Model
Machine Model
1.5 (H1C)
kV
ESD rating(5)
1 (C5)
200 (M3)
150
V
Tstg
Storage temperature range
–65
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) This value is limited to 5.5 V maximum.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
(5) ESD protection level per AEC Q100 classification
Recommended Operating Conditions(1)
MIN
2
MAX
UNIT
VCC
Supply voltage
5.5
V
VCC = 2 V
1.7
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2 V
VCC × 0.8
VCC × 0.8
VCC × 0.8
VIH
High-level input voltage
V
V
0.3
CC × 0.2
CC × 0.2
0.8
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
V
V
VIL
Low-level input voltage
VI
Input voltage
0
0
5.5
V
V
VO
Output voltage
VCC
–50
–2
VCC = 2 V
µA
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2 V
IOH
High-level output current
–6
mA
µA
mA
°C
–12
50
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
2
IOL
Low-level output current
6
12
TA
Operating free-air temperature
–40
125
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
SN74LVU04A-Q1
HEX INVERTER
www.ti.com
SCES649–SEPTEMBER 2005
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
–40°C to 125°C
–40°C to 85°C
PARAMETER
TEST CONDITIONS
IOH = –50 µA
VCC
UNIT
MIN
VCC – 0.1
2
TYP
MAX
MIN
VCC – 0.1
2
TYP
MAX
2 V to 5.5 V
2.3 V
IOH = –2 mA
IOH = –6 mA
IOH = –12 mA
IOL = 50 µA
VOH
VIL = 0 V
V
V
3 V
2.48
2.48
4.5 V
3.7
3.8
2 V to 5.5 V
2.3 V
0.1
0.4
0.1
0.4
IOL = 2 mA
VOL
VIH = VCC
IOL = 6 mA
3 V
0.44
0.55
±1
0.44
0.55
±1
IOL = 12 mA
VI = 5.5 V or GND
4.5 V
II
0 V to 5.5 V
5.5 V
µA
µA
pF
ICC
Ci
VI = VCC or GND, IO = 0
VI = VCC or GND
20
20
3.3 V
4
4
Switching Characteristics
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
TA = 25°C
TYP
–40°C to 125°C –40°C to 85°C
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
tpd
A
Y
CL = 50 pF
4.7
11.4
1
16
1
13
ns
Switching Characteristics
over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
TA = 25°C
TYP
–40°C to 125°C –40°C to 85°C
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
tpd
A
Y
CL = 50 pF
3.9
7
1
11
1
8
ns
Noise Characteristics
VCC = 3.3 V, CL = 50 pF, TA = 25°C(1)
PARAMETER
MIN
TYP
0.5
–0.1
3
MAX UNIT
VOL(P) Quiet output, maximum dynamic VOL
VOL(V) Quiet output, minimum dynamic VOL
VOH(V) Quiet output, minimum dynamic VOH
VIH(D) High-level dynamic input voltage
VIL(D) Low-level dynamic input voltage
0.8
V
V
V
V
V
–0.8
2.31
0.99
(1) Characteristics are for surface-mount packages only.
Operating Characteristics
TA = 25°C
PARAMETER
TEST CONDITIONS
VCC
3.3 V
5 V
TYP
UNIT
5.6
6.7
Cpd
Power dissipation capacitance
CL = 50 pF, f = 10 MHz
pF
3
SN74LVU04A-Q1
HEX INVERTER
www.ti.com
SCES649–SEPTEMBER 2005
PARAMETER MEASUREMENT INFORMATION
V
CC
S1
Open
R
L
= 1 kΩ
TEST
/t
S1
From Output
Under Test
Test
Point
From Output
Under Test
GND
t
t
Open
PLH PHL
C
L
C
L
t
/t
V
CC
PLZ PZL
(see Note A)
(see Note A)
/t
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
CC
Timing Input
0 V
t
w
t
h
t
su
V
CC
V
CC
50% V
50% V
CC
Input
Input
CC
50% V
50% V
CC
Data Input
0 V
CC
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
50% V
50% V
50% V
50% V
CC
CC
CC
CC
0 V
0 V
t
t
PLZ
t
t
t
PZL
PLH
PHL
Output
Waveform 1
≈V
V
CC
OH
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
V
+ 0.3 V
PHZ
OL
S1 at V
CC
V
OL
V
OL
(see Note B)
t
t
t
PHL
PLH
PZH
Output
Waveform 2
S1 at GND
V
V
OH
OL
OH
Out-of-Phase
Output
V
OH
− 0.3 V
50% V
50% V
50% V
CC
CC
CC
V
≈0 V
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time, with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PHL
PHZ
are the same as t
PZH
en
are the same as t .
PLH pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuits and Voltage Waveforms
4
PACKAGE OPTION ADDENDUM
www.ti.com
27-Jan-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SN74LVU04AQPWRQ1
ACTIVE
TSSOP
PW
14
2000
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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