SN75478P [TI]
DUAL PERIPHERAL DRIVERS; DUAL外设驱动程序型号: | SN75478P |
厂家: | TEXAS INSTRUMENTS |
描述: | DUAL PERIPHERAL DRIVERS |
文件: | 总7页 (文件大小:108K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
D OR P PACKAGE
(TOP VIEW)
• Characterized for Use to 300 mA
• No Output Latch-Up at 55 V (After
Conducting 300 mA)
S
1A
V
CC
2A
1
2
3
4
8
7
6
5
• High-Voltage Outputs (100 V Typ)
1Y
2Y
• Output Clamp Diodes for Transient
Suppression (300 mA, 70 V)
GND
CLAMP
• TTL- or MOS-Compatible Diode-Clamped
Inputs
Function Tables
• pnp Transistor Inputs Reduce Input Current
• Standard Supply Voltage
SN75476
(each AND driver)
• Suitable for Hammer-Driver Applications
• Plastic DIP (P) With Copper-Lead Frame
Provides Cooler Operation and Improved
Reliability
INPUTS
OUTPUT
Y
A
S
H
L
X
H
X
L
H
L
L
description
SN75477
(each NAND driver)
The SN75476 through SN75478 are dual
peripheraldriversdesignedforuseinsystemsthat
require high current, high voltage, and fast
switching times. The SN75476, SN75477, and
SN75478 provide AND, NAND, and OR drivers
respectively. These devices have diode-clamped
inputs as well as high-current, high-voltage clamp
diodes on the outputs for inductive transient
protection.
INPUTS
OUTPUT
Y
A
S
H
L
X
H
X
L
L
H
H
SN75478
(each OR driver)
INPUTS
OUTPUT
Y
The SN75476, SN75477, and SN75478 drivers
are characterized for operation from 0°C to 70°C.
A
S
H
X
L
X
H
L
H
H
L
schematics of inputs and outputs
H = high level, L = low level
X = irrelevant
EQUIVALENT
OF EACH INPUT
TYPICAL
OF ALL OUTPUTS
CLAMP
V
CC
Output
Input
GND
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
†
logic symbols
logic diagrams (positive logic)
SN75476
3
6
SN75476
2
1Y
2Y
2
1
7
3
1A
&
1A
S
1Y
1
CLAMP
S
6
5
2Y
7
2A
CLAMP
2A
5
4
CLAMP
GND
Positive Logic: Y = AS or A+S
SN75477
3
6
SN75477
&
2
1Y
2Y
2
1
7
3
1A
1A
S
1Y
1
CLAMP
S
6
5
2Y
7
2A
CLAMP
2A
5
4
CLAMP
GND
Positive Logic: Y = AS or A+S
SN75478
3
6
SN75478
2
1Y
2Y
2
1
7
3
1A
≥1
1A
S
1Y
1
CLAMP
S
6
5
2Y
7
2A
CLAMP
2A
5
4
CLAMP
GND
Positive Logic: Y = A+S or A S
†
These symbols are in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
I
Continuous output current (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 mA
Peak output current: t ≤ 10 ms, duty cycle ≤ 50% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA
w
t
≤ 30 ns, duty cycle ≤ 0.002% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 A
w
OK
Output clamp current, I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
NOTES: 1. Voltage values are with respect to network GND.
2. Both halves of this dual circuit may conduct rated current simultaneously; however, power dissipation averaged over a short time
interval must fall within the continuous power dissipation ratings.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T = 70°C
A
POWER RATING
A
PACKAGE
POWER RATING
ABOVE T = 25°C
A
D
P
725 mW
5.8 mW/°C
8.0 mW/°C
464 mW
1000 mW
640 mW
recommended operating conditions
MIN NOM
4.5
MAX
UNIT
V
Supply voltage, V
CC
5
5.5
High-level input voltage, V
IH
2
V
Low-level input voltage, V
0.8
70
V
IL
Operating free-air temperature, T
0
°C
A
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
electrical characteristics over recommended operating free-air temperature range
†
PARAMETER
Input clamp voltage
TEST CONDITIONS
MIN TYP
MAX
–1.5
0.3
UNIT
V
IK
I = –12 mA
–0.95
0.16
0.22
0.33
100
V
I
I
I
I
I
I
I
= 100 mA
= 175 mA
= 300 mA
= 100 µA
OL
OL
OL
OH
V
V
V
= 4.5 V,
= 2 V,
= 0.8 V
CC
IH
IL
V
OL
Low-level output voltage
0.5
V
0.6
V
V
V
Output breakdown voltage
Output clamp reverse voltage
Output clamp forward voltage
V
V
V
= 4.5 V,
= 4.5 V,
= 4.5 V,
= 4.5 V,
70
70
V
V
V
O(BR)
CC
CC
CC
CC
= 100 µA
100
R(K)
R
F
= 300 mA
0.8
1.15
1.6
100
10
F(K)
V
V
V
V
= 2 V,
IH
I
I
I
High-level output current
High-level input current
Low-level input current
1
µA
µA
µA
OH
= 0.8 V,
= 70 V
IL
OH
V
= 5.5 V,
V = 5.5 V
I
0.01
IH
IL
CC
A input
–80 –110
V
= 5.5 V,
V = 0.8 V
I
CC
S input
–160 –220
SN75476
SN75477
SN75478
SN75476
SN75477
SN75478
V = 5 V
10
10
10
54
54
54
17
17
17
75
75
75
I
I
Supply current, outputs high
Supply current, outputs low
V
V
= 5.5 V
= 5.5 V
V = 0
I
mA
mA
CCH
CC
V = 5 V
I
V = 0
I
I
V = 5 V
I
CCL
CC
V = 0
I
†
All typical values are at V
= 5 V, T = 25°C.
A
CC
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
200
200
50
MAX
350
350
125
125
UNIT
ns
t
t
t
t
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Transition time, low-to-high-level output
PLH
PHL
TLH
THL
ns
C
= 15 pF,
R
= 100 Ω,
L
L
See Figure 1
ns
Transition time, high-to-low-level output
90
ns
V
= 55 V,
I
O
≈ 300 mA,
S
V
OH
High-level output voltage after switching
V
S
–18
mV
See Figure 2
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
PARAMETER MEASUREMENT INFORMATION
V
CC
30 V
Input
2.4 V
SN75476
SN75477
R
= 100 Ω
L
A/S
Output
Circuit
Under
Test
Pulse
S/A
Generator
(see Note A)
C
= 15 pF
L
(see Note B)
SN75478
0.4 V
Open
TEST CIRCUIT
≤ 5 ns
≤ 10 ns
3 V
2.7 V
1.5 V
2.7 V
1.5 V
SN75446
SN75448
Input
Input
0.7 V
0.7 V
2.7 V
0 V
3 V
5 µs
≤ 5 ns
≤ 10 ns
2.7 V
SN75447
1.5 V
1.5 V
0.7 V
0.7 V
0 V
t
t
PLH
PHL
V
OH
OL
90%
90%
Output
50%
10%
50%
10%
V
t
t
TLH
THL
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR = 100 kHz, Z = 50 Ω.
O
B.
C includes probe and jig capacitance.
L
Figure 1. Test Circuit and Voltage Waveforms, Switching Characteristics
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
PARAMETER MEASUREMENT INFORMATION
V
S
= 55 V
2.4 V
5 V
Input
2 mH
SN75476
SN75477
180 Ω
Pulse
Generator
(see Note A)
A
S
Circuit
Under
Test
Output
C
= 15 pF
L
(see Note B)
GND
SN75478
0.4 V
TEST CIRCUIT
≤ 5 ns
≤ 10 ns
3 V
90%
1.5 V
90%
1.5 V
SN75476
SN75478
Input
Input
10%
10%
0 V
3 V
40 µs
≤ 5 ns
90%
1.5 V
≤ 10 ns
90%
SN75477
1.5 V
10%
10%
0 V
V
V
OH
Output
OL
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR = 12.5 kHz, Z = 50 Ω.
O
B.
C includes probe and jig capacitance.
L
Figure 2. Latch-Up Test Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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Copyright 1998, Texas Instruments Incorporated
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