SN75LBC180RGVT [TI]
LINE TRANSCEIVER, PQCC16, GREEN, PLASTIC, QFN-16;
| 型号： | SN75LBC180RGVT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LINE TRANSCEIVER, PQCC16, GREEN, PLASTIC, QFN-16 驱动 信息通信管理 接口集成电路 驱动器 |
| 文件： | 总17页 (文件大小：418K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN65LBC180
RGV−16
D−14
SN75LBC180
N−14
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
FEATURES
RGV PACKAGE
(TOP VIEW)
D OR N PACKAGE
(TOP VIEW)
•
Designed for High-Speed Multipoint Data
Transmission Over Long Cables
NC
R
RE
VCC
VCC
A
1
2
3
4
5
6
7
14
13
12
11
10
9
•
•
•
Operate With Pulse Durations as Low as 30 ns
Low Supply Current . . . 5 mA Max
16 15 14 13
1
Meet or Exceed the Requirements of ANSI
Standard RS-485 and ISO 8482:1987(E)
NC
R
12
11
10
9
A
B
Z
Y
DE
D
B
Z
2
3
4
RE
DE
GND
GND
Y
•
•
•
3-State Outputs for Party-Line Buses
8
NC
5
6 7 8
Common-Mode Voltage Range of –7 V to 12 V
Thermal Shutdown Protection Prevents
Driver Damage From Bus Contention
NC−No internal connection
Pins 6 and 7 are connected together internally
•
•
Positive and Negative Output Current
Limiting
Pins 13 and 14 are connected together internally
Pin Compatible With the SN75ALS180
Function Tables
DRIVER
DESCRIPTION
INPUT
ENABLE
DE
H
OUTPUTS
D
H
L
Y
H
L
Z
L
H
Z
The SN65LBC180 and SN75LBC180 differential
driver and receiver pairs are monolithic integrated
circuits designed for bidirectional data communication
over long cables that take on the characteristics of
transmission lines. They are balanced, or differential,
voltage mode devices that meet or exceed the
requirements of industry standards ANSI RS-485 and
ISO 8482:1987(E). Both devices are designed using
TI's proprietary LinBiCMOS™ with the low-power
consumption of CMOS and the precision and robust-
ness of bipolar transistors in the same circuit.
H
L
X
Z
RECEIVER
DIFFERENTIAL INPUTS
A−B
ENABLE
OUTPUT
RE
L
L
L
H
L
R
H
?
L
Z
H
V
ID
≥ 0.2 V
−0.2 V < V < 0.2 V
ID
V
≤ − 0.2 V
ID
X
Open circuit
H = high level, L = low level, ? = indeterminate, X = irrelevant,
Z = high impedance (off)
Both the SN65LBC180 and SN75LBC180 combine a
differential line driver and receiver with 3-state out-
puts and operate from a single 5-V supply. The driver
and receiver have active-high and active-low enables,
respectively, which can be externally connected to
function as a direction control. The driver differential
outputs and the receiver differential inputs are con-
nected to separate terminals for full-duplex operation
and are designed to present minimum loading to the
bus whether disabled or powered off (VCC = 0). These
parts feature a wide common-mode voltage range
making them suitable for point-to-point or multipoint
data-bus applications.
logic diagram (positive logic)
4
DE
9
5
3
Y
Z
D
10
RE
12
11
2
A
B
R
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1994–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN65LBC180
SN75LBC180
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
The devices also provide positive and negative output-current limiting and thermal shutdown for protection from
line fault conditions. The line driver shuts down at a junction temperature of approximately 172°C.
The SN65LBC180 and SN75LBC180 are available in the 14-pin dual-in-line and small-outline packages. The
SN75LBC180 is characterized for operation over the commercial temperature range of 0°C to 70°C. The
SN65LBC180 is characterized over the industrial temperature range of –40°C to 85°C.
SCHEMATICS OF INPUTS AND OUTPUTS
EQUIVALENT OF D, DE, AND RE INPUTS
RECEIVER A INPUT
V
CC
V
CC
100 kΩ
NOM
18 kΩ
3 kΩ
NOM
22 kΩ
NOM
Input
Input
12 kΩ
1.1 kΩ
NOM
DRIVER OUTPUT
TYPICAL OF RECEIVER OUTPUT
V
RECEIVER B INPUT
V
CC
CC
V
CC
3 kΩ
NOM
18 kΩ
NOM
Input
A Output
Output
100 kΩ
NOM
12 kΩ
1.1 kΩ
NOM
2
SN65LBC180
SN75LBC180
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
UNIT
(2)
VCC Supply voltage range
–0.3 to 7
–10 to 15
V
V
V
VBUS Bus voltage range (A, B, Y, Z)(2)
Voltage range at D, R, DE, RE(2)
Continuous total power dissipation(3)
Total power dissipation
–0.3 to VCC + 0.5
Internally limited
See Dissipation Rating Table
–40 to 85
SN65LBC180
°C
°C
TA
Operating free-air temperature range
SN75LBC180
0 to 70
Tstg
IO
Storage temperature range
–65 to 150
°C
Receiver output current range
–50 to 50
mA
°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
(1) Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND.
(3) The maximum operating junction temperature is internally limited. Use the dissipation rating table to operate below this temperature.
DISSIPATION RATING TABLE
T
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
PACKAGE
POWER RATING
D
N
950 mW
7.6 mW/°C
9.2 mW/°C
23.8 mW/°C
608 mW
736 mW
1900 mW
494 mW
598 mW
1500 mW
1150 mW
RGV
2900 mW
RECOMMENDED OPERATING CONDITIONS
MIN NOM
MAX UNIT
VCC
Supply voltage
4.75
2
5
5.25
V
V
V
V
V
VIH
High-level input voltage
D, DE, and RE
VIL
Low-level input voltage
D, DE, and RE
0.8
6
VID
Differential input voltage
-6(1)
-7(1)
VO, VI, or VIC
Voltage at any bus terminal (separately or common mode)
A, B, Y, or Z
Y or Z
12
-60
-8
IOH
IOL
TA
High-level output current
Low-level output current
Operating free-air temperature
mA
mA
°C
R
Y or Z
60
8
R
SN65LBC180
SN75LBC180
-40
0
85
70
(1) The algebraic convention where the least positive (more negative) limit is designated minimum, is used in this data sheet for the
differential input voltage, voltage at any bus terminal, operating temperature, input threshold voltage, and common-mode output voltage.
3
SN65LBC180
SN75LBC180
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
DRIVER SECTION
ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
II = -18 mA
MIN TYP(1)
MAX UNIT
VIK
Input clamp voltage
-1.5
V
SN65LBC180
SN75LBC180
SN65LBC180
SN75LBC180
1.1
1.5
1.1
1.5
2.5
2.5
2
5
5
RL = 54 Ω,
See Figure 1
| VOD
|
Differential output voltage magnitude(2)
V
5
RL = 60 Ω,
See Figure 2
2
5
∆| VOD
|
|
Change in magnitude of differential output voltage(3)
Common-mode output voltage
See Figure 1 and Figure 2
±0.2
3
V
V
VOC
1
2.5
RL = 54Ω ,
See Figure 1
VO = –7 V to 12 V
Change in magnitude of common-mode output
voltage(3)
∆| VOC
±0.2
V
IO
Output current with power off
High-impedance-state output current
High-level input current
VCC = 0,
±100
±100
100
100
±250
5
µA
µA
µA
µA
mA
IOZ
IIH
IIL
VO = –7 V to 12 V
VI = 2.4 V
Low-level input current
VI = 0.4 V
IOS
Short-circuit output current
-7 V ≤ VO ≤ 12 V
Outputs enabled
Outputs disabled
Receiver
disabled
ICC
Supply current
mA
3
(1) All typical values are at VCC = 5 V and TA = 25°C.
(2) The minimum VOD specification of the SN65LBC180 may not fully comply with ANSI RS-485 at operating temperatures below 0°C.
System designers should take the possibly lower output signal into account in determining the maximum signal-transmission distance.
(3) ∆|VOD| and∆ |VOC| are the changes in the steady-state magnitude of VOD and VOC, respectively, that occur when the input is changed
from a high level to a low level.
SWITCHING CHARACTERISTICS
VCC = 5 V, TA = 25°C
PARAMETER
td(OD) Differential output delay time
TEST CONDITIONS
MIN TYP
MAX UNIT
7
5
12
10
18
20
35
35
50
35
ns
ns
ns
ns
ns
ns
RL = 54 Ω,
See Figure 3
tt(OD)
tPZH
tPZL
tPHZ
tPLZ
Differential output transition time
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
RL = 110 Ω ,
RL = 110 Ω ,
RL = 110 Ω ,
RL = 110 Ω ,
See Figure 4
See Figure 5
See Figure 4
See Figure 5
4
SN65LBC180
SN75LBC180
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
RECEIVER SECTION
ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
MAX UNIT
VIT+ Positive-going input threshold voltage
VIT– Negative-going input threshold voltage
IO = –8 mA
IO = 8 mA
0.2
V
V
-0.2
45
Vhys Hysteresis voltage (VIT+– VIT–
)
mV
V
VIK Enable-input clamp voltage
II = –18 mA
-1.5
VOH High-level output voltage
VOL Low-level output voltage
VID = 200 mV,
IOH = –8 mA
IOL = 8 mA
3.5
4.5
0.3
V
VID = –200 mV,
VO = 0 V to VCC
VIH = 2.4 V
0.5
±20
-50
-100
1
V
IOZ
IIH
IIL
High-impedance-state output current
High-level enable-input current
Low-level enable-input current
µA
µA
µA
VIL = 0.4 V
VI = 12 V, VCC = 5 V,
VI = 12 V, VCC = 0 V,
VI = -7 V, VCC = 5 V,
VI = -7 V, VCC = 0 V,
Other input at 0 V
Other input at 0 V
Other input at 0 V
Other input at 0 V
Outputs enabled
Outputs disabled
0.7
0.8
1
II
Bus input current
Supply current
mA
mA
-0.5
-0.5
-0.8
-0.8
5
ICC
Driver disabled
3
SWITCHING CHARACTERISTICS
VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
MIN TYP
MAX UNIT
tPHL Propagation delay time, high- to low-level output
tPLH Propagation delay time, low- to high-level output
tsk(p) Pulse skew (| tPHL - tPLH|)
11
11
22
22
3
33
33
6
ns
ns
ns
ns
ns
ns
ns
ns
VID = -1.5 V to 1.5 V,
See Figure 6
tt
Transition time
5
8
tPZH Output enable time to high level
tPZL Output enable time to low level
tPHZ Output disable time from high level
tPLZ Output disable time from low level
35
30
35
30
See Figure 7
5
SN65LBC180
SN75LBC180
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
PARAMETER MEASUREMENT INFORMATION
Y
R
L
2
D
V
OD
0 V or 3 V
R
L
2
V
OC
DE at 3 V
Z
Figure 1. Differential and Common-Mode Output Voltages
V
test
–7 V < V
< 12 V
test
R1
375 Ω
Y
D
R
L
= 60 Ω
V
OD
0 V or 3 V
Z
DE at 3 V
R2
375 Ω
V
test
Figure 2. Driver VOD Test Circuit
3 V
0 V
Input
t
1.5 V
1.5 V
Y
C
= 50 pF
L
t
d(OD)
d(OD)
(see Note B)
≈ 2.5 V
90%
50%
10%
90%
Generator
R
L
= 54 Ω
Output
50%
10%
Output
50 Ω
(see Note A)
≈ – 2.5 V
Z
DE at 3 V
t
t
t(OD)
t(OD)
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR > 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
O
= 50 Ω.
B. C includes probe and jig capacitance.
L
Figure 3. Driver Test Circuit and Differential Output Delay and Transition Time Voltage Waveforms
6
SN65LBC180
SN75LBC180
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
PARAMETER MEASUREMENT INFORMATION (continued)
3 V
Y
S1
1.5 V
1.5 V
D
Input
Output
0 V or 3 V
Z
0 V
0.5 V
t
PZH
DE
R
L
= 110 Ω
V
C
= 50 pF
OH
L
Input
Generator
(see Note A)
(see Note B)
Output
50 Ω
2.3 V
V
off
≈ 0
t
PHZ
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 4. Driver Test Circuit and Enable and Disable Time Waveforms
5 V
3 V
0 V
1.5 V
1.5 V
Input
Y
Z
R
L
= 110 Ω
S1
D
Output
0 V or 3 V
t
PZL
C
= 50 pF
L
DE
t
PLZ
Input
(see Note B)
Generator
(see Note A)
5 V
50 Ω
0.5 V
2.3 V
Output
V
OL
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 5. Driver Test Circuit and Enable and Disable Time Voltage Waveforms
3 V
Input
1.5 V
1.5 V
Input
A
B
0 V
R
Generator
(see Note A)
t
t
PHL
Output
PLH
50 Ω
V
V
RE
1.5 V
OH
90%
1.3 V
10%
90%
C
= 15 pF
(see Note B)
L
1.3 V
10%
Output
0 V
OL
t
t
t
t
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
O
= 50 Ω.
B. C includes probe and jig capacitance.
L
Figure 6. Receiver Test Circuit and Propagation Delay Time Voltage Waveforms
7
SN65LBC180
SN75LBC180
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
PARAMETER MEASUREMENT INFORMATION (continued)
Output
S1
1.5 V
A
B
S2
R
2 kΩ
− 1.5 V
5 V
IN916 or Equivalent
(4 places)
C
= 15 pF
RE
L
5 kΩ
(see Note B)
Input
Generator
(see Note A)
50 Ω
S3
TEST CIRCUIT
3 V
S1 to − 1.5 V
S2 Closed
S3 Open
3 V
S1 to 1.5 V
S2 Open
Input
Input
1.5 V
1.5 V
S3 Closed
0 V
0 V
t
PZH
t
PZL
V
OH
≈ 4.5 V
Output
Output
1.5 V
0 V
1.5 V
V
OL
3 V
3 V
0 V
S1 to − 1.5 V
S2 Closed
S3 Closed
S1 to 1.5 V
S2 Closed
S3 Closed
Input
Input
1.5 V
1.5 V
0 V
t
PHZ
t
PLZ
V
OH
≈ 1.3 V
Output
Output
0.5 V
≈ 1.3 V
V
OL
0.5 V
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
O
= 50 Ω.
B. C includes probe and jig capacitance.
L
Figure 7. Receiver Output Enable and Disable Times
8
SN65LBC180
SN75LBC180
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
TYPICAL CHARACTERISTICS
DRIVER
HIGH-LEVEL OUTPUT VOLTAGE
vs
DRIVER
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
5
4.5
4
5
4.5
4
V
T
= 5 V
= 25°C
V
T
= 5 V
= 25°C
CC
CC
A
A
3.5
3.5
3
3
2.5
2.5
2
2
1.5
1.5
1
1
0.5
0.5
0
0
0
10 20 30 40 50 60 70 80 90 100
0
20
40
60
80
100
120
I
− High-Level Output Current − mA
I
− Low-Level Output Current − mA
OH
OL
Figure 8.
Figure 9.
DRIVER
DRIVER
DIFFERENTIAL OUTPUT VOLTAGE
DIFFERENTIAL OUTPUT VOLTAGE
vs
vs
OUTPUT CURRENT
FREE-AIR TEMPERATURE
4
3
V
CC
= 5 V
V
CC
= 5 V
Load = 54 Ω
= 2 V
T
A
= 25°C
3.5
3
V
2.5
IH
2
1.5
1
2.5
2
1.5
1
0.5
0
0.5
0
− 50
− 25
0
25
50
75
100
125
0
10 20 30 40 50 60 70 80 90 100
T
A
− Free-Air Temperature − °C
I
O
− Output Current − mA
Figure 10.
Figure 11.
9
SN65LBC180
SN75LBC180
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
TYPICAL CHARACTERISTICS (continued)
DRIVER
DIFFERENTIAL DELAY TIMES
vs
DRIVER
OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
80
60
20
R
L
= 54 Ω
V
= 5 V
CC
Load = 54 Ω
t
d(ODL)
I
OL
15
10
40
20
t
d(ODH)
0
−20
−40
−60
−80
5
0
I
OH
− 50
− 25
0
25
50
75
100
125
0
1
2
3
4
5
6
T
A
− Free-Air Temperature − °C
V
CC
− Supply Voltage − V
Figure 12.
Figure 13.
RECEIVER
RECEIVER
HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
6
5
4
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
= 200 mV
V
= 5 V
= 25°C
= − 200 mV
ID
CC
T
A
V
ID
3
2
1
0
0
5
10
15
20
25
30
35
40
0
−10
− 20
− 30
− 40
− 50
I
− Low-Level Output Current − mA
OL
I
− High-Level Output Current − mA
OH
Figure 14.
Figure 15.
10
SN65LBC180
SN75LBC180
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
TYPICAL CHARACTERISTICS (continued)
RECEIVER
OUTPUT VOLTAGE
vs
AVERAGE SUPPLY CURRENT
vs
DIFFERENTIAL INPUT VOLTAGE
FREQUENCY
60
55
50
45
40
35
30
25
6
5
T
V
= 25°C
A
= 5 V
CC
DRVR and RCVR Enabled
Driver Load = Receiver Inputs
Receiver Load = 50 pF
V
= 12 V
IC
4
3
2
V
IC
= 0 V
20
15
10
5
V
= −7 V
IC
1
0
0
10 k
− 80 − 60 − 40 − 20
0
20
40
60
80
100 k
1 M
10 M
100 M
V
ID
− Differential Input Voltage − mV
f − Frequency − Hz
Figure 16.
Figure 17.
RECEIVER
BUS INPUT CURRENT
vs
RECEIVER
PROPAGATION DELAY TIME
vs
INPUT VOLTAGE
(COMPLEMENTARY INPUT AT 0 V)
FREE-AIR TEMPERATURE
24.5
24
1
0.8
V
C
= 5 V
= 15 pF
= ±1.5 V
T
V
= 25°C
CC
A
= 5 V
L
CC
V
IO
0.6
0.4
t
PHL
23.5
23
0.2
0
− 0.2
− 0.4
− 0.6
− 0.8
− 1
t
PLH
22.5
22
The shaded region of this graph represents
more than 1 unit load per RS-485.
− 40
− 20
0
20
40
60
80
100
− 8 − 6 − 4 − 2
0
2
4
6
8
10 12
T
A
− Free-Air Temperature − °C
V − Input Voltage − V
I
Figure 18.
Figure 19.
11
SN65LBC180
SN75LBC180
www.ti.com
SLLS174D–FEBRUARY 1994–REVISED FEBRUARY 2005
APPLICATION INFORMATION
Master Node
Slave Node
Slave Node
Slave Node
Figure 20. Full Duplex Application Circuit
12
PACKAGE OPTION ADDENDUM
www.ti.com
22-Feb-2005
PACKAGING INFORMATION
Orderable Device
SN65LBC180D
SN65LBC180DR
SN65LBC180N
Status (1)
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
14
14
14
50
2500
25
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
SOIC
PDIP
D
N
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN65LBC180RGVR
SN65LBC180RGVT
SN75LBC180D
ACTIVE
ACTIVE
ACTIVE
QFN
QFN
SOIC
RGV
RGV
D
16
16
14
3000
250
50
None
None
CU SN
CU SN
Level-2-220C-1 YEAR
Level-2-220C-1 YEAR
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
SN75LBC180DR
SN75LBC180N
ACTIVE
ACTIVE
SOIC
PDIP
D
N
14
14
2500
25
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN75LBC180RGVR
SN75LBC180RGVT
ACTIVE
ACTIVE
QFN
QFN
RGV
RGV
16
16
3000
250
None
None
CU SN
CU SN
Level-2-220C-1 YEAR
Level-2-220C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
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information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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