SN761642 [TI]
DIGITAL TV TUNER IC; 数字电视调谐器IC
| 型号： | SN761642 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DIGITAL TV TUNER IC |
| 文件： | 总25页 (文件大小：898K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN761642
www.ti.com ................................................................................................................................................................................................. SLES249–AUGUST 2009
DIGITAL TV TUNER IC
1
FEATURES
DBT PACKAGE
(TOP VIEW)
•
•
•
•
Integrated Mixer/Oscillator/PLL
VHF-L, VHF-H, UHF 3-Band Local Oscillator
RF AGC Detector Circuit
1
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
VLO OSC B
VLO OSC C
VHI OSC B
VHI OSC C
UHF OSC B1
UHF OSC C1
UHF OSC C2
UHF OSC B2
OSC GND
CP
BS4
2
UHF RF IN1
UHF RF IN2
VHI RF IN
VLO RF IN
RF GND
MIX OUT2
MIX OUT1
IF IN
I2C Bus Protocol
3
Bidirectional Data Transmission
4
•
•
•
•
•
High-Voltage Tuning Voltage Output
Four NPN-Type Band Switch Drivers
One Auxiliary Port/5-Level ADC
Crystal Oscillator Output
5
6
7
8
9
Programmable Reference Divider Ratio
(24/28/32/64/80/128)
10
11
12
13
14
15
16
17
18
19
RF AGC OUT
RF AGC BUF
BS3
VTU
•
•
•
•
Selectable Digital IFOUT and Analog IFOUT
Standby Mode
IF GND
DIF OUT1
DIF OUT2
AIF OUT
P5/ADC
BS2
5-V Power Supply
BS1
38-Pin Thin Shrink Small-Outline Package
(TSSOP)
SDA
SCL
VCC
AS
APPLICATIONS
XTAL1
BUS GND
XTAL OUT
•
•
•
Digital TVs
Digital CATVs
Set-Top Boxes
XTAL2
DESCRIPTION
The SN761642 is a low-phase-noise synthesized tuner IC designed for digital TV tuning systems. The circuit
consists of a PLL synthesizer, three-band local oscillator and mixer, and RF AGC detector circuit. The SN761642
is available in a small-outline package.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN761642
SLES249–AUGUST 2009................................................................................................................................................................................................. www.ti.com
FUNCTIONAL BLOCK DIAGRAM
IF
Amplifier
VHF-L
Oscillator
VHF-H
Oscillator
UHF
Oscillator
DIF OUT1
DIF OUT2
AIF OUT
IF GND
VHF-L
Mixer
VHF-H
Mixer
UHF
Mixer
VLO RF IN
RF AGC OUT
RF
AGC
Detect
VHI RF IN
UHF RF IN1
UHF RF IN2
RF AGC BUFF
CP
Programmable
Divider
V
RF GND
TU
Operational
Amplifier
XTAL1
XTAL2
XTAL
Oscillator
128/80/64/50/
28/24 Div
Phase
Detector
Charge
Pump
V
CC
XTAL OUT
NPN Band-Switch Port
I2C Bus
Interface
SCL
SDA
AS
5-Level
ADC
BUS GND
2
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SN761642
www.ti.com ................................................................................................................................................................................................. SLES249–AUGUST 2009
TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
SCHEMATIC
Figure 1
NAME
AIF OUT
NO.
15
22
25
26
27
38
21
10
13
14
12
30
31
32
9
IF amplifier output (analog)
Address selection input
Band switch 1 output
Band switch 2 output
Band switch 3 output
Band switch 4 output
BUS ground
AS
Figure 2
Figure 3
Figure 3
Figure 3
Figure 3
BS1
BS2
BS3
BS4
BUS GND
CP
Charge-pump output
IF amplifier output 1
IF amplifier output 2
IF ground
Figure 4
Figure 6
Figure 6
DIF OUT1
DIF OUT2
IF GND
IF IN
IF amplifier input
Figure 5
Figure 7
Figure 7
MIXOUT1
MIXOUT2
OSC GND
P5/ADC
Mixer output 1
Mixer output 2
Oscillator ground
16
28
29
33
23
24
5
Port-5 output/ADC input
RF AGC buffer output
RF AGC output
Figure 8
Figure 9
Figure 10
RF AGC BUF
RF AGC OUT
RF GND
SCL
RF ground
Serial clock input
Figure 11
Figure 12
Figure 13
Figure 13
Figure 13
Figure 13
Figure 14
Figure 14
SDA
Serial data input/output
UHF oscillator base 1
UHF oscillator base 2
UHF oscillator collector 1
UHF oscillator collector 2
UHF RF input 1
UHF OSC B1
UHF OSC B2
UHF OSC C1
UHF OSC C2
UHF RF IN1
UHF RF IN2
VCC
8
6
7
37
36
17
3
UHF RF input 2
Supply voltage
VHI OSC B
VHI OSC C
VHI RF IN
VLO OSC B
VLO OSC C
VLO RF IN
VTU
VHF-H oscillator base
VHF-H oscillator collector
VHF-H RF input
Figure 15
Figure 15
Figure 16
Figure 17
Figure 17
Figure 18
Figure 19
Figure 20
Figure 20
Figure 21
4
35
1
VHF-L oscillator base
VHF-L oscillator collector
VHF-L RF input
2
34
11
18
19
20
Tuning voltage amplifier output
4-MHz crystal oscillator
4-MHz crystal oscillator
XTAL1
XTAL2
XTALOUT
4-MHz crystal oscillator buffer output
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SN761642
SLES249–AUGUST 2009................................................................................................................................................................................................. www.ti.com
10 W
15
500 W
22
Figure 1. AIF OUT
Figure 2. AS
25 W
10
25
26
27
38
10 W
25 W
50 kW
Figure 3. BS1, BS2, BS3, and BS4
Figure 4. CP
2 kW
1 kW
A
25 W
10 W
13
1 kW
30
14
25 W
1 kW
Figure 5. IF IN
Figure 6. DIF OUT1 and DIF OUT2
25 W
32
25 W
31
25 W
50 W
A
16
Figure 7. MIXOUT1 and MIXOUT2
Figure 8. P5/ADC
4
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SN761642
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25 W
29
28
Figure 9. RF AGC BUF
Figure 10. RF AGC OUT
1 kW
25 W
1 kW
23
24
Figure 11. SCL
Figure 12. SDA
37
36
7
8
6
5
3 kW
3 kW
20 W
20 W
8 kW
8 kW
Figure 13. UHF OSC B1, UHF OSC B2, UHF OSC C1, and
UHF OSC C2
Figure 14. UHF RF IN1 and UHF RF IN2
4
35
40 W
3 kW
3 kW
3
8 kW
8 kW
Figure 15. VHI OSC B and VHI OSC C
Figure 16. VHI RF IN
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2
34
20 W
3 kW
3 kW
1
8 kW
8 kW
Figure 17. VLO OSC B and VLO OSC C
Figure 18. VLO RF IN
19
18
11
20 W
10 W
50 kW
Figure 19. VTU
Figure 20. XTAL1 and XTAL2
50 W
20
Figure 21. XTALOUT
6
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SN761642
www.ti.com ................................................................................................................................................................................................. SLES249–AUGUST 2009
ABSOLUTE MAXIMUM RATINGS(1)
over recommended operating free-air temperature range (unless otherwise noted)
MIN
–0.4
–0.4
–0.4
–0.4
MAX
6.5
0.4
35
UNIT
V
(2)
(2)
(2)
(2)
VCC
VGND
VTU
VIN
PD
Supply voltage range
Input voltage range 1
Input voltage range 2
Input voltage range 3
VCC
RF GND, OSC GND
VTU
V
V
Other pins
6.5
1276
85
V
(3)
Continuous total dissipation
TA ≤ 25°C
mW
°C
°C
°C
s
TA
Operating free-air temperature range
Storage temperature range
–20
–65
Tstg
TJ
150
150
10
Maximum junction temperature
tSC(max) Maximum short-circuit time
Each pin to VCC or to GND
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltage values are with respect to the IF GND of the circuit.
(3) Derating factor is 10.2 mW/°C for TA ≥ 25°C.
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
5
MAX
5.5
33
UNIT
V
VCC
VTU
IBS
Supply voltage
VCC
4.5
Tuning supply voltage
Output current of band switch
Output current of port 5
Operating free-air temperature
VTU
30
V
BS1 – BS4, one bandswitch on
P5/ADC
10
mA
mA
°C
IP5
–5
TA
–20
85
xxx
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
IF IN, MIXOUT1, and MIXOUT2 (pins 30–32) withstand 1.5 kV, and all other pins withstand 2 kV, according to the Human-Body
Model (1.5 kΩ, 100 pF).
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ELECTRICAL CHARACTERISTICS
Total Device and Serial Interface
VCC = 4.5 V to 5.5 V, TA = –20°C to 85°C (unless otherwise noted)
PARAMETER
Supply current 1
TEST CONDITIONS
MIN
TYP
MAX UNIT
ICC
1
2
BS[1:4] = 0100, DIFOUT enabled
90
120
130
14
mA
ICC
BS[1:4] = 0100, DIFOUT enabled,
IBS = 10 mA
Supply current 2
100
9
mA
ICC-STBY
VIH
Standby supply current
BS[1:4] = 1100
mA
V
High-level input voltage (SCL, SDA)
Low-level input voltage (SCL, SDA)
High-level input current (SCL, SDA)
Low-level input current (SCL, SDA)
2.3
VIL
1.05
10
V
IIH
µA
µA
IIL
–10
2.1
Power-on-reset supply voltage (threshold of supply
voltage between reset and operation mode)
VPOR
2.8
3.5
V
I2C Interface
VASH
VASM1
VASM2
VASL
Address-select high-input voltage (AS)
Address-select mid-input 1 voltage (AS)
Address-select mid-input 2 voltage (AS)
Address-select low-input voltage (AS)
Address-select high-input current (AS)
Address-select low-input current (AS)
ADC input voltage
VCC = 5 V
VCC = 5 V
VCC = 5 V
VCC = 5 V
4.5
2
5
3
V
V
1
1.5
0.5
50
V
V
IASH
µA
µA
V
IASL
–10
0
VADC
IADH
See Table 10
VADC = VCC
VCC
10
ADC high-level input current
ADC low-level input current
Low-level output voltage (SDA)
High-level output leakage current (SDA)
Clock frequency (SCL)
µA
µA
V
IADL
VADC = 0 V
–10
VOL
VCC = 5 V, IOL = 3 mA
VSDA = 5.5 V
0.4
10
lSDAH
fSCL
tHD-DAT
tBUF
tHD-STA
tLOW
µA
100
400 kHz
Data hold time
See Figure 22
0
1.3
0.6
1.3
0.6
0.6
0.1
0.9
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
Bus free time
Start hold time
SCL-low hold time
tHIGH
tSU-STA
tSU-DAT
tr
SCL-high hold time
Start setup time
Data setup time
Rise time (SCL, SDA )
0.3
0.3
tf
Fall time (SCL, SDA)
tSU-STO
Stop setup time
0.6
8
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PLL and Band Switch
VCC = 4.5 V to 5.5 V, TA = –20°C to 85°C (unless otherwise noted)
PARAMETER
Divider ratio
TEST CONDITIONS
15-bit frequency word
MIN
TYP
MAX UNIT
32767
N
512
fXTAL
ZXTAL
Crystal oscillator frequency
RXTAL = 25 Ω to 300 Ω
4
MHz
Crystal oscillator input impedance
1.6
0.2
2.4
kΩ
Load = 10 pF/5.1 kΩ, VCC = 5 V,
TA = 25°C
VXLO
XTALOUT output voltage
0.48
0.3
Vp-p
VVTUL
IVTUOFF
ICP11
ICP10
ICP01
ICP00
ICP100
VCP
Tuning amplifier low-level output voltage
Tuning amplifier leakage current
RL = 22 kΩ, VTU = 30 V
Tuning amplifier = off, VTU = 30 V
CP[2:0] = 011
0.46
10
V
µA
450
250
100
35
600
350
140
70
750
450
200
95
CP[2:0] = 010
Charge-pump current
CP[2:0] = 001
µA
CP[2:0] = 000
CP[2:0] = 100, Mode = 1
PLL locked
650
900
1.95
1200
Charge-pump output voltage
V
ICPOFF
IBS
Charge-pump leakage current
VCP = 2 V, TA = 25°C
–15
15
10
nA
mA
Band switch driver output current (BS1–BS4)
VBS1
VBS2
IBS = 10 mA
3
Band switch driver output voltage (BS1–BS4)
V
IBS = 10 mA, VCC = 5 V, TA = 25°C
3.5
3.7
Band switch driver leakage current
(BS1–BS4)
IBSOFF
VBS = 0 V
8
µA
IP5
Band switch port sink current (P5/ADC)
Band switch port output voltage (P5/ADC)
–5
mA
V
VP5ON
IP5 = –2 mA, VCC = 5 V, TA = 25°C
0.6
RF AGC(1)
VCC = 5 V, TA = 25°C, measured in Figure 23 reference measurement circuit at 50-Ω system, IF = 44 MHz,
IF filter characteristics: fpeak = 44 MHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
ATC = 0
MIN
TYP
300
9
MAX
UNIT
nA
µA
µA
V
IOAGC0
RF AGC output source current
IOAGC1
ATC = 1
IOAGCSINK
VOAGCH
RF AGC peak sink current
ATC = 0
100
4
RFAGCOUT output high voltage (max level)
RFAGCOUT output low voltage (min level)
RFAGCBUF output current
ATC = 1
3.5
3.5
4.5
4.5
VOAGCL
ATC = 1
0.3
1.5
4
V
IAGCBUF
ATC = 0
mA
V
VOAGCBFH
VOAGCBFL
VAGCSP00
VAGCSP01
VAGCSP02
VAGCSP03
VAGCSP04
VAGCSP05
VAGCSP06
RFAGCBUF output high voltage (max level)
RFAGCBUF output low voltage (min level)
ATC = 1
ATC = 1
0.3
114
112
110
108
106
104
102
V
ATP[2:0] = 000, ATC=0, AISL=0
ATP[2:0] = 001, ATC=0, AISL=0
ATP[2:0] = 010, ATC=0, AISL=0
ATP[2:0] = 011, ATC=0, AISL=0
ATP[2:0] = 100, ATC=0, AISL=0
ATP[2:0] = 101, ATC=0, AISL=0
ATP[2:0] = 110, ATC=0, AISL=0
Start-point IF output level
dBµV
(1) When AISL=1, RF AGC function is not available at VHF-L band (output level is undefined).
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Mixer, Oscillator, IF Amplifier (DIF OUT)
VCC = 5 V, TA = 25°C, measured in Figure 23 reference measurement circuit at 50-Ω system, IF = 44 MHz,
IF filter characteristics: fpeak = 44 MHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
fin = 57 MHz(1)
TYP
35
UNIT
GC1D
Conversion gain (mixer-IF amplifier), VHF-LOW
dB
GC3D
fin = 171 MHz(1)
fin = 177 MHz(1)
fin = 467 MHz(1)
fin = 473 MHz(1)
fin = 864 MHz(1)
fin = 57 MHz
35
GC4D
35
Conversion gain (mixer-IF amplifier), VHF-HIGH
Conversion gain (mixer-IF amplifier), UHF
Noise figure, VHF-LOW
dB
dB
GC6D
35
GC7D
35
GC9D
35
NF1D
9
dB
NF3D
fin = 171 MHz
fin = 177 MHz
fin = 467 MHz
fin = 473 MHz
fin = 864 MHz
fin = 57 MHz(2)
fin = 171 MHz(2)
fin = 177 MHz(2)
fin = 467 MHz(2)
fin = 473 MHz(2)
fin = 864 MHz(2)
fin = 57 MHz
9
NF4D
9
Noise figure, VHF-HIGH
dB
NF6D
10
NF7D
10
Noise figure, UHF
dB
NF9D
12
CM1D
CM3D
CM4D
CM6D
CM7D
CM9D
VIFO1D
VIFO3D
VIFO4D
VIFO6D
VIFO7D
VIFO9D
ΦPLVL1D
ΦPLVL3D
ΦPLVL4D
ΦPLVL6D
ΦPLVL7D
ΦPLVL9D
79
Input voltage causing 1% cross-modulation distortion,
VHF-LOW
dBµV
dBµV
dBµV
dBµV
dBµV
dBµV
dBc/Hz
dBc/Hz
dBc/Hz
79
79
Input voltage causing 1% cross-modulation distortion,
VHF-HIGH
79
77
Input voltage causing 1% cross-modulation distortion, UHF
IF output voltage, VHF-LOW
IF output voltage, VHF-HIGH
IF output voltage, UHF
77
117
117
117
117
117
117
–90
–85
–85
–77
–80
–77
fin = 171 MHz
fin = 177 MHz
fin = 467 MHz
fin = 473 MHz
fin = 864 MHz
fin = 57 MHz(3)
fin = 171 MHz(4)
fin = 177 MHz(3)
fin = 467 MHz(4)
fin = 473 MHz(3)
fin = 864 MHz(4)
Phase noise, VHF-LOW
Phase noise, VHF-HIGH
Phase noise, UHF
(1) IF = 44 MHz, RF input level = 70 dBµV, differential output
(2) fundes = fdes ±6 MHz, Pin = 70 dBµV, AM 1 kHz, 30%, DES/CM = S/I = 46 dB
(3) Offset = 1 kHz, CP current = 350 µA, reference divider = 64
(4) Offset = 1 kHz, CP current = 900 µA, reference divider = 64
10
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Mixer, Oscillator, IF Amplifier (AIF OUT)
VCC = 5 V, TA = 25°C, measured in Figure 23 reference measurement circuit at 50-Ω system, IF = 45.75 MHz,
IF filter characteristics: fpeak = 44 MHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
fin = 55.25 MHz(1)
TYP
29
UNIT
GC1A
Conversion gain (mixer-IF amplifier), VHF-LOW
dB
GC3A
fin = 169.25 MHz(1)
fin = 175.25 MHz(1)
fin = 465.25 MHz(1)
fin = 471.25 MHz(1)
fin = 862.25 MHz(1)
fin = 55.25 MHz
29
GC4A
29
Conversion gain (mixer-IF amplifier), VHF-HIGH
Conversion gain (mixer-IF amplifier), UHF
Noise figure, VHF-LOW
dB
dB
GC6A
29
GC7A
29
GC9A
29
NF1A
9
dB
NF3A
fin = 169.25 MHz
fin = 175.25 MHz
fin = 465.25 MHz
fin = 471.25 MHz
fin = 862.25 MHz
fin = 55.25 MHz(2)
fin = 169.25 MHz(2)
fin = 175.25 MHz(2)
fin = 465.25 MHz(2)
fin = 471.25 MHz(2)
fin = 862.25 MHz(2)
fin = 55.25 MHz
9
NF4A
9
Noise figure, VHF-HIGH
dB
NF6A
10
NF7A
10
Noise figure, UHF
dB
NF9A
12
CM1A
CM3A
CM4A
CM6A
CM7A
CM9A
VIFO1A
VIFO3A
VIFO4A
VIFO6A
VIFO7A
VIFO9A
ΦPLVL1A
ΦPLVL3A
ΦPLVL4A
ΦPLVL6A
ΦPLVL7A
ΦPLVL9A
79
Input voltage causing 1% cross-modulation distortion,
VHF-LOW
dBµV
dBµV
dBµV
dBµV
dBµV
dBµV
dBc/Hz
dBc/Hz
dBc/Hz
79
79
Input voltage causing 1% cross-modulation distortion,
VHF-HIGH
79
79
Input voltage causing 1% cross-modulation distortion, UHF
IF output voltage, VHF-LOW
IF output voltage, VHF-HIGH
IF output voltage, UHF
77
117
117
117
117
117
117
–95
–95
–90
–90
–85
–90
fin = 169.25 MHz
fin = 175.25 MHz
fin = 465.25 MHz
fin = 471.25 MHz
fin = 862.25 MHz
fin = 55.25 MHz(3)
fin = 169.25 MHz(3)
fin = 175.25 MHz(3)
fin = 465.25 MHz(3)
fin = 471.25 MHz(3)
fin = 862.25 MHz(3)
Phase noise, VHF-LOW
Phase noise, VHF-HIGH
Phase noise, UHF
(1) IF = 44 MHz, RF input level = 70 dBµV
(2) fundes = fdes ±6 MHz, Pin = 70 dBµV, AM 1 kHz, 30%, DES/CM = S/I = 46 dB
(3) Offset = 10 kHz, CP current = 70 µA, reference divider = 128
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FUNCTIONAL DESCRIPTION
I2C Bus Mode
I2C Write Mode (R/W = 0)
Table 1. Write Data Format
MSB
1
LSB
R/W = 0
N8
Address byte (ADB)
Divider byte 1 (DB1)
Divider byte 2 (DB2)
Control byte 1 (CB1)
Band switch byte (BB)
Control byte 2 (CB2)
1
N14
N6
0
0
0
N12
N4
0
MA1
N10
N2
MA0
N9
A(1)
A(1)
A(1)
A(1)
A(1)
A(1)
0
N13
N5
N11
N3
N7
1
N1
N0
ATP2
AISL
ATC
ATP1
P5
ATP0
BS4
T3
RS2
BS3
RS1
BS2
RS0
CP1
1
CP0
1
BS1
MODE
T2/IFDA T1/CP2
T0/XLO
(1) A : acknowledge
Table 2. Write Data Symbol Description
SYMBOL
DESCRIPTION
DEFAULT
MA[1:0]
N[14:0]
Address-set bits (see Table 3)
Programmable counter set bits
N14 = N13 = N12 = ... = N0 = 0
N = N14 × 214 + N13 × 213 + ... + N1 × 2 + N0
ATP[2:0]
RS[2:0]
CP[1:0]
AISL(1)
RF AGC start-point control bits (see Table 4)
Reference divider ratio-selection bits (see Table 5)
Charge-pump current-set bit (see Table 6)
RF AGC detector input selection bit
ATP[2:0] = 000
RS[2:0] = 000
CP[1:0] = 00
AISL = 0
AISL = 0: IF amplifier
AISL = 1: Mixer output
P5
Port output/ADC input control bit
P5 = 0
P5 = 0: ADC INPUT
P5 = 1: Tr = ON
BS[4:1]
Band switch control bits
BSn = 0
BSn = 0: Tr = OFF
BSn = 1: Tr = ON
Band selection by BS[1:2]
BS1
BS2
1
0
0
1
0
1
0
1
VHF-LO
VHF-HI
UHF
Standby mode/stop MOP function (XTALOUT is available in standby
mode)
ATC
RF AGC current-set bit
ATC = 0: Current = 300 nA
ATC = 1: Current = 9 µA
DIFOUT1, 2 selected
ATC = 0
Mode
Mode = 0:
MODE = 0
T3
T3, T2/IFDA, T1/CP2, T0/XLO are test bits and XTALOUT control bit T[3:0] = 0000
(see Table 7)
T2/IFDA
T1/CP2
T0/XLO
Mode = 1:
T2/IFDA = 0 : DIFOUT1, 2 selected
T2/IFDA = 1 : AIFOUT selected
T1/CP2 : lcp control bit, See Table 6
T0/XLO = 0 : XTALOUT enabled
T0/XLO = 1 : XTALOUT disabled
(1) When AISL=1, RF AGC function is not available at VHF-L band (Output level is undefined.)
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Table 3. Address Selection
MA1
MA0
VOLTAGE APPLIED ON AS INPUT
0 V to 0.1 VCC (Low)
0
0
1
1
0
1
0
1
OPEN, or 0.2 VCC to 0.3 VCC (Mid2)
0.4 VCC to 0.6 VCC (Mid1)
0.9 VCC to VCC (High)
Table 4. RF AGC Start Point
ATP2
ATP1
ATP0
IFOUT LEVEL (dBµV)
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
114
112
110
108
106
104
102
Disabled
Table 5. Reference Divider Ratio
RS2
0
RS1
0
RS0
0
REFERENCE DIVIDER RATIO
24
28
0
0
1
0
1
0
32
0
1
1
64
1
0
0
128
80
1
X
1
Table 6. Charge-Pump Current
CHARGE PUMP CURRENT
MODE
CP2
CP1
CP0
(µA)
X
X
X
X
1
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
70
140
350
600
900
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(1)
Table 7. Test Bits/XTALOUT Control
XTALOUT
4-MHz OUTPUT
MODE
T3
T2/IFDA
T1/CP2
T0/XLO
DEVICE OPERATION
0
0
1
1
0
0
0
0
0
0
0
0
0
1
0
1
X
X
Normal operation
Normal operation
Normal operation
Normal operation
Test mode
Enabled
Disabled
X
X
X
1
X
X
1
X
X
X
X
Enabled
Disabled
Not available
Not available
X
Test mode
(1) RFAGC and XTALOUT are not available in test mode.
I2C Read Mode (R/W = 1)
Table 8. Read Data Format
MSB
1
LSB
Address byte (ADB)
Status byte (SB)
1
0
1
0
1
0
MA1
A2
MA0
A1
R/W = 1
A0
A(1)
–
POR
FL
X
(1) A : acknowledge
Table 9. Read Data Symbol Description
SYMBOL
MA[1:0]
DESCRIPTION
DEFAULT
Address set bits (see Table 3)
Power-on-reset flag
POR
POR = 1
POR set: power on
POR reset: end-of-data transmission procedure
In-lock flag
PLL locked (FL = 1), unlocked (FL = 0)
FL
A[2:0]
Digital data of ADC (see Table 10)
Bit P5 must be set to 0.
Table 10. ADC Level(1)
A2
1
A1
0
A0
0
VOLTAGE APPLIED ON ADC INPUT
0.6 VCC to VCC
0
1
1
0.45 VCC to 0.6 VCC
0.3 VCC to 0.45 VCC
0.15 VCC to 0.3 VCC
0 V to 0.15 VCC
0
1
0
0
0
1
0
0
0
(1) Accuracy is 0.03 × VCC
.
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Example I2C Data Write Sequences
Telegram examples:
Start-ADB-DB1-DB2-CB1-BB-CB2-Stop
Start-ADB-DB1-DB2-Stop
Start-ADB-CB1-BB-CB2-Stop
Start-ADB-CB1-BB-Stop
Start-ADB-CB2-Stop
Abbreviations:
ADB: Address byte
BB: Band switch byte
CB1: Control byte 1
CB2: Control byte 2
DB1: Divider byte 1
DB2: Divider byte 2
Start: Start condition
Stop: Stop condition
tHDS-TA
tSUS-TA
t
F
t
HIGH
SCL
tSUS-TO
tSUD-AT
t
t R
LOW
SDA
tHDD-AT
t
BUF
Figure 22. I2C Timing Chart
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APPLICATION INFORMATION
C9
C10 VC1 C1 R1
VLO OSC B
VLO OSC C
BS4
UHF RF IN1
UHF RF IN2
VHI RF IN
VLO RF IN
RF GND
BS4
1
2
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
R5
R6
L1
C2
C35
C38
C39
C40
UHF RF IN1
R29
R2
C3
VC4
3
VHI OSC B
R7
C11 VC2 C4
L2
VHI RF IN
VLO RF IN
4
VHI OSC C
R31
R32
C5 R3
C12
UHF OSC B1
5
L4
C6
VC3
UHF OSC C1
UHF OSC C2
UHF OSC B2
OSC GND
CP
6
C14
L9
L3
C7
R8
7
C44
R37
C15
MIX OUT2
L10
L12
C13
R9
C42
C8 R4
8
MIX OUT1
IF IN
R10
C16
L11
9
(See Note A)
C19
R12
C18
RF AGC OUT
RF AGC BUF
BS3
RF AGC OUT
RF AGC BUF
BS3
10
11
12
13
14
15
16
17
18
19
VTU
C52
C46
R11
VTU
C17
C53
IF GND
C20
R28
DIF OUT
DIF OUT1
DIF OUT2
AIF OUT
BS2
BS2
R30 C21
BS1
BS1
C22
R38
R19
R21
AIF OUT
P5/ADC
VCC
SDA
SDA
R40 C50
R41 C51
P5/ADC
VCC
SCL
SCL
C23
AS
AS
C49
C55
XTAL1
BUS GND
XTAL OUT
C24
X1
XTAL OUT
XTAL2
R39
C54
C47
C25
A. To prevent abnormal oscillation, connect C16, which does not affect a PLL.
B. This application information is advisory and performance-check is required at actual application circuits. TI assumes
no responsibility for the consequences of use of this circuit, such as an infringement of intellectual property rights or
other rights, including patents, of third parties.
Figure 23. Reference Measurement Circuit
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Component Values for Measurement Circuit(1)
PARTS NAME
C1 (VLO OSC B)
VALUE
PARTS NAME
L1 (VLO OSC)
VALUE
1 pF
Φ3.0 mm, 7T, wire 0.32 mm
C2 (VLO OSC C)
C3 (VHI OSC B)
C4 (VHI OSC C)
C5 (UHF OSCB1)
C6 (UHF OSCC1)
C7 (UHF OSCC2)
C8 (UHF OSCB2)
C9 (VLO OSC)
C10(VLO OSC)
C11 (VHI OSC)
C12 (VHI OSC)
C13 (UHF OSC)
C14 (UHF OSC)
C15 (VTU)
2 pF
L2 (VHI OSC)
L3 (UHF OSC)
L4 (UHF OSC)
L9 (MIX OUT2)
L10 (MIX OUT2)
L11 (MIX OUT1)
L12 (MIX OUT1)
R1(VLO OSC B)
R2 (VHI OSC B)
R3 (UHF OSC B1)
R4 (UHF OSC B2)
R5 (VLO OSC)
R6 (VHI OSC)
R7 (VHI OSC)
R8 (UHF OSC)
R9 (UHF OSC)
R10 (VTU)
Φ2.0 mm, 3T, wire 0.4 mm
7 pF
Φ1.8 mm, 3T, wire 0.4 mm
5 pF
Φ1.8 mm, 3T, wire 0.4 mm
1.5 pF
1 pF
680 nH (LK1608R68K-T)
0 Ω
1 pF
680 nH (LK1608R68K-T)
0 Ω
1.5 pF
Open
0
39 pF
12 Ω
51 pF
4.7 Ω
0.5 pF
10 pF
0
3.3 kΩ
3.3 kΩ
3.3 kΩ
1 kΩ
100 pF
2.2 nF/50 V
150 pF/50 V
2.2 nF/50 V
0.01 u/50 V
22 pF/50 V
2.2 nF
2.2 nF
2.2 nF
0.1 µF
27 pF
C16 (CP)
C17 (VTU)
2.2 kΩ
3 kΩ
C18(CP)
C19(CP)
R11 (VTU)
22 kΩ
47 kΩ
0
C20 (DIF OUT1)
C21 (DIF OUT2)
C22 (AIF OUT)
C23 (VCC)
R12 (CP)
R19 (AIF OUT)
R21 (P5/ADC)
R28 (DIF OUT1)
R29 (UHF RF IN1)
R30 (DIF OUT2)
R31 (VHI RF IN)
R32 (VLO RF IN)
R37 (MIXOUT)
R38 (SDA)
Open
200 Ω
(50 Ω)
250 Ω
(50 Ω)
(50 Ω)
0
C24 (XTAL)
C25 (XTAL)
27 pF
C35 (UHF RF IN1)
C38 (UHF RFIN2)
C39 (VHI RF IN)
C40 (VLO RF IN)
C42 (MIX OUT)
C44 (MIX OUT)
C46 (RF AGC OUT)
C47 (XTAL OUT)
C49 (AS)
2.2 nF
2.2 nF
2.2 nF
2.2 nF
6.5 pF
2.2 nF
0.1 µF
0.01 µF
22 pF
330 Ω
5.1 kΩ
330 Ω
Open
R39 (XTAL OUT)
R40 (SCL)
R41 (AS)
VC1 (VLO OSC)
VC2 (VHI OSC)
VC3 (UHF OSC)
VC4 (VHI OSC)
X1
MA2S374
MA2S374
MA2S372
MA2S372
4-MHz crystal
C50 (SDA)
Open
C51 (SCL)
Open
C52 (RF AGC OUT)
C53 (RF AGC BUF)
C54 (XTAL OUT)
C55 (AS)
0.047 µF
Open
10 pF
Open
(1) If frequency = 44MHz,local frequency range:
VHF-LOW: 101–215 MHz
VHF-HIGH: 221–511 MHz
UHF: 517–908 MHz
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APPLICATION INFORMATION (CONTINUED)
Test Circuits
DUT
SG
SG
SG
SG
Spectrum
Analyzer
200 W
VOUT Diff
VLO RF IN
(VHI RF IN)
DIF OUT1
DIF OUT2
Gv = 20log(VOUT Diff/VIN
)
50 W
50 W
50 W
50 W
= 20log(VOUT/VIN) + 6 + 14
VIN
VOUT
50 W
50 W
250 W
Figure 24. VHF-Conversion Gain-Measurement Circuit (at DIFOUT)
DUT
Spectrum
Analyzer
VLO RF IN
(VHI RF IN)
AIFOUT
Gv = 20log(VOUT/VIN
)
VIN
VOUT
50 W
50 W
Figure 25. VHF-Conversion Gain Measurement Circuit (at AIFOUT)
DUT
Spectrum
Analyzer
200 W
VOUT Diff
UHF RF IN1
UHF RF IN2
DIF OUT1
DIF OUT2
Gv = 20log(VOUT Diff/VIN
)
= 20log(VOUT/VIN) + 6 + 14
VIN
VOUT
50 W
50 W
250 W
Figure 26. UHF-Conversion Gain-Measurement Circuit (at DIFOUT)
DUT
Spectrum
Analyzer
UHFRF IN1
UHFRF IN2
AIFOUT
Gv = 20log(VOUT/VIN
)
VIN
VOUT
50 W
50 W
Figure 27. UHF-Conversion Gain Measurement Circuit (at AIFOUT)
NF
Meter
Noise
DUT
Source
Figure 28. Noise-Figure Measurement Circuit
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Signal
Generator
fdes: P = 70 dBmV
Mix
Pad
Modulation
Analyzer
DUT
fdes ±6 MHz
AM 30%, 1 kHz
Signal
Generator
Figure 29. 1% Cross-Modulation Distortion Measurement Circuit
TYPICAL CHARACTERISTICS
Band Switch Driver Output Voltage (BS1–BS4)
BS OUTPUT CURRENT
vs
OUTPUT VOLTAGE
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
= 5.5 V
CC
V
= 5.0 V
= 4.5 V
CC
V
CC
0
2
4
6
8
10
12
14
16
18
20
Band Switch Current – mA
Figure 30. Band Switch Driver Output Voltage
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TYPICAL CHARACTERISTICS (continued)
S-Parameter
40MHz
500MHz
Figure 31. VLO RFIN, VHI RFIN
900MHz
350MHz
Figure 32. UHF RFIN
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TYPICAL CHARACTERISTICS (continued)
60 MHz
30 MHz
Figure 33. DIFOUT
60 MHz
30 MHz
Figure 34. AIFOUT
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PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN761642DBTR
TSSOP
DBT
38
2000
330.0
16.4
6.9
10.2
1.8
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
TSSOP DBT 38
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 38.0
SN761642DBTR
2000
Pack Materials-Page 2
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