SNJ54AS86AJ [TI]
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES; 四路2输入异或门
| 型号： | SNJ54AS86AJ |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES |
| 文件： | 总16页 (文件大小：637K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁ ꢂꢃ ꢄꢅ ꢀ ꢆꢇ ꢈ ꢉꢀ ꢁꢂ ꢃ ꢄꢀꢆ ꢇ ꢄꢈ ꢉꢀꢁꢊ ꢃ ꢄꢅ ꢀꢆ ꢇ ꢈ ꢉꢀꢁ ꢊꢃꢄ ꢀ ꢆꢇꢄ
ꢋ ꢌꢄꢍꢎ ꢌꢏꢅ ꢐꢉ ꢑꢒꢓ ꢁꢏ ꢌꢔ ꢉꢐꢕ ꢖꢅ ꢌꢀꢓ ꢗꢐꢒꢘ ꢎꢉ ꢙ ꢄꢔꢐ ꢀ
ꢚ
SDAS006B − APRIL 1982 − REVISED DECEMBER 1994
SN54ALS86, SN54AS86A . . . J PACKAGE
SN74ALS86, SN74AS86A . . . D OR N PACKAGE
(TOP VIEW)
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
1A
1B
1Y
2A
2B
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
4B
4A
4Y
3B
3A
3Y
description
These devices contain four independent 2-input
exclusive-OR gates. They perform the Boolean
functions Y = A ⊕ B or Y = AB + AB in positive
logic.
2Y
GND
8
A common application is as a true/complement
element. If one of the inputs is low, the other input
is reproduced in true form at the output. If one of
the inputs is high, the signal on the other input is
reproduced inverted at the output.
SN54ALS86, SN54AS86A . . . FK PACKAGE
(TOP VIEW)
The SN54ALS86 and SN54AS86A are
characterized for operation over the full military
temperature range of −55°C to 125°C. The
SN74ALS86 and SN74AS86A are characterized
for operation from 0°C to 70°C.
3
2
1
20 19
18
1Y
NC
2A
4A
4
5
6
7
8
NC
17
16 4Y
15
14
NC
2B
NC
3B
9 10 11 12 13
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
L
NC − No internal connection
L
L
L
H
H
L
H
L
H
H
H
†
logic symbol
1
= 1
1A
1B
2A
2B
3A
3B
4A
4B
3
1Y
2
4
6
2Y
5
9
8
10
12
13
3Y
11
4Y
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
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Copyright 1994, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢀꢆ ꢇ ꢈ ꢉ ꢀꢁ ꢂꢃ ꢄꢀ ꢆ ꢇ ꢄ ꢈꢉ ꢀ ꢁꢊ ꢃ ꢄ ꢅꢀ ꢆ ꢇ ꢈꢉꢀ ꢁꢊ ꢃꢄꢀ ꢆ ꢇꢄ
ꢋꢌ ꢄ ꢍꢎ ꢌ ꢏꢅꢐ ꢉ ꢑ ꢒꢓ ꢁꢏ ꢌꢔ ꢉ ꢐ ꢕꢖꢅ ꢌ ꢀꢓ ꢗ ꢐꢒ ꢘ ꢎꢉꢙ ꢄꢔ ꢐꢀ
ꢚ
SDAS006B − APRIL 1982 − REVISED DECEMBER 1994
exclusive-OR logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic
symbols.
EXCLUSIVE-OR
= 1
These are five equivalent exclusive-OR symbols valid for an ′ALS86 or ′AS86A gate in positive logic. Negation
may be shown at any two ports.
LOGIC-IDENTITY ELEMENT
=
EVEN-PARITY ELEMENT
2k
ODD-PARITY ELEMENT
2k + 1
The output is active (low) if
all inputs are at the same
logic level (i.e., A = B).
The output is active (low) if
an even number of inputs
(i.e., 0 or 2) are active.
The output is active (high) if
an odd number of inputs
(i.e., only 1 of the 2) are
active.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢀ ꢆꢇ ꢈ ꢉꢀ ꢁꢂ ꢃ ꢄꢀꢆ ꢇ ꢄꢈ ꢉꢀꢁꢊ ꢃ ꢄꢅ ꢀꢆ ꢇ ꢈ ꢉꢀꢁ ꢊꢃꢄ ꢀ ꢆꢇꢄ
ꢋ ꢌꢄꢍꢎ ꢌꢏꢅ ꢐꢉ ꢑꢒꢓ ꢁꢏꢌ ꢔ ꢉꢐꢕ ꢖꢅ ꢌꢀꢓꢗ ꢐꢒꢘ ꢎ ꢉꢙ ꢄꢔꢐ ꢀ
ꢚ
SDAS006B − APRIL 1982 − REVISED DECEMBER 1994
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Operating free-air temperature range, T : SN54ALS86 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
A
SN74ALS86 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS86
MIN NOM
SN74ALS86
MIN NOM
UNIT
MAX
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
IH
0.7
−0.4
4
0.8
−0.4
8
V
IL
I
I
mA
mA
°C
OH
OL
T
A
−55
125
0
70
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS86
SN74ALS86
PARAMETER
TEST CONDITIONS
I = −18 mA
UNIT
‡
‡
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
−1.5
−1.5
V
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
= −0.4 mA
= 4 mA
V
CC
−2
V
CC
−2
OH
CC
OH
OL
OL
0.25
0.4
0.25
0.35
0.4
0.5
V
OL
V
CC
= 4.5 V
V
= 8 mA
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V = 7 V
0.1
20
0.1
mA
µA
I
I
V = 2.7 V
I
20
IH
IL
V = 0.4 V
I
−0.1
−112
5.9
−0.1
−112
5.9
mA
mA
mA
§
V
O
= 2.25 V
−20
−30
O
All inputs at 4.5 V
3.9
3.9
CC
‡
§
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
TO
(OUTPUT)
¶
PARAMETER
(INPUT)
UNIT
T
A
= MIN to MAX
SN54ALS86
SN74ALS86
MIN
3
MAX
22
MIN
3
MAX
17
t
t
t
t
PLH
PHL
PLH
PHL
A or B
(other input low)
Y
Y
ns
ns
2
14
2
12
3
22
3
17
A or B
(other input high)
2
12
2
10
¶
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢀꢆ ꢇ ꢈ ꢉ ꢀꢁ ꢂꢃ ꢄꢀ ꢆ ꢇ ꢄ ꢈꢉ ꢀ ꢁꢊ ꢃ ꢄ ꢅꢀ ꢆ ꢇ ꢈꢉꢀ ꢁꢊ ꢃꢄꢀ ꢆ ꢇꢄ
ꢋꢌ ꢄ ꢍꢎ ꢌ ꢏꢅꢐ ꢉ ꢑ ꢒꢓ ꢁꢏ ꢌꢔ ꢉ ꢐ ꢕꢖꢅ ꢌ ꢀꢓ ꢗ ꢐꢒ ꢘ ꢎꢉꢙ ꢄꢔ ꢐꢀ
ꢚ
SDAS006B − APRIL 1982 − REVISED DECEMBER 1994
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Operating free-air temperature range, T : SN54AS86A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
A
SN74AS86A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS86A
MIN NOM
SN74AS86A
MIN NOM
UNIT
MAX
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
IH
0.8
−2
0.8
−2
20
70
V
IL
I
I
mA
mA
°C
OH
20
OL
T
A
−55
125
0
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS86A
SN74AS86A
PARAMETER
TEST CONDITIONS
I = −18 mA
UNIT
‡
‡
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.5 V,
−1.2
−1.2
V
IK
I
= 4.5 V to 5.5 V,
= 4.5 V,
I
= −2 mA
= 20 mA
V
CC
−2
V −2
CC
V
OH
OL
OH
OL
I
0.35
0.5
0.1
0.35
0.5
0.1
V
I
I
I
I
I
I
= 5.5 V,
V = 7 V
I
mA
µA
mA
mA
mA
mA
I
= 5.5 V,
V = 2.7 V
I
20
20
IH
IL
= 5.5 V,
V = 0.4 V
I
−0.5
−112
18
−0.5
−112
18
§
= 5.5 V,
V
O
= 2.25 V
−30
−30
O
= 5.5 V,
V
I(A)
= 4.5 V, V
I(B)
= 0
11
20
11
20
CCH
CCL
= 5.5 V,
V = 4.5 V
I
38
38
‡
§
All typical values are at V
CC
= 5 V, T = 25°C.
A
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
TO
(OUTPUT)
¶
PARAMETER
(INPUT)
UNIT
T
A
= MIN to MAX
SN54AS86A
SN74AS86A
MIN
2
MAX
8.5
8
MIN
2
MAX
7.5
6.5
6.5
7
t
t
t
t
PLH
PHL
PLH
PHL
A or B
(other input low)
Y
Y
ns
ns
2
2
1
8
1
A or B
(other input high)
1
9
1
¶
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢀ ꢆꢇ ꢈ ꢉꢀ ꢁꢂ ꢃ ꢄꢀꢆ ꢇ ꢄꢈ ꢉꢀꢁꢊ ꢃ ꢄꢅ ꢀꢆ ꢇ ꢈ ꢉꢀꢁ ꢊꢃꢄ ꢀ ꢆꢇꢄ
ꢋ ꢌꢄꢍꢎ ꢌꢏꢅ ꢐꢉ ꢑꢒꢓ ꢁꢏꢌ ꢔ ꢉꢐꢕ ꢖꢅ ꢌꢀꢓꢗ ꢐꢒꢘ ꢎ ꢉꢙ ꢄꢔꢐ ꢀ
ꢚ
SDAS006B − APRIL 1982 − REVISED DECEMBER 1994
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
t
w
h
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
[3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
V
OL
0.3 V
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
0.3 V
V
[0 V
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CFP
Drawing
5962-88621012A
5962-8862101CA
5962-8862101DA
5962-9757201Q2A
5962-9757201QCA
SN54ALS86J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
J
20
14
14
20
14
14
14
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
W
FK
J
LCCC
CDIP
CDIP
SOIC
POST-PLATE N / A for Pkg Type
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
J
SN74ALS86D
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALS86DE4
SN74ALS86DG4
SN74ALS86DR
SN74ALS86DRE4
SN74ALS86DRG4
SN74ALS86N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
D
D
D
D
D
N
14
14
14
14
14
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS86N3
SN74ALS86NE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
14
14
TBD
Call TI
Call TI
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS86NSR
SN74ALS86NSRE4
SN74ALS86NSRG4
SN74AS86AD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
NS
NS
D
14
14
14
14
14
14
14
14
14
14
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AS86ADE4
SN74AS86ADG4
SN74AS86ADR
SN74AS86ADRE4
SN74AS86ADRG4
SN74AS86AN
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
POST-PLATE N / A for Pkg Type
SN74AS86ANE4
N
25
Pb-Free
(RoHS)
SNJ54ALS86FK
SNJ54ALS86J
SNJ54ALS86W
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
J
20
14
14
1
1
1
TBD
TBD
TBD
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
W
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
Drawing
SNJ54AS86AFK
SNJ54AS86AJ
ACTIVE
ACTIVE
FK
J
20
14
1
1
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
(mm)
16
SN74ALS86DR
SN74ALS86NSR
SN74AS86ADR
D
NS
D
14
14
14
SITE 41
SITE 41
SITE 41
6.5
8.2
6.5
9.0
10.5
9.0
2.1
2.5
2.1
8
12
8
16
16
16
Q1
Q1
Q1
330
16
330
16
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74ALS86DR
SN74ALS86NSR
SN74AS86ADR
D
NS
D
14
14
14
SITE 41
SITE 41
SITE 41
346.0
346.0
346.0
346.0
346.0
346.0
33.0
33.0
33.0
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
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