SNJ54HCT540J [TI]
具有 TTL 兼容型 CMOS 输入和三态输出的军用 8 通道 4.5V 至 5.5V 反相器 | J | 20 | -55 to 125;
| 型号： | SNJ54HCT540J |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 TTL 兼容型 CMOS 输入和三态输出的军用 8 通道 4.5V 至 5.5V 反相器 | J | 20 | -55 to 125 驱动 输出元件 逻辑集成电路 总线驱动器 总线收发器 |
| 文件： | 总14页 (文件大小：918K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54HCT540, SN74HCT540
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS008C – MARCH 1984 – REVISED MARCH 2003
SN54HCT540 . . . J PACKAGE
SN74HCT540 . . . DW OR N PACKAGE
(TOP VIEW)
Operating Voltage Range of 4.5 V to 5.5 V
Low Power Consumption, 80-µA Max I
CC
Typical t = 12 ns
pd
OE1
A1
V
CC
1
2
3
4
5
6
7
8
9
10
20
±6-mA Output Drive at 5 V
19 OE2
18 Y1
17 Y2
Low Input Current of 1 µA Max
Inputs Are TTL-Voltage Compatible
A2
A3
High-Current 3-State Outputs Interface
Directly With System Bus or Can Drive Up
To 15 LSTTL Loads
16
15
14
13
12
11
A4
Y3
Y4
Y5
Y6
Y7
Y8
A5
A6
Data Flow-Through Pinout (All Inputs on
Opposite Side From Outputs)
A7
A8
GND
description/ordering information
These octal buffers and line drivers are designed to have the performance of the ’HCT240 devices and a pinout
with inputs and outputs on opposite sides of the package. This arrangement greatly facilitates printed circuit
board layout.
The 3-state control gate is a 2-input NOR. If either output-enable (OE1 or OE2) input is high, all eight outputs
are in the high-impedance state. The ’HCT540 devices provide inverted data at the outputs.
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP – N
SOIC – DW
CDIP – J
Tube
SN74HCT540N
SN74HCT540N
–40°C to 85°C
–55°C to 125°C
Tube
SN74HCT540DW
SN74HCT540DWR
SNJ54HCT540J
HCT540
Tape and reel
Tube
SNJ54HCT540J
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each buffer/driver)
INPUTS
OUTPUT
Y
OE1
L
OE2
L
A
L
H
L
L
L
H
X
X
H
X
Z
Z
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HCT540, SN74HCT540
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS008C – MARCH 1984 – REVISED MARCH 2003
logic diagram (positive logic)
1
OE1
19
OE2
2
18
A1
Y1
To Seven Other Channels
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HCT540
MIN NOM MAX
SN74HCT540
UNIT
MIN NOM
MAX
V
V
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
I
High-level input voltage
Low-level input voltage
Input voltage
V
V
= 4.5 V to 5.5 V
= 4.5 V to 5.5 V
CC
0.8
0.8
V
CC
0
0
V
V
0
0
V
V
V
CC
CC
Output voltage
V
O
CC
CC
t
Input transition (rise and fall) time
Operating free-air temperature
500
125
500
85
ns
°C
t
T
–55
–40
A
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HCT540, SN74HCT540
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS008C – MARCH 1984 – REVISED MARCH 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54HCT540 SN74HCT540
A
PARAMETER
TEST CONDITIONS
V
UNIT
V
CC
MIN
TYP
MAX
MIN
4.4
MAX
MIN
4.4
MAX
I
I
I
I
= –20 µA
= –6 mA
= 20 µA
= 6 mA
4.4 4.499
OH
OH
OL
OL
V
V = V or V
IH
4.5 V
4.5 V
OH
OL
I
IL
3.98
4.3
0.001
0.17
3.7
3.84
0.1
0.26
±100
±0.5
8
0.1
0.4
0.1
0.33
±1000
±5
V
V = V or V
V
I
IH
IL
I
I
I
V = V
I
or 0
5.5 V
5.5 V
5.5 V
±0.1
±1000
±10
nA
µA
µA
I
CC
V
O
= V
or 0,
V = V or V
±0.01
OZ
CC
CC
or 0,
I
IH
IL
V = V
I
I
O
= 0
160
80
CC
One input at 0.5 V or 2.4 V,
Other inputs at 0 or V
†
5.5 V
1.4
3
2.4
10
3
2.9
mA
pF
∆I
CC
CC
4.5 V
to 5.5 V
C
10
10
i
†
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
CC
.
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
13
SN54HCT540 SN74HCT540
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
ns
CC
MIN
MAX
20
MIN
MAX
30
MIN
MAX
25
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
t
t
t
t
A
Y
Y
Y
Y
pd
en
dis
t
12
18
27
23
20
30
45
38
ns
OE
OE
18
27
41
34
19
30
45
38
ns
18
27
41
34
8
12
18
15
ns
7
11
16
14
switching characteristics over recommended operating free-air temperature range, C = 150 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
20
SN54HCT540 SN74HCT540
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
ns
CC
MIN
MAX
30
MIN
MAX
45
MIN
MAX
38
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
t
pd
t
en
t
t
A
Y
Y
Y
19
27
41
34
26
40
60
50
ns
OE
25
36
54
45
17
42
63
53
ns
14
38
57
48
operating characteristics, T = 25°C
A
PARAMETER
Power dissipation capacitance per buffer/driver
TEST CONDITIONS
TYP
UNIT
C
No load
35
pF
pd
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HCT540, SN74HCT540
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS008C – MARCH 1984 – REVISED MARCH 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
PARAMETER
R
C
S1
S2
L
L
50 pF
or
150 pF
t
Open
Closed
Closed
Open
S1
S2
PZH
Test
Point
t
t
1 kΩ
1 kΩ
en
R
t
L
PZL
From Output
Under Test
t
t
Open
Closed
Open
PHZ
PLZ
50 pF
C
dis
L
Closed
(see Note A)
50 pF
or
150 pF
t
or t
––
Open
Open
pd
t
LOAD CIRCUIT
Input
3 V
2.7 V
2.7 V
1.3 V
0.3 V
1.3 V
0.3 V
0 V
t
t
r
f
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
3 V
0 V
Output
Control
(Low-Level
Enabling)
3 V
0 V
Input
1.3 V
1.3 V
1.3 V
1.3 V
t
t
PLH
PHL
90%
t
t
PLZ
PZL
V
V
OH
In-Phase
Output
≈V
CC
Output
Waveform 1
(See Note B)
90%
t
1.3 V
10%
1.3 V
10%
1.3 V
10%
t
OL
V
OL
OH
t
r
f
f
t
t
t
PHL
90%
PLH
PZH
PHZ
Out-of-
Phase
Output
V
V
OH
V
Output
Waveform 2
(See Note B)
90%
t
90%
1.3 V
10%
1.3 V
10%
1.3 V
OL
≈0 V
t
r
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES
NOTES: A.
C includes probe and test-fixture capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
are the same as t
are the same as t
.
dis
en
.
pd
PLZ
PZL
PLH
PHZ
PZH
PHL
.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
JM38510/65760BRA
M38510/65760BRA
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-55 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
ACTIVE
CDIP
CDIP
J
20
20
1
TBD
TBD
TBD
A42
A42
N / A for Pkg Type
JM38510/
65760BRA
ACTIVE
J
1
N / A for Pkg Type
-55 to 125
JM38510/
65760BRA
SN54HCT540J
ACTIVE
ACTIVE
CDIP
SOIC
J
20
20
1
A42
N / A for Pkg Type
-55 to 125
-40 to 85
SN54HCT540J
SN74HCT540DW
DW
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HCT540
SN74HCT540DWE4
SN74HCT540DWG4
SN74HCT540DWR
SN74HCT540DWRE4
SN74HCT540DWRG4
SN74HCT540N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
DW
DW
DW
DW
DW
N
20
20
20
20
20
20
25
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
HCT540
Green (RoHS
& no Sb/Br)
HCT540
2000
2000
2000
20
Green (RoHS
& no Sb/Br)
HCT540
Green (RoHS
& no Sb/Br)
HCT540
Green (RoHS
& no Sb/Br)
HCT540
Pb-Free
(RoHS)
SN74HCT540N
SN74HCT540N3
SN74HCT540NE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
20
20
TBD
Call TI
Call TI
-40 to 85
-40 to 85
20
1
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74HCT540N
SNJ54HCT540J
SNJ54HCT540FK
SNJ54HCT540J
OBSOLETE
ACTIVE
LCCC
CDIP
FK
J
20
20
TBD
TBD
Call TI
A42
Call TI
-55 to 125
-55 to 125
N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54HCT540, SN74HCT540 :
Catalog: SN74HCT540
•
Military: SN54HCT540
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74HCT540DWR
SOIC
DW
20
2000
330.0
24.4
10.8
13.0
2.7
12.0
24.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC DW 20
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 45.0
SN74HCT540DWR
2000
Pack Materials-Page 2
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