SNJ55LBC172W [TI]
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER; 翻两番低功耗差动线路驱动器
| 型号： | SNJ55LBC172W |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER |
| 文件： | 总17页 (文件大小：392K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
J OR W PACKAGE
(TOP VIEW)
Meets Standard EIA-485
Designed for High-Speed Multipoint
Transmission on Long Bus Lines in Noisy
Environments
V
1A
1Y
1
2
3
4
5
6
7
8
16
15
14
CC
4A
4Y
Supports Data Rates up to and Exceeding
Ten Million Transfers Per Second
1Z
13 4Z
G
Common-Mode Output Voltage Range of
–7 V to 12 V
12
11
10
9
G
2Z
3Z
3Y
3A
2Y
Positive- and Negative-Current Limiting
2A
GND
Low Power Consumption . . . 1.5 mA Max
(Output Disabled)
FK PACKAGE
(TOP VIEW)
description
The SN55LBC172 is a monolithic quadruple
differential line driver with 3-state outputs. This
deviceisdesignedtomeettherequirementsofthe
Electronics Industry Association (EIA) standard
RS-485. The SN55LBC172 is optimized for
balanced multipoint bus transmission at data
rates up to and exceeding 10 million bits per
second. The driver features wide positive and
negative common-mode output voltage ranges,
current limiting, and thermal-shutdown circuitry,
making it suitable for party-line applications in
noisy environments. The device is designed using
the LinBiCMOS process, facilitating ultralow
power consumption and inherent robustness.
3
4
2
1
20 19
1Z
G
4Y
4Z
NC
G
18
17
16
15
14
5
6
7
NC
2Z
2Y
3Z
8
9
10 11 12 13
NC – No internal connection
The SN55LBC172 provides positive- and negative-current limiting and thermal shutdown for protection from
line fault conditions on the transmission bus line. This device offers optimum performance when used with the
SN55LBC173M quadruple line receiver.
‡
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
§
PACKAGE
T
A
LCCC – FK
CDIP – J
CFP – W
Tube
Tube
Tube
SNJ55LBC172FK
SNJ55LBC172J
SNJ55LBC172W
SNJ55LBC172FK
SNJ55LBC172J
SNJ55LBC172W
–55°C to 125°C
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a trademark of Texas Instruments Incorporated.
Copyright 1995–2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
FUNCTION TABLE
(each driver)
ENABLES
OUTPUTS
INPUT
A
G
H
H
X
Y
H
L
Z
L
G
X
X
L
H
L
H
L
H
H
L
X
L
L
L
Z
H
Z
X
H
H = high level, L = low level, X = irrelevant,
Z = high impedance (off)
†
logic diagram (positive logic)
logic symbol
4
G
G
≥1
12
4
G
EN
12
G
2
3
1Y
1Z
1
1A
2A
3A
4A
2
3
1Y
1Z
2Y
2Z
3Y
3Z
4Y
4Z
1
1A
6
5
6
2Y
2Z
7
7
2A
5
10
11
14
13
9
10
11
3A
3Y
3Z
9
15
4A
14
13
4Y
4Z
15
†
ThissymbolisinaccordancewithANSI/IEEEStd91-1984
and IEC Publication 617-12.
Pin numbers shown are for the J or W package.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
schematic diagrams of inputs and outputs
ALL INPUTS
Y OR Z OUTPUT
V
CC
V
CC
+
50 µA
–
200 Ω
Input
Output
Driver
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage range, V
Output voltage range, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10 V to 15 V
CC
O
Input voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
I
‡
Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Operating free-air temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The maximum operating junction temperature is internally limited. Use the dissipation rating table to operate below this temperature.
NOTE 1: All voltage values are with respect to GND.
DISSIPATION RATING TABLE
≤ 25°C DERATING FACTOR
T
A
T = 125°C
A
POWER RATING
PACKAGE
POWER RATING
ABOVE T =125°C
A
FK
J
1375 mW
11.0 mW/°C
11.0 mW/°C
8.0 mW/°C
275 mW
1375 mW
275 mW
W
1000 mW
200 mW
recommended operating conditions
MIN NOM
4.75
MAX
UNIT
Supply voltage, V
CC
5
5.25
V
V
V
High-level input voltage, V
IH
2
Low-level input voltage, V
0.8
12
IL
Output voltage at any bus terminal (separately or common mode), V
Y or Z
V
O
–7
High-level output current, I
Y or Z
Y or Z
–60
60
mA
mA
OH
Low-level output current, I
OL
Continuous total power dissipation
Operating free-air temperature, T
See Dissipation Rating Table
–55 125 °C
A
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
†
PARAMETER
Input clamp voltage
TEST CONDITIONS
MIN TYP
MAX
–1.5
5
UNIT
V
IK
I = –18 mA
V
I
R
= 54 Ω,
= 60 Ω,
See Figure 1
See Figure 2
1.1
1.1
1.8
1.7
L
L
‡
|V
|
V
V
V
Differential output voltage
OD
R
R
5
§
∆|V
|
|
±0.2
Change in magnitude of differential output voltage
Common-mode output voltage
OD
3
– 1
V
OC
= 54 Ω,
See Figure 1
L
§
∆|V
±0.2
±100
±100
–100
–100
±250
7
V
Change in magnitude of common-mode output voltage
OC
I
I
I
I
I
Output current with power off
V
V
= 0,
V = – 7 V to 12 V
O
µA
µA
µA
µA
mA
O
CC
High-impedance-state output current
High-level input current
= – 7 V to 12 V
O
OZ
IH
V = 2.4 V
I
Low-level input current
V = 0.4 V
I
IL
Short-circuit output current
V
O
= –7 V to 12 V
OS
Outputs enabled
Outputs disabled
I
Supply current (all drivers)
No load
mA
CC
1.5
†
‡
All typical values are at V
= 5 V and T = 25°C.
A
CC
specificationdoesnotfullycomplywithEIA-485atoperatingtemperaturesbelow0°C. Theloweroutputsignalshouldbeused
TheminimumV
OD
to determine the maximum signal transmission distance.
∆|V | and ∆|V | are the changes in magnitude of V
§
and V , respectively, that occur when the input is changed from a high level to a low
OC
OD
level.
OC
OD
switching characteristics, V
= 5 V
CC
PARAMETER
TEST CONDITIONS
T
MIN
2
TYP
MAX
20
UNIT
A
25°C
–55°C to 125°C
25°C
11
t
t
t
t
t
t
Differential output delay time
R
R
R
R
R
R
= 54 Ω,
= 54 Ω,
See Figure 3
ns
d(OD)
t(OD)
PZH
PZL
L
L
L
L
L
L
2
40
10
4
15
25
Differential output transition time
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
See Figure 3
ns
ns
ns
ns
ns
–55°C to 125°C
25°C
60
30
= 110 Ω, See Figure 4
= 110 Ω, See Figure 5
= 110 Ω, See Figure 4
= 110 Ω, See Figure 5
–55°C to 125°C
25°C
40
30
–55°C to 125°C
25°C
40
60
PHZ
PLZ
–55°C to 125°C
25°C
115
30
–55°C to 125°C
55
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
PARAMETER MEASUREMENT INFORMATION
R
L
2
V
OD2
R
L
V
OC
2
Figure 1. Differential and Common-Mode Output Voltages
V
test
R1 = 375 Ω
Y
Z
A
R
= 60 Ω
0 V or 3 V
L
V
OD
G at 5 V
or
G at 0 V
R2 = 375 Ω
–7 V < V
< 12 V
test
V
test
Figure 2. Driver V
Test Circuit
OD
3 V
Input
1.5 V
1.5 V
Input
50 Ω
0
R
= 54 Ω
L
Output
C
= 50 pF
L
Generator
(see Note A)
t
t
d(OD)
d(OD)
(see Note B)
≈ 2.5 V
90%
10%
50%
50%
Output
t
≈ – 2.5 V
3 V
t
t(OD)
t(OD)
VOLTAGE WAVEFORMS
NOTES: A. The input pulses are supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, t ≤ 5 ns,
TEST CIRCUIT
r
t ≤ 5 ns, Z = 50 Ω.
f
O
B.
C
includes probe and stray capacitance.
L
Figure 3. Driver Differential-Output Test Circuit and Delay and Transition-Time Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
PARAMETER MEASUREMENT INFORMATION
3 V
Input
S1
1.5 V
1.5 V
Output
0 V or 3 V
Input
0
0.5 V
R
= 110 Ω
t
L
PZH
Generator
(see Note A)
C
= 50 pF
V
L
OH
50 Ω
(see Note B)
Output
2.3 V
V
off
≈ 0
t
PHZ
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, t ≤ 5 ns,
TEST CIRCUIT
r
t ≤ 5 ns, Z = 50 Ω.
f
O
B.
C
includes probe and stray capacitance.
L
Figure 4. t
and t
Test Circuit and Voltage Waveforms
PZH
PHZ
5 V
3 V
0
R
= 110 Ω
Input
t
L
1.5 V
1.5 V
S1
Output
0 V or 3 V
PZL
t
PLZ
5 V
0.5 V
C
= 50 pF
Input
L
Generator
(see Note A)
(see Note B)
50 Ω
2.3 V
Output
V
OL
VOLTAGE WAVEFORMS
3 V
(see Note C)
TEST CIRCUIT
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, t ≤ 5 ns,
r
t ≤ 5 ns, Z = 50 Ω.
f
O
B.
C
includes probe and stray capacitance.
L
C. To test the active-low enable G, ground G and apply an inverted waveform to G.
Figure 5. t
and t
Test Circuit and Waveforms
PZL
PLZ
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
TYPICAL CHARACTERISTICS
OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
vs
OUTPUT VOLTAGE
LOW-LEVEL OUTPUT CURRENT
50
40
5
Output Disabled
= 25°C
V
T
= 5 V
= 25°C
CC
A
4.5
4
T
A
30
20
3.5
3
10
0
2.5
2
–10
–20
–30
–40
–50
V
= 0 V
= 5 V
CC
1.5
1
V
CC
0.5
0
–25 –20 –15 –10 –5
0
5
10 15 20 25
–20
0
20
40
60
80
100 120
V
O
– Output Voltage – V
I
– Low-Level Output Current – mA
OL
Figure 7
Figure 6
DRIVER
HIGH-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
FREE-AIR TEMPERATURE
5
4.5
4
3
2.5
2
R
V
= 54 Ω
V
T
= 5 V
L
CC
= 25°C
= 5 V
CC
A
3.5
3
1.5
1
2.5
2
0.5
0
1.5
20
0
–20
–40 –60
–80
–60 –40 –20
0
20
40
60
80 100
–100 –120
T
A
– Free-Air Temperature – °C
I
– High-Level Output Current – mA
OH
Figure 8
Figure 9
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
TYPICAL CHARACTERISTICS
PROPAGATION DELAY TIME,
DIFFERENTIAL OUTPUT VOLTAGE
DIFFERENTIAL OUTPUT
vs
vs
OUTPUT CURRENT
FREE-AIR TEMPERATURE
14
3
2.5
2
V
T
= 5 V
R
C
= 54 Ω
= 50 pF
= 5 V
CC
= 25°C
L
L
A
13
12
V
CC
11
10
9
1.5
1
8
7
6
0.5
0
5
4
0
10 20 30 40 50 60 70 80 90 100
–60 –40 –20
0
20
40
60
80 100
I
O
– Output Current – mA
T
A
– Free-Air Temperature – °C
Figure 10
Figure 11
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
MECHANICAL DATA
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
18 17 16 15 14 13 12
TERMINALS
MIN
MAX
MIN
MAX
**
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
21
22
23
24
25
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
B SQ
A SQ
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
MECHANICAL DATA
J (R-GDIP-T**)
CERAMIC DUAL-IN-LINE PACKAGE
14 PIN SHOWN
PINS **
14
16
18
20
DIM
0.310
(7,87)
0.310
(7,87)
0.310
(7,87)
0.310
(7,87)
A MAX
B
0.290
(7,37)
0.290
(7,37)
0.290
(7,37)
0.290
(7,37)
A MIN
B MAX
B MIN
C MAX
C MIN
14
8
0.785
0.785
0.910
0.975
(19,94) (19,94) (23,10) (24,77)
C
0.755
(19,18) (19,18)
0.755
0.930
(23,62)
0.300
(7,62)
0.300
(7,62)
0.300
(7,62)
0.300
(7,62)
1
7
0.065 (1,65)
0.045 (1,14)
0.245
(6,22)
0.245
(6,22)
0.245
(6,22)
0.245
(6,22)
0.100 (2,54)
0.070 (1,78)
0.020 (0,51) MIN
A
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.100 (2,54)
0°–15°
0.023 (0,58)
0.015 (0,38)
0.014 (0,36)
0.008 (0,20)
4040083/D 08/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.
E. Falls within MIL STD 1835 GDIP1-T14, GDIP1-T16, GDIP1-T18, GDIP1-T20, and GDIP1-T22.
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SGLS084C – MARCH 1995 – REVISED JANUARY 2003
MECHANICAL DATA
W (R-GDFP-F16)
CERAMIC DUAL FLATPACK
Base and Seating Plane
0.285 (7,24)
0.245 (6,22)
0.006 (0,15)
0.004 (0,10)
0.085 (2,16)
0.045 (1,14)
0.045 (1,14)
0.026 (0,66)
0.305 (7,75)
0.275 (6,99)
0.355 (9,02)
0.235 (5,97)
0.355 (9,02)
0.235 (5,97)
0.019 (0,48)
0.015 (0,38)
1
16
0.050 (1,27)
0.440 (11,18)
0.371 (9,42)
0.025 (0,64)
0.015 (0,38)
8
9
1.025 (26,04)
0.745 (18,92)
4040180-3/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL-STD-1835 GDFP1-F16 and JEDEC MO-092AC
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CFP
Drawing
5962-9076503Q2A
5962-9076503QEA
5962-9076503QFA
SNJ55LBC172FK
SNJ55LBC172J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
J
20
16
16
20
16
16
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
W
FK
J
LCCC
CDIP
CFP
POST-PLATE N / A for Pkg Type
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
SNJ55LBC172W
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
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