TCAN1042HVDRQ1 概述
具有灵活数据速率的汽车类故障保护 CAN 收发器 | D | 8 | -55 to 125 网络接口
TCAN1042HVDRQ1 规格参数
是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Active | 包装说明: | SOP, |
Reach Compliance Code: | compliant | Factory Lead Time: | 6 weeks |
风险等级: | 1.71 | 数据速率: | 2000 Mbps |
JESD-30 代码: | R-PDSO-G8 | JESD-609代码: | e4 |
长度: | 4.905 mm | 湿度敏感等级: | 1 |
功能数量: | 1 | 端子数量: | 8 |
收发器数量: | 1 | 最高工作温度: | 125 °C |
最低工作温度: | -55 °C | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | SOP | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE | 筛选级别: | AEC-Q100 |
座面最大高度: | 1.75 mm | 最大压摆率: | 110 mA |
标称供电电压: | 5 V | 表面贴装: | YES |
电信集成电路类型: | ETHERNET TRANSCEIVER | 温度等级: | MILITARY |
端子面层: | Nickel/Palladium/Gold (Ni/Pd/Au) | 端子形式: | GULL WING |
端子节距: | 1.27 mm | 端子位置: | DUAL |
宽度: | 3.895 mm | Base Number Matches: | 1 |
TCAN1042HVDRQ1 数据手册
通过下载TCAN1042HVDRQ1数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
TCAN1042G-Q1, TCAN1042GV-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1
ZHCSEL0D –FEBRUARY 2016 –REVISED OCTOBER 2021
TCAN1042-Q1 具有CAN FD 和故障保护功能的汽车类CAN 收发器
1 特性
3 说明
• AEC-Q100(等级1):符合汽车应用要求
这款 CAN 收发器系列符合 ISO1189-2 (2016) 高速
CAN(控制器局域网络)物理层标准。所有器件均设
计用于数据速率高达 2Mbps(兆位每秒)的 CAN FD
网络。器件型号包含“G”后缀的器件旨在实现高达
5Mbps 的数据速率,器件型号包含“V”后缀的器件配
有提供 I/O 电平的辅助电源输入,用于设置输入引脚阈
值和 RXD 输出电平。该系列具备低功耗待机模式及远
程唤醒请求特性。此外,所有器件都提供多种保护特性
来提高器件和网络的耐用性。
• 符合ISO 11898-2:2016 和
ISO 11898-5:2007 物理层标准
• 提供功能安全
– 可帮助进行功能安全系统设计的文档
• “Turbo”CAN:
– 所有器件均支持经典CAN 和2Mbps CAN FD
(灵活数据速率),而“G”选项支持5Mbps
– 具有较短的对称传播延迟时间和快速循环次数,
可增加时序裕量
器件信息
封装(1)
– 在有负载CAN 网络中实现更快的数据速率
• EMC 性能:支持SAE J2962-2 和IEC 62228-3
(最高500kbps)无需共模扼流圈
• I/O 电压范围支持3.3V 和5V MCU
• 未供电时具有理想无源行为
– 总线和逻辑引脚处于高阻态
(无负载)
器件型号
封装尺寸
SOIC (8)
VSON (8)
4.90mm × 3.91mm
3.00mm x 3.00mm
TCAN1042x-Q1
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附
录。
VCC
3
NC or VIO
5
– 在总线和RXD 输出上实现上电/断电无干扰运行
• 保护特性
VCC or VIO
7
6
CANH
CANL
TSD
– IEC ESD 保护高达±15kV
– 总线故障保护:±58V(非H 型号)和±70V(H
型号)
Dominant
time-out
TXD
1
VCC or VIO
– VCC 和VIO
STB
8
Mode Select
(仅限V 型号)电源终端具有欠压保护
– 驱动器显性超时(TXD DTO) - 数据速率低至
10kbps
UVP
VCC or VIO
Logic Output
MUX
4
RXD
– 热关断保护(TSD)
WUP Monitor
• 接收器共模输入电压:±30V
• 典型循环延迟:110ns
Low Power Receiver
2
GND
• 结温范围为–55°C 至150°C
• 采用SOIC (8) 封装和无引线VSON (8) 封装
(3.0mm x 3.0mm),提高了自动光学检测(AOI) 能
力
A. 引脚5 的功能取决于器件;在不含V 后缀的器件上为无连接
(NC) 引脚,在包含V 后缀的器件上为用于I/O 电平转换的VIO
引脚
B. RXD 逻辑输出在不含“V”后缀的器件上驱动为VCC,而在包
2 应用
含“V”后缀的器件上驱动为VIO
。
• 汽车和运输
功能方框图
• 所有器件均支持高负载CAN 网络
• 重型机械ISOBUS 应用–
ISO 11783
• 针对汽车应用的SAE J2284 高速CAN
• GMW3122 双线制CAN 物理层
• 符合SAE J2962、GIFT/ICT、ISO16845 的要求
本文档旨在为方便起见,提供有关TI 产品中文版本的信息,以确认产品的概要。有关适用的官方英文版本的最新信息,请访问
www.ti.com,其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SLLSES9
TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
TCAN1042G-Q1, TCAN1042GV-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1
ZHCSEL0D –FEBRUARY 2016 –REVISED OCTOBER 2021
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Table of Contents
9 Detailed Description......................................................18
9.1 Overview...................................................................18
9.2 Functional Block Diagram.........................................18
9.3 Feature Description...................................................19
9.4 Device Functional Modes..........................................22
10 Application Information Disclaimer...........................26
10.1 Application Information........................................... 26
10.2 Typical Applications................................................ 26
11 Power Supply Recommendations..............................29
12 Device and Documentation Support..........................32
12.1 接收文档更新通知................................................... 32
12.2 支持资源..................................................................32
12.3 Trademarks.............................................................32
12.4 Electrostatic Discharge Caution..............................32
12.5 术语表..................................................................... 32
13 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................4
6 Pin Configurations and Functions.................................5
7 Specifications.................................................................. 6
7.1 Absolute Maximum Ratings........................................ 6
7.2 ESD Ratings............................................................... 6
7.3 ESD Ratings, Specifications....................................... 7
7.4 Recommended Operating Conditions.........................8
7.5 Thermal Information....................................................8
7.6 Power Rating.............................................................. 8
7.7 Electrical Characteristics.............................................9
7.8 Switching Characteristics..........................................12
7.9 Typical Characteristics..............................................13
8 Parameter Measurement Information..........................14
Information.................................................................... 32
4 Revision History
注:以前版本的页码可能与当前版本的页码不同
Changes from Revision C (March 2019) to Revision D (October 2021)
Page
• 添加了特性:EMC 性能:.................................................................................................................................. 1
• 添加了特性“提供功能安全型”........................................................................................................................ 1
• 更改了汽车特性,删除了温度和分类等级...........................................................................................................1
• Deleted "Product Preview" from the DRB pin images in the Pin Configurations and Functions ........................5
• Added footnote to the GND pin in the Pin Functions table ................................................................................ 5
• Changed the ESD Ratingstable, added HBM and CDM classification levels.....................................................6
• Changed the DRB (VSON) values in the Thermal Information table .................................................................8
• Changed the title in 节9.3.7.1 ......................................................................................................................... 21
• Changed the title in 节9.3.7.2 ......................................................................................................................... 21
Changes from Revision B (May 2017) to Revision C (March 2019)
Page
• Changed the ICC MAX value From: 180 mA To: 110 mA in the Electrical Characteristics .................................9
• Changed the tWK_FILTER MAX value From: 1.85 µs To: 1.8 µs in the Switching Characteristics ......................12
Changes from Revision A (May 2016) to Revision B (May 2017)
Page
• 将特性“符合发布的ISO 11898-2:2007 和ISO 11898-2:2003 物理层标准”更改为“符合ISO 11898-2:2016
和ISO 11898-5:2007 物理层标准”....................................................................................................................1
• 删除了特性:符合2015 年12 月17 日发布的ISO 11898-2 物理层更新草案.................................................... 1
• 将“特性”从“所有器件均支持2Mbps CAN FD..”更改为“所有器件均支持经典CAN 和2Mbps CAN FD..”
............................................................................................................................................................................1
• 添加了特性“可采用SOIC(8) 封装和无引线VSON(8) 封装...”....................................................................... 1
• 将应用从“重型机械ISO11783”更改为“重型机械ISOBUS 应用–ISO 11783”........................................ 1
• 更改了应用列表..................................................................................................................................................1
• 将特性从“EMC:SAE J2962、GIFT/ICT、ISO 16845”更改为“符合SAE J2962、GIFT/ICT、ISO16845
的要求”............................................................................................................................................................. 1
• Added new devices to the Device Comparison Table ........................................................................................4
• Added Storage temperature range to the Absolute Maximum Ratings table......................................................6
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
TCAN1042G-Q1, TCAN1042GV-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1
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• Changed the ESD Ratings table to show the D(SOIC) and DRB (VSON) values..............................................6
• Changed Charged Device Model (CDM) From: ±750 To: ±1500 in the ESD Ratings table................................6
• Changed TBD to values for the DRB (VSON) Package in the ESD Ratings table.............................................6
• Added the DRB package to the Thermal Information table ............................................................................... 8
• Added the Power Rating table ...........................................................................................................................8
• Changed VSYM in the Driver Electrical Characteristics table.............................................................................. 9
• Changed VSYM_DC in the Driver Electrical Characteristics table.........................................................................9
• Deleted "VI = 0.4 sin (4E6 πt) + 2.5 V" from the Test Condition of CI in the Receiver Electrical
Characteristics table........................................................................................................................................... 9
• Deleted "VI = 0.4 sin (4E6 πt)" in the Test Condition of CID in the Receiver Electrical Characteristics table....9
• Added "-30 V ≤VCM ≤+30" to the Test Condition of RID and RIN in the Receiver Electrical Characteristics
table....................................................................................................................................................................9
• Changed the tMODE TYP value From: 1 µs To: 9 µS in the Switching Characteristics table............................. 12
• Added Note 2 and Changed 表9-2, BUS OUTPUT colum...............................................................................20
• Changed Standby Mode section ......................................................................................................................23
Changes from Revision * (March 2016) to Revision A (May 2016)
Page
• 添加了特性“符合发布的ISO 11898-2:2007 和ISO 11898-2:2003 物理层标准”............................................1
• 将特性从“符合ISO11898-2 (2016) 标准的要求”更改为“符合2015 年12 月17 日发布的ISO 11898-2 物
理层更新草案”...................................................................................................................................................1
• 更改了应用列表..................................................................................................................................................1
• 向器件信息表中添加了VSON (8) 引脚封装.......................................................................................................1
• Added the VSON (8) pin package to the Pin Configuration and Functions ....................................................... 5
• Added V(Diff) to the Absolute Maximum Ratings table ........................................................................................6
• Changed OTP to TSD in the Functional Block Diagram ..................................................................................18
• Added Note 2 to 表9-1 ....................................................................................................................................20
• Added Note 1 to 表9-2 ....................................................................................................................................20
• Added pin number to the Layout Example image ............................................................................................31
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Product Folder Links: TCAN1042-Q1 TCAN1042V-Q1 TCAN1042H-Q1 TCAN1042HV-Q1 TCAN1042G-Q1
TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1
TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
TCAN1042G-Q1, TCAN1042GV-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1
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5 Device Comparison Table
DEVICE
NUMBER
5-Mbps FLEXIBLE DATA
RATE
3-V LEVEL SHIFTER
INTEGRATED
BUS FAULT PROTECTION
PIN 8 MODE SELECTION
TCAN1042-Q1 (Base)
TCAN1042G-Q1
TCAN1042GV-Q1
TCAN1042V-Q1
±58 V
±58 V
±58 V
±58 V
±70 V
±70 V
±70 V
±70 V
X
X
X
X
Low Power Standby Mode
with Remote Wake
TCAN1042H-Q1
TCAN1042HG-Q1
TCAN1042HGV-Q1
TCAN1042HV-Q1
X
X
X
X
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TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1
TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
TCAN1042G-Q1, TCAN1042GV-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1
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6 Pin Configurations and Functions
STB
TXD
1
2
3
4
8
7
6
5
STB
TXD
GND
VCC
1
2
3
4
8
7
6
5
GND
VCC
CANH
CANL
NC
CANH
CANL
NC
RXD
RXD
图6-2. DRB Package for Base, (H), (G) and (HG)
Devices 8 PIN (VSON) Top View
图6-1. D Package for Base, (H), (G) and (HG)
Devices8 PIN (SOIC) Top View
STB
TXD
GND
VCC
1
2
3
4
8
7
6
5
STB
TXD
1
2
3
4
8
7
6
5
GND
VCC
CANH
CANL
VIO
CANH
CANL
VIO
RXD
RXD
图6-4. DRB Package for (V), (HV), (GV), and (HGV)
Devices 8 PIN (VSON) Top View
图6-3. D Package for (V), (HV), (GV), and (HGV)
Devices 8 PIN (SOIC) Top View
表6-1. Pin Functions
PINS
TYPE
DESCRIPTION
Base, (H), (G),
(HG)
(V), (GV), (HV),
(HGV)
NAME
TXD
GND(1)
VCC
RXD
NC
1
2
3
4
5
1
2
3
4
DIGITAL INPUT
GND
CAN transmit data input (LOW for dominant and HIGH for recessive bus states)
Ground connection
POWER
Transceiver 5-V supply voltage
DIGITAL OUTPUT CAN receive data output (LOW for dominant and HIGH for recessive bus states)
No Connect
—
5
—
POWER
VIO
Transceiver I/O level shifting supply voltage (Devices with "V" suffix only)
Low level CAN bus input/output line
—
6
CANL
CANH
STB
6
BUS I/O
7
7
BUS I/O
High level CAN bus input/output line
Standby Mode control input (active high)
8
8
DIGITAL INPUT
(1) For DRB (VSON) package options, the thermal pad may be connected to GND in order to optimize the thermal characteristics of the
package.
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TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1
TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
TCAN1042G-Q1, TCAN1042GV-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1
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7 Specifications
over operating free-air temperature range (unless otherwise noted) (1) (2)
7.1 Absolute Maximum Ratings
MIN
–0.3
–0.3
MAX
UNIT
V
VCC
VIO
5-V bus supply voltage range
7
7
I/O Level Shifting Voltage Range
Devices with the "V" suffix
V
CAN Bus I/O voltage range
(CANH, CANL)
VBUS
V(Diff)
VBUS
V(Diff)
Devices without the "H" suffix
58
58
70
70
V
V
V
V
–58
–58
–70
–70
Max differential voltage between
CANH and CANL
Devices without the “H”suffix
Devices with the "H" suffix
CAN Bus I/O voltage range
(CANH, CANL)
Max differential voltage between
CANH and CANL
Devices with the “H”suffix
V(Logic_Input)
V(Logic_Output)
IO(RXD)
Logic input terminal voltage range (TXD, STB)
Logic output terminal voltage range (RXD)
V
V
–0.3
–0.3
–8
7 and VI ≤VIO + 0.3
7 and VI ≤VIO + 0.3
RXD (Receiver) output current
8
mA
°C
°C
TJ
Virtual junction temperature range (see Thermal Information)
Storage temperature range (see Thermal Information)
150
150
–55
–65
TSTG
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) All voltage values, except differential I/O bus voltages, are with respect to ground terminal.
7.2 ESD Ratings
VALUE
UNIT
HBM classification level 3A for
all pins
±6000
V
Human-body model (HBM), per AEC Q100-002(1)
HBM classification level 3B for
global pins CANH and CANL
with respect to GND
±16000
V
VESD
Electrostatic discharge
Charged-device model (CDM), per AEC Q100-011
CDM classification level C6 for all pins
±1500
±200
V
V
Machine Model (MM), in accordance to JEDEC Standard 22, Test Method A115
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
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TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1
TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
TCAN1042G-Q1, TCAN1042GV-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1
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7.3 ESD Ratings, Specifications
TEST CONDITIONS
VALUE
UNIT
D (SOIC) Package
SAE J2962-2 per ISO 10605:
Powered Air Discharge
±15000
±8000
±15000
±8000
±4000
CAN bus terminals (CANH,
CANL) to GND
System Level Electro-Static Discharge (ESD)
V
SAE J2962-2 per ISO 10605:
Powered Contact Discharge
IEC 61000-4-2: Unpowered
Contact Discharge
CAN bus terminals (CANH,
CANL) to GND
System Level Electro-Static Discharge (ESD)
System Level Electrical fast transient (EFT)
V
V
IEC 61000-4-2: Powered on
Contact Discharge
CAN bus terminals (CANH,
CANL) to GND
IEC 61000-4-4: Criteria A
Pulse 1
–100
+75
Pulse 2
ISO7637-2 Transients according to GIFT - ICT CAN EMC test
specification(1)
CAN bus terminals (CANH,
CANL) to GND
Pulse 3a
–150
+100
V
Pulse 3b
Direct Coupling Capacitor
CAN bus terminals (CANH, "Slow Transient Pulse" with
ISO7637-3 Transients
±85
CANL) to GND
100 nF coupling capacitor -
Powered
DRB (VSON) Package
SAE J2962-2 per ISO 10605:
Powered Air Discharge
±15000
±8000
±14000
±8000
±4000
CAN bus terminals (CANH,
CANL) to GND
System Level Electro-Static Discharge (ESD)
V
SAE J2962-2 per ISO 10605:
Powered Contact Discharge
IEC 61000-4-2: Unpowered
Contact Discharge
CAN bus terminals (CANH,
CANL) to GND
System Level Electro-Static Discharge (ESD)
System Level Electrical fast transient (EFT)
V
V
IEC 61000-4-2: Powered on
Contact Discharge
CAN bus terminals (CANH,
CANL) to GND
IEC 61000-4-4: Criteria A
Pulse 1
–100
+75
Pulse 2
ISO7637-2 Transients according to GIFT - ICT CAN EMC test
specification(1)
CAN bus terminals (CANH,
CANL) to GND
Pulse 3a
–150
+100
V
Pulse 3b
Direct Coupling Capacitor
CAN bus terminals (CANH, "Slow Transient Pulse" with
ISO7637-3 Transients
±85
CANL) to GND
100 nF coupling capacitor -
Powered
(1) ISO7637 is a system level transient test. Results given here are specific to the GIFT-ICT CAN EMC Test specification conditions.
Different system level configurations may lead to different results.
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
TCAN1042G-Q1, TCAN1042GV-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1
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MAX UNIT
7.4 Recommended Operating Conditions
MIN
4.5
3
VCC
5-V Bus Supply Voltage Range
5.5
V
5.5
VIO
I/O Level-Shifting Voltage Range
RXD terminal HIGH level output current
RXD terminal LOW level output current
IOH(RXD)
IOL(RXD)
–2
mA
2
7.5 Thermal Information
TCAN1042-Q1
Thermal Metric(1)
TEST CONDITIONS
D (SOIC)
8 Pins
105.8
DRB (VSON)
8 Pins
48.3
UNIT
RθJA
RθJB
Junction-to-air thermal resistance
High-K thermal resistance(2)
°C/W
°C/W
Junction-to-board thermal resistance(3)
46.8
17.2
Junction-to-case (top) thermal
resistance(4)
RθJC(TOP)
ΨJT
48.3
8.7
37.6
1.8
°C/W
°C/W
°C/W
Junction-to-top characterization
parameter(5)
Junction-to-board characterization
parameter(6)
46.2
17.1
ΨJB
TTSD
Thermal shutdown temperature
Thermal shutdown hysteresis
170
5
170
5
°C
°C
TTSD_HYS
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board,
as specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(4) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(5) The junction-to-top characterization parameter, ΨJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ΨJB estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
7.6 Power Rating
PARAMETER
TEST CONDITIONS
POWER DISSIPATION
UNIT
VCC = 5 V, VIO = 5 V (if applicable), TJ = 27°C, RL = 60 Ω, S at 0
V, Input to TXD at 250 kHz, CL_RXD = 15 pF. Typical CAN
operating conditions at 500 kbps with 25% transmission
(dominant) rate.
52
mW
PD
Average power dissipation
VCC = 5.5 V, VIO = 5.5 V (if applicable), TJ = 150°C, RL = 50 Ω, S
at 0 V, Input to TXD at 500 kHz, CL_RXD = 15 pF. Typical high
load CAN operating conditions at 1 Mbps with 50% transmission
(dominant) rate and loaded network.
124
mW
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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7.7 Electrical Characteristics
Over recommended operating conditions with TA = –55°C to 125°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
MAX UNIT
Supply Characteristics
See 图8-1, TXD = 0 V, RL = 60 Ω,
CL = open, RCM = open, STB = 0 V, Typical
Bus Load
40
45
70
Normal mode
(dominant)
See 图8-1, TXD = 0 V, RL = 50 Ω,
CL = open, RCM = open, STB = 0 V,
High Bus Load
80
mA
Normal mode (dominant
–with bus fault)
See 图8-1, TXD = 0 V, STB = 0 V, CANH =
-12 V, RL = open, CL = open, RCM = open
110
2.5
See 图8-1, TXD = VCC or VIO, RL = 50 Ω, CL
= open, RCM = open,
STB = 0 V
Normal mode
(recessive)
ICC
5-V supply current
1.5
0.5
Devices with the "V" suffix (I/O level-
shifting), VCC not needed in Standby mode,
See 图8-1,
5
TXD = VIO, RL = 50 Ω, CL = open,
RCM = open, STB = VIO
Standby mode
Devices without the "V" suffix (5-V only),
µA
22
See 图8-1, TXD = VCC, RL = 50 Ω, CL
=
open, RCM = open, STB = VCC
Normal mode
Standby mode
RXD floating, TXD = STB = 0 or 5.5 V
90
12
300
17
IIO
I/O supply current
RXD floating, TXD = STB = VIO
VCC = 0 or 5.5 V
,
Rising undervoltage detection on VCC for
protected mode
4.2
4.4
V
UVVCC
Falling undervoltage detection on VCC for
protected mode
All devices
3.8
1.3
4.0
4.25
VHYS(UVVCC)
UVVIO
Hysteresis voltage on UVVCC
200
mV
Undervoltage detection on VIO for protected
mode
2.75
V
Devices with the "V" suffix (I/O level-shifting)
VHYS(UVVIO)
Hysteresis voltage on UVVIO for protected mode
80
mV
STB Terminal (Mode Select Input)
Devices with the "V" suffix (I/O level-shifting)
Devices without the "V" suffix (5-V only)
Devices with the "V" suffix (I/O level-shifting)
Devices without the "V" suffix (5-V only)
STB = VCC = VIO = 5.5 V
0.7 x VIO
2
VIH
VIL
High-level input voltage
Low-level input voltage
V
0.3 x VIO
0.8
2
IIH
High-level input leakage current
Low-level input leakage current
Unpowered leakage current
-2
–20
-1
IIL
STB = 0V, VCC = VIO = 5.5 V
0
0
-2
1
µA
Ilkg(OFF)
STB = 5.5 V, VCC = VIO = 0 V
TXD Terminal (CAN Transmit Data Input)
Devices with the "V" suffix (I/O level-shifting)
Devices without the "V" suffix (5-V only)
Devices with the "V" suffix (I/O level-shifting)
Devices without the "V" suffix (5-V only)
TXD = VCC = VIO = 5.5 V
0.7 x VIO
2
VIH
VIL
High-level input voltage
Low-level input voltage
V
0.3 x VIO
0.8
1
IIH
High-level input leakage current
Low-level input leakage current
Unpowered leakage current
Input capacitance
0
-25
0
–2.5
–100
–1
IIL
TXD = 0 V, VCC = VIO = 5.5 V
µA
pF
–7
Ilkg(OFF)
CI
TXD = 5.5 V, VCC = VIO = 0 V
1
VIN = 0.4 x sin(2 x πx 2 x 106 x t) + 2.5 V
5
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MAX UNIT
7.7 Electrical Characteristics (continued)
Over recommended operating conditions with TA = –55°C to 125°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
RXD Terminal (Can Receive Data Output)
Devices with the "V" suffix (I/O level-
shifting), See 图8-2,
0.8 × VIO
IO = –2 mA.
VOH
High-level output voltage
Devices without the "V" suffix
(5V only), See 图8-2,
IO = –2 mA.
4
4.6
V
Devices with the "V" suffix (I/O level-
shifting), See 图8-2, IO = +2 mA.
0.2 x VIO
VOL
Low-level output voltage
Devices without the "V" suffix (5-V only),
See 图8-2,
0.2
0
0.4
IO = +2 mA.
Ilkg(OFF)
Unpowered leakage current
RXD = 5.5 V, VCC = 0 V, VIO = 0 V
1
µA
–1
Driver Electrical Characteristics
CANH
CANL
2.75
0.5
4.5
See 图8-1 and 图9-3, TXD = 0 V, STB = 0
V, 50 Ω ≤RL ≤65 Ω,
CL = open, RCM = open
Bus output voltage
(dominant)
VO(DOM)
2.25
See 图8-1 and 图9-3, TXD = VCC or VIO
VIO = VCC, STB = 0 V ,
RL = open (no load), RCM = open
,
Bus output voltage
(recessive)
VO(REC)
CANH and CANL
2
0.5 × VCC
3
CANH
-0.1
-0.1
-0.2
0
0
0
0.1
0.1
0.2
Bus output voltage
VO(STB)
See 图8-1 and 图9-3, STB = VIO, RL
open (no load), RCM = open
=
CANL
(Standby mode)
V
CANH - CANL
See 图8-1 and 图9-3, TXD = 0 V, STB = 0
V, 45 Ω ≤RL < 50 Ω,
1.4
1.5
3
3
CL = open, RCM = open
Differential output
VOD(DOM)
See 图8-1 and 图9-3, TXD = 0 V, STB = 0
V, 50 Ω ≤RL ≤65 Ω,
CL = open, RCM = open
CANH - CANL
voltage (dominant)
See 图8-1 and 图9-3, TXD = 0 V, STB = 0
V, RL = 2240 Ω, CL = open, RCM = open
1.5
5
See 图8-1 and 图9-3, TXD = VCC, STB = 0
V, RL = 60 Ω, CL = open, RCM = open
12
–120
Differential output
VOD(REC)
CANH - CANL
mV
See 图8-1 and 图9-3, TXD = VCC, STB = 0
voltage (recessive)
50
V, RL = open (no load), CL = open, RCM
open
=
–50
See 图8-1 and 图10-2, STB at 0 V, Rterm
60 Ω, Csplit = 4.7 nF, CL = open,
=
Output symmetry (dominant or recessive)
( VO(CANH) + VO(CANL)) / VCC
VSYM
0.9
–0.4
–100
1.1
0.4
V/V
V
RCM = open, TXD = 250 kHz, 1 MHz
DC Output symmetry (dominant or recessive)
See 图8-1 and 图9-3, STB = 0 V,
RL = 60 Ω, CL = open, RCM = open
VSYM_DC
(VCC –VO(CANH) –VO(CANL)
)
See 图9-3 and 图8-7, STB at 0 V, VCANH
-5 V to 40 V, CANL = open,
TXD = 0 V
=
=
Short-circuit steady-state output current,
dominant, Normal mode
IOS(SS_DOM)
mA
mA
See 图9-3 and 图8-7, STB at 0 V, VCANL
-5 V to 40 V, CANH = open,
TXD = 0 V
100
5
See 图9-3 and 图8-7, STB at 0 V, –27 V
≤VBUS ≤32 V,
Where VBUS = CANH = CANL, TXD = VCC
Short-circuit steady-state output current,
recessive, Normal mode
IOS(SS_REC)
–5
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7.7 Electrical Characteristics (continued)
Over recommended operating conditions with TA = –55°C to 125°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
MAX UNIT
Receiver Electrical Characteristics
VCM
VIT+
Common mode range, Normal mode
-30
+30
900
V
See 图8-2 and 表8-1, STB = 0 V
Positive-going input threshold voltage, Normal
mode
See 图8-2, 表9-5 and 表8-1,
STB = 0 V, -20 V ≤VCM ≤+20 V
Negative-going input threshold voltage, Normal
mode
VIT–
VIT+
VIT–
VHYS
500
400
Positive-going input threshold voltage, Normal
mode
1000
mV
See 图8-2, 表9-5 and 表8-1,
STB = 0 V, -30 V ≤VCM ≤+30 V
Negative-going input threshold voltage, Normal
mode
See 图8-2, 表9-5 and 表8-1,
STB = 0 V
Hysteresis voltage (VIT+ - VIT–), Normal mode
120
Devices with the "V" suffix (I/O level-
shifting), See 图8-2, 表9-5 and 表8-1, STB
= VIO, 4.5 V ≤VIO ≤5.5 V
-12
-2
12
Devices with the "V" suffix (I/O level-
shifting), See 图8-2, 表9-5 and 表8-1, STB
= VIO, 3.0 V ≤VIO ≤4.5 V
VCM
Common mode range, Standby mode
Input threshold voltage, Standby mode
V
+7
12
Devices without the "V" suffix (5V only), See
图8-2, 表9-5 and 表8-1, STB = VCC
-12
VIT(STANDBY)
STB = VCC or VIO
400
1150
4.8
30
mV
µA
ILKG(IOFF)
CI
Power-off (unpowered) bus input leakage current CANH = CANL = 5 V, VCC = VIO = 0 V
Input capacitance to ground (CANH or CANL)
Differential input capacitance (CANH to CANL)
Differential input resistance
TXD = VCC, VIO = VCC
TXD = VCC, VIO = VCC
24
12
pF
CID
15
RID
30
15
80
TXD = VCC = VIO = 5 V, STB = 0 V,
-30 V ≤VCM ≤+30 V
kΩ
RIN
Input resistance (CANH or CANL)
40
Input resistance matching:
[1 –RIN(CANH) / RIN(CANL)] × 100%
RIN(M)
VCANH = VCANL = 5 V
+2%
–2%
(1) All typical values are at 25°C and supply voltages of VCC = 5 V and VIO = 5 V (if applicable), RL = 60 Ω.
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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7.8 Switching Characteristics
Over recommended operating conditions with TA = -55°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP(1) MAX UNIT
Device Switching Characteristics
Total loop delay, driver input (TXD) to receiver
output (RXD), recessive to dominant
tPROP(LOOP1)
tPROP(LOOP2)
100
110
9
160
175
See 图8-4, STB = 0 V,
RL = 60 Ω,
ns
Total loop delay, driver input (TXD) to receiver
output (RXD), dominant to recessive
CL = 100 pF, CL(RXD) = 15 pF
Mode change time, from Normal to Standby or
from Standby to Normal
tMODE
45 µs
1.8 µs
See 图8-3
tWK_FILTER
Filter time for valid wake up pattern
0.5
Driver Switching Characteristics
Propagation delay time, high TXD to driver
tpHR
75
55
recessive (dominant to recessive)
Propagation delay time, low TXD to driver
dominant (recessive to dominant)
See 图8-1, STB = 0 V,
RL = 60 Ω,
CL = 100 pF, RCM = open
tpLD
ns
tsk(p)
tR
Pulse skew (|tpHR - tpLD|)
20
45
45
Differential output signal rise time
Differential output signal fall time
tF
See 图8-6, STB = 0 V,
RL = 60 Ω, CL = open
tTXD_DTO
Dominant timeout
1.2
3.8 ms
Receiver Switching Characteristics
Propagation delay time, bus recessive input to
tpRH
65
50
ns
ns
high output (Dominant to Recessive)
Propagation delay time, bus dominant input to
low output (Recessive to Dominant)
See 图8-2, STB = 0 V,
CL(RXD) = 15 pF
tpDL
tR
tF
RXD Output signal rise time
RXD Output signal fall time
10
10
ns
ns
FD Timing Parameters
Bit time on CAN bus output pins with tBIT(TXD)
=
=
435
155
400
120
-65
530
210
500 ns, all devices
tBIT(BUS)
tBIT(RXD)
ΔtREC
Bit time on CAN bus output pins with tBIT(TXD)
200 ns, G device variants only
Bit time on RXD output pins with tBIT(TXD)
500 ns, all devices
=
See 图8-5 , STB = 0 V,
RL = 60 Ω, CL = 100 pF,
CL(RXD) = 15 pF,
550
ns
Bit time on RXD output pins with tBIT(TXD)
200 ns, G device variants only
=
220
ΔtREC = tBIT(RXD) - tBIT(BUS)
Receiver timing symmetry with tBIT(TXD) = 500
ns, all devices
40
15
Receiver timing symmetry with tBIT(TXD) = 200
ns, G device variants only
-45
(1) All typical values are at 25°C and supply voltages of VCC = 5 V and VIO = 5 V (if applicable), RL = 60 Ω
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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7.9 Typical Characteristics
3
2.5
2
3
2.5
2
1.5
1
1.5
1
0.5
0.5
0
0
4.5 4.6 4.7 4.8 4.9
5
VCC (V)
5.1 5.2 5.3 5.4 5.5
-55
-35
-15
5
25 45
Temperature (°C)
65
85
105 125
D002
D001
VIO = 5 V
STB = 0 V
RCM = Open
VCC = 5 V
CL = Open
VIO = 3.3 V
RL = 60 Ω
RL = 60 Ω
CL = Open
Temp = 25°C
RCM = Open
STB = 0 V
图7-2. VOD(D) over VCC
图7-1. VOD(D) over Temperature
1.48
150
125
100
75
1.47
1.46
1.45
1.44
1.43
1.42
1.41
50
25
0
-55
-55
-35
-15
5
25 45
Temperature (°C)
65
85
105 125
-35
-15
5
25 45
Temperature (°C)
65
85
105 125
D003
D004
VCC = 5 V
CL = Open
VIO = 3.3 V
RL = 60 Ω
VCC = 5 V
VIO = 3.3 V
RL = 60 Ω
RCM = Open
STB = 0 V
CL = 100 pF
CL_RXD = 15 pF
STB = 0 V
图7-3. ICC Recessive over Temperature
图7-4. Total Loop Delay over Temperature
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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8 Parameter Measurement Information
RCM
CANH
VCC
50%
tpLD
0.9V
50%
tpHR
TXD
TXD
0V
RL
CL
VOD
VCM
VO(CANH)
90%
10%
CANL
RCM
VO(CANL)
VOD
0.5V
tR
tF
Copyright © 2016, Texas Instruments Incorporated
图8-1. Driver Test Circuit and Measurement
CANH
1.5V
0.9V
VID
IO
RXD
0.5V
0V
VID
tpDL
tpRH
VOH
VO
CL_RXD
CANL
90%
VO(RXD)
50%
10%
VOL
tF
tR
Copyright © 2016, Texas Instruments Incorporated
图8-2. Receiver Test Circuit and Measurement
表8-1. Receiver Differential Input Voltage Threshold Test
INPUT (See Receiver Test Circuit and Measurement
OUTPUT
VCANH
VCANL
-30.5 V
29.5 V
|VID|
1000 mV
1000 mV
900 mV
900 mV
500 mV
500 mV
400 mV
400 mV
X
RXD
-29.5 V
30.5 V
L
L
VOL
-19.55 V
20.45 V
-19.75 V
20.25 V
-29.8 V
30.2 V
-20.45 V
19.55 V
-20.25 V
19.75 V
-30.2 V
29.8 V
L
L
H
H
H
H
H
VOH
Open
Open
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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CANH
VIH
TXD
0V
VI
RL
CL
STB
50%
CANL
STB
0V
tMODE
RXD
VOH
VO
CL_RXD
RXD
50%
VOL
Copyright © 2016, Texas Instruments Incorporated
图8-3. tMODE Test Circuit and Measurement
CANH
VCC
TXD
STB
VI
CL
RL
50%
TXD
CANL
0V
0V
tPROP(LOOP2)
tPROP(LOOP1)
RXD
VOH
VO
CL_RXD
50%
RXD
VOL
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图8-4. TPROP(LOOP) Test Circuit and Measurement
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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VI
70%
TXD
CANH
30%
30%
0V
900mV
VOH
TXD
VI
RL
CL
5 x tBIT
tBIT(TXD)
CANL
tBIT(BUS)
STB
0V
VDIFF
RXD
500mV
VO
CL_RXD
70%
RXD
30%
VOL
tBIT(RXD)
图8-5. CAN FD Timing Parameter Measurement
CANH
RL
VIH
TXD
TXD
0V
CL
VOD
VOD(D)
CANL
0.9V
VOD
0.5V
0V
tTXD_DTO
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图8-6. TXD Dominant Timeout Test Circuit and Measurement
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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200 ꢀs
IOS
CANH
CANL
TXD
VBUS
IOS
VBUS
VBUS
0V
or
0V
VBUS
VBUS
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图8-7. Driver Short Circuit Current Test and Measurement
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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9 Detailed Description
9.1 Overview
These CAN transceivers meet the ISO11898-2 (2016) High Speed CAN (Controller Area Network) physical layer
standard. They are designed for data rates in excess of 1 Mbps for CAN FD and enhanced timing margin /
higher data rates in long and highly-loaded networks. These devices provide many protection features to
enhance device and CAN robustness.
9.2 Functional Block Diagram
VCC
3
NC or VIO
5
VCC or VIO
7
6
CANH
CANL
TSD
Dominant
time-out
TXD
1
VCC or VIO
STB
8
Mode Select
UVP
VCC or VIO
Logic Output
MUX
4
RXD
WUP Monitor
Low Power Receiver
2
GND
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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9.3 Feature Description
9.3.1 TXD Dominant Timeout (DTO)
During normal mode (the only mode where the CAN driver is active), the TXD DTO circuit prevents the
transceiver from blocking network communication in the event of a hardware or software failure where TXD is
held dominant longer than the timeout period tTXD_DTO. The DTO circuit timer starts on a falling edge on TXD.
The DTO circuit disables the CAN bus driver if no rising edge is seen before the timeout period expires. This
frees the bus for communication between other nodes on the network. The CAN driver is re-activated when a
recessive signal is seen on the TXD terminal, thus clearing the TXD DTO condition. The receiver and RXD
terminal still reflect activity on the CAN bus, and the bus terminals are biased to the recessive level during a TXD
dominant timeout.
TXD fault stuck dominant: example PCB
failure or bad software
Fault is repaired & transmission
capability restored
TXD
(driver)
tTXD_DTO
Driver disabled freeing bus for other nodes
Bus would be —stuck dominant“ blocking communication for the
whole network but TXD DTO prevents this and frees the bus for
Normal CAN
communication
communication after the time tTXD_DTO
.
CAN
Bus
Signal
tTXD_DTO
Communication from
other bus node(s)
Communication from
repaired node
RXD
(receiver)
Communication from
other bus node(s)
Communication from
repaired local node
Communication from
local node
图9-1. Example Timing Diagram for TXD DTO
Note
The minimum dominant TXD time allowed by the TXD DTO circuit limits the minimum possible
transmitted data rate of the device. The CAN protocol allows a maximum of eleven successive
dominant bits (on TXD) for the worst case, where five successive dominant bits are followed
immediately by an error frame. This, along with the tTXD_DTO minimum, limits the minimum data rate.
Calculate the minimum transmitted data rate by: Minimum Data Rate = 11 / tTXD_DTO
.
9.3.2 Thermal Shutdown (TSD)
If the junction temperature of the device exceeds the thermal shutdown threshold (TTSD), the device turns off the
CAN driver circuits thus blocking the TXD-to-bus transmission path. The CAN bus terminals are biased to the
recessive level during a thermal shutdown, and the receiver-to-RXD path remains operational. The shutdown
condition is cleared when the junction temperature drops at least the thermal shutdown hysteresis temperature
(TTSD_HYS) below the thermal shutdown temperature (TTSD) of the device.
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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9.3.3 Undervoltage Lockout
The supply terminals have undervoltage detection that places the device in protected mode. This protects the
bus during an undervoltage event on either the VCC or VIO supply terminals.
表9-1. Undervoltage Lockout 5 V Only Devices (Devices without the "V" Suffix)
VCC
DEVICE STATE(1)
BUS OUTPUT
RXD
> UVVCC
< UVVCC
Normal
Per TXD
Mirrors Bus(2)
Protected
High Impedance
High Impedance
(1) See the VIT section of the Electrical Characteristics.
(2) Mirrors bus state: low if CAN bus is dominant, high if CAN bus is recessive.
表9-2. Undervoltage Lockout I/O Level Shifting Devices (Devices with the "V" Suffix)
VCC
VIO
DEVICE STATE
BUS OUTPUT
RXD
> UVVCC
> UVVIO
Normal
Per TXD
Mirrors Bus(1)
STB = High: Standby Mode
Recessive
Bus Wake RXD Request(2)
< UVVCC
> UVVIO
STB =Low: Protected
Mode
High Impedance
High (Recessive)
> UVVCC
< UVVCC
< UVVIO
< UVVIO
Protected
Protected
High Impedance
High Impedance
High Impedance
High Impedance
(1) Mirrors bus state: low if CAN bus is dominant, high if CAN bus is recessive.
(2) Refer to 节9.4.3.1
Note
After an undervoltage condition is cleared and the supplies have returned to valid levels, the device
typically resumes normal operation within 50 µs.
9.3.4 Unpowered Device
The device is designed to be 'ideal passive' or 'no load' to the CAN bus if it is unpowered. The bus terminals
(CANH, CANL) have extremely low leakage currents when the device is unpowered to avoid loading down the
bus. This is critical if some nodes of the network are unpowered while the rest of the of network remains in
operation. The logic terminals also have extremely low leakage currents when the device is unpowered to avoid
loading down other circuits that may remain powered.
9.3.5 Floating Terminals
These devices have internal pull ups on critical terminals to place the device into known states if the terminals
float. The TXD terminal is pulled up to VCC or VIO to force a recessive input level if the terminal floats. The STB
terminal is also pulled up to force the device into low power Standby mode if the terminal floats.
9.3.6 CAN Bus Short Circuit Current Limiting
The device has two protection features that limit the short circuit current when a CAN bus line is short-circuit fault
condition: driver current limiting (both dominant and recessive states) and TXD dominant state time out to
prevent permanent higher short circuit current of the dominant state during a system fault. During CAN
communication the bus switches between dominant and recessive states, thus the short circuit current may be
viewed either as the instantaneous current during each bus state or as an average current of the two states. For
system current (power supply) and power considerations in the termination resistors and common-mode choke
ratings, use the average short circuit current. Determine the ratio of dominant and recessive bits by the data in
the CAN frame plus the following factors of the protocol and PHY that force either recessive or dominant at
certain times:
• Control fields with set bits
• Bit stuffing
• Interframe space
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• TXD dominant time out (fault case limiting)
These ensure a minimum recessive amount of time on the bus even if the data field contains a high percentage
of dominant bits. The short circuit current of the bus depends on the ratio of recessive to dominant bits and their
respective short circuit currents. The average short circuit current may be calculated with the following formula:
IOS(AVG) = %Transmit × [(%REC_Bits × IOS(SS)_REC) + (%DOM_Bits × IOS(SS)_DOM)] + [%Receive × IOS(SS)_REC
]
(1)
Where:
• IOS(AVG) is the average short circuit current
• %Transmit is the percentage the node is transmitting CAN messages
• %Receive is the percentage the node is receiving CAN messages
• %REC_Bits is the percentage of recessive bits in the transmitted CAN messages
• %DOM_Bits is the percentage of dominant bits in the transmitted CAN messages
• IOS(SS)_REC is the recessive steady state short circuit current
• IOS(SS)_DOM is the dominant steady state short circuit current
Note
Consider the short circuit current and possible fault cases of the network when sizing the power
ratings of the termination resistance and other network components.
9.3.7 Digital Inputs and Outputs
9.3.7.1 Devices with VCC Only (Devices without the "V" Suffix):
The 5-V VCC only devices are supplied by a single 5-V rail. The digital inputs have TTL input thresholds and are
therefore 5 V and 3.3 V compatible. The RXD outputs on these devices are driven to the VCC rail for logic high
output. Additionally, the TXD and STB pins are internally pulled up to VCC. The internal bias of the mode pins
may only place the device into a known state if the terminals float, they may not be adequate for system-level
biasing during transients or noisy environments.
Note
TXD pull up strength and CAN bit timing require special consideration when these devices are used
with CAN controllers with an open-drain TXD output. An adequate external pull up resistor must be
used to ensure that the CAN controller output of the microcontroller maintains adequate bit timing to
the TXD input.
9.3.7.2 Devices with VIO I/O Level Shifting (Devices with "V" Suffix):
These devices use a 5 V VCC power supply for the CAN driver and high speed receiver blocks. These
transceivers have a second power supply for I/O level-shifting (VIO). This supply is used to set the CMOS input
thresholds of the TXD and pins and the RXD high level output voltage. Additionally, the internal pull ups on TXD
and STB are pulled up to VIO.
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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9.4 Device Functional Modes
The device has two main operating modes: Normal mode and Standby mode. Operating mode selection is made
via the STB input terminal.
表9-3. Operating Modes
STB Terminal
LOW
MODE
DRIVER
RECEIVER
RXD Terminal
Normal Mode
Standby Mode
Enabled (ON)
Disabled (OFF)
Enabled (ON)
Mirrors Bus State(1)
HIGH
Disabled (OFF) (Low
Power Bus Monitor is
Active)
High (Unless valid WUP
has been received)
(1) Mirrors bus state: low if CAN bus is dominant, high if CAN bus is recessive.
9.4.1 CAN Bus States
The CAN bus has two states during powered operation of the device: dominant and recessive. A dominant bus
state is when the bus is driven differentially, corresponding to a logic low on the TXD and RXD terminal. A
recessive bus state is when the bus is biased to VCC / 2 via the high-resistance internal input resistors RIN of the
receiver, corresponding to a logic high on the TXD and RXD terminals.
图9-2. Bus States (Physical Bit Representation)
图9-3. Bias Unit (Recessive Common Mode Bias) and Receiver
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9.4.2 Normal Mode
Select the Normal mode of device operation by setting STB terminal low. The CAN driver and receiver are fully
operational and CAN communication is bi-directional. The driver translates a digital input on TXD to a differential
output on CANH and CANL. The receiver translates the differential signal from CANH and CANL to a digital
output on RXD.
9.4.3 Standby Mode
Activate low power Standby mode by setting STB terminal high. In this mode the bus transmitter will not send
data nor will the normal mode receiver accept data as the bus lines are biased to ground minimizing the system
supply current. Only the low power receiver will be actively monitoring the bus for activity. RXD indicates a valid
wake up event after a wake-up pattern (WUP) has been detected on the Bus. The low power receiver is powered
using only the VIO pin. This allows VCC to be removed reducing power consumption further.
The bus lines are biased to ground in Standby mode to minimize the required system supply current. The low
power receiver is supplied by VIO and is capable of detecting CAN bus activity even if VIO is the only supply
voltage available to the transceiver.
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9.4.3.1 Remote Wake Request via Wake Up Pattern (WUP) in Standby Mode
The family offers a remote wake request feature that is used to indicate to the host microcontroller that the bus is
active and the node should return to normal operation.
These devices use the multiple filtered dominant wake up pattern (WUP) from the ISO11898-2 (2016) to qualify
bus activity. Once a valid WUP has been received the wake request will be indicated to the microcontroller by a
falling edge and low corresponding to a "filtered" dominant on the RXD output terminal.
The WUP consists of a filtered dominant pulse, followed by a filtered recessive pulse, and finally by a second
filtered dominant pulse. These filtered dominant, recessive, dominant pulses do not need to occur in immediate
succession. There is no timeout that will occur between filtered bits of the WUP. Once a full WUP has been
detected the device will continue to drive the RXD output low every time an additional filtered dominant signal is
received from the bus.
For a dominant or recessive signal to be considered "filtered", the bus must continually remain in that state for
more than tWK_FILTER. Due to variability in the tWK_FILTER, the following three scenarios can exist:
1. Bus signals that last less than tWK_FILTER(MIN) will never be detected as part of a valid WUP
2. Bus signals that last more than tWK_FILTER(MIN) but less than tWK_FILTER(MAX) may be detected as part of a
valid WUP
3. Bus signals that last more than tWK_FILTER(MAX) will always be detected as part of a valid WUP
Once the first filtered dominant signal is received, the device is now waiting on a filtered recessive signal, other
bus traffic will not reset the bus monitor. Once the filtered recessive signal is received, the monitor is now waiting
on a second filtered dominant signal, and again other bus traffic will not reset the monitor. After reception of the
full WUP, the device will transition to driving the RXD output pin low for the remainder of any dominant signal that
remains on the bus for longer than tWK_FILTER
.
Bus Wake via
RXD Request
Wake Up Pattern (WUP)
Filtered
Dominant
Filtered
Dominant
Filtered
Recessive
Waiting for
Filtered
Dominant
Waiting for
Filtered
Recessive
Bus
Bus VDiff
RXD
≥ tWK_FILTER
≥ tWK_FILTER
≥ tWK_FILTER
≥ tWK_FILTER
Filtered Dominant RXD Output
Bus Wake Via
RXD Requests
图9-4. Wake Up Pattern (WUP)
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9.4.4 Driver and Receiver Function Tables
表9-4. Driver Function Table
INPUTS
OUTPUTS
DEVICE
DRIVEN BUS STATE
STB (1)
L
TXD(1) (2)
CANH(1)
CANL(1)
L
H or Open
X
H
Z
Z
L
Z
Z
Dominant
Recessive
Recessive
All Devices
H or Open
(1) H = high level, L = low level, X = irrelevant, Z = common mode (recessive) bias to VCC / 2. See CAN Bus States for bus state and
common mode bias information.
(2) Devices have an internal pull up to VCC or VIO on TXD terminal. If the TXD terminal is open, the terminal is pulled high and the
transmitter remain in recessive (non-driven) state.
表9-5. Receiver Function Table
CAN DIFFERENTIAL INPUTS
DEVICE MODE
BUS STATE
RXD TERMINAL(1)
VID = VCANH –VCANL
ID ≥VIT+(MAX)
VIT-(MIN) < VID < VIT+(MAX)
ID ≤VIT-(MIN)
Open (VID ≈0 V)
Dominant
?
L(2)
V
(2)
?
Normal
Recessive
Open
H(2)
V
H
(1) H = high level, L = low level, ? = indeterminate.
(2) See Receiver Electrical Characteristics section for input thresholds.
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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10 Application Information Disclaimer
Note
以下应用部分中的信息不属于TI 器件规格的范围,TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计,以确保系统功能。
10.1 Application Information
These CAN transceivers are typically used in applications with a host microprocessor or FPGA that includes the
data link layer portion of the CAN protocol. Below are typical application configurations for both 5 V and 3.3 V
microprocessor applications. The bus termination is shown for illustrative purposes.
10.2 Typical Applications
Node n
(with termination)
Node 1
Node 2
Node 3
MCU or DSP
MCU or DSP
MCU or DSP
MCU or DSP
CAN
Controller
CAN
Controller
CAN
Controller
CAN
Controller
CAN
Transceiver
CAN
Transceiver
CAN
Transceiver
CAN
Transceiver
RTERM
RTERM
图10-1. Typical CAN Bus Application
10.2.1 Design Requirements
10.2.1.1 Bus Loading, Length and Number of Nodes
The ISO 11898-2 Standard specifies a maximum bus length of 40 m and maximum stub length of 0.3 m.
However, with careful design, users can have longer cables, longer stub lengths, and many more nodes to a
bus. A large number of nodes requires transceivers with high input impedance such as the TCAN1042 family of
transceivers.
Many CAN organizations and standards have scaled the use of CAN for applications outside the original ISO
11898-2. They have made system-level trade-offs for data rate, cable length, and parasitic loading of the bus.
Examples of some of these specifications are ARINC825, CANopen, DeviceNet and NMEA2000.
The TCAN1042 family is specified to meet the 1.5 V requirement with a 50Ω load, incorporating the worst case
including parallel transceivers. The differential input resistance of the TCAN1042 family is a minimum of 30 kΩ. If
100 TCAN1042 family transceivers are in parallel on a bus, this is equivalent to a 300Ω differential load worst
case. That transceiver load of 300 Ω in parallel with the 60Ω gives an equivalent loading of 50 Ω. Therefore, the
TCAN1042 family theoretically supports up to 100 transceivers on a single bus segment. However, for CAN
network design margin must be given for signal loss across the system and cabling, parasitic loadings, network
imbalances, ground offsets and signal integrity thus a practical maximum number of nodes is typically much
lower. Bus length may also be extended beyond the original ISO 11898 standard of 40 m by careful system
design and data rate tradeoffs. For example, CANopen network design guidelines allow the network to be up to
1 km with changes in the termination resistance, cabling, less than 64 nodes and significantly lowered data rate.
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This flexibility in CAN network design is one of the key strengths of the various extensions and additional
standards that have been built on the original ISO 11898-2 CAN standard. In using this flexibility comes the
responsibility of good network design and balancing these tradeoffs.
10.2.2 Detailed Design Procedures
10.2.2.1 CAN Termination
The ISO 11898 standard specifies the interconnect to be a twisted pair cable (shielded or unshielded) with 120-
Ω characteristic impedance (ZO). Resistors equal to the characteristic impedance of the line should be used to
terminate both ends of the cable to prevent signal reflections. Unterminated drop lines (stubs) connecting nodes
to the bus should be kept as short as possible to minimize signal reflections. The termination may be on the
cable or in a node, but if nodes may be removed from the bus, the termination must be carefully placed so that
two terminations always exist on the network.
Termination may be a single 120-Ω resistor at the end of the bus, either on the cable or in a terminating node. If
filtering and stabilization of the common mode voltage of the bus is desired, then split termination may be used.
(See 图 10-2). Split termination improves the electromagnetic emissions behavior of the network by eliminating
fluctuations in the bus common-mode voltages at the start and end of message transmissions.
Standard Termination
Split Termination
CANH
CANH
RTERM/2
CAN
Transceiver
CAN
Transceiver
RTERM
CSPLIT
RTERM/2
CANL
CANL
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图10-2. CAN Bus Termination Concepts
The family of transceivers have variants for both 5-V only applications and applications where level shifting is
needed for a 3.3-V microcontroller.
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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图10-3. Typical CAN Bus Application Using 5V CAN Controller
图10-4. Typical CAN Bus Application Using 3.3 V CAN Controller
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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
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10.2.3 Application Curves
50
40
30
20
10
0
4.5 4.6 4.7 4.8 4.9
5
VCC (V)
5.1 5.2 5.3 5.4 5.5
D005
VCC = 4.5 V to 5.5 V
CL = Open
VIO = 3.3 V
Temp = 25°C
RL = 60 Ω
STB = 0 V
图10-5. ICC Dominant Current over VCC Supply Voltage
11 Power Supply Recommendations
These devices are designed to operate from a VCC input supply voltage range between 4.5 V and 5.5 V. Some
devices have an output level shifting supply input, VIO, designed for a range between 3 V and 5.5 V. Both supply
inputs must be well regulated. A bulk capacitance, typically 4.7 μF, should be placed near the CAN transceiver's
main VCC supply output, and in addition a bypass capacitor, typically 0.1 μF, should be placed as close to the
device VCC and VIO supply terminals. This helps to reduce supply voltage ripple present on the outputs of the
switched-mode power supplies and also helps to compensate for the resistance and inductance of the PCB
power planes and traces.
Copyright © 2021 Texas Instruments Incorporated
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29
Product Folder Links: TCAN1042-Q1 TCAN1042V-Q1 TCAN1042H-Q1 TCAN1042HV-Q1 TCAN1042G-Q1
TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1
TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
TCAN1042G-Q1, TCAN1042GV-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1
ZHCSEL0D –FEBRUARY 2016 –REVISED OCTOBER 2021
www.ti.com.cn
Layout
Robust and reliable bus node design often requires the use of external transient protection device in order to
protect against EFT and surge transients that may occur in industrial environments. Because ESD and transients
have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high-frequency layout techniques must
be applied during PCB design. The family comes with high on-chip IEC ESD protection, but if higher levels of
system level immunity are desired external TVS diodes can be used. TVS diodes and bus filtering capacitors
should be placed as close to the on-board connectors as possible to prevent noisy transient events from
propagating further into the PCB and system.
12.1 Layout Guidelines
• Place the protection and filtering circuitry as close to the bus connector, J1, to prevent transients, ESD and
noise from propagating onto the board. In this layout example a transient voltage suppression (TVS) device,
D1, has been used for added protection. The production solution can be either bi-directional TVS diode or
varistor with ratings matching the application requirements. This example also shows optional bus filter
capacitors C4 and C5. Additionally (not shown) a series common mode choke (CMC) can be placed on the
CANH and CANL lines between the transceiver U1 and connector J1.
• Design the bus protection components in the direction of the signal path. Do not force the transient current to
divert from the signal path to reach the protection device.
• Use supply (VCC) and ground planes to provide low inductance.
Note
High-frequency currents follows the path of least impedance and not the path of least resistance.
• Use at least two vias for supply (VCC) and ground connections of bypass capacitors and protection devices to
minimize trace and via inductance.
• Bypass and bulk capacitors should be placed as close as possible to the supply terminals of transceiver,
examples are C1, C2 on the VCC supply and C6 and C7 on the VIO supply.
• Bus termination: this layout example shows split termination. This is where the termination is split into two
resistors, R6 and R7, with the center or split tap of the termination connected to ground via capacitor C3. Split
termination provides common mode filtering for the bus. When bus termination is placed on the board instead
of directly on the bus, additional care must be taken to ensure the terminating node is not removed from the
bus thus also removing the termination. See the application section for information on power ratings needed
for the termination resistor(s).
• To limit current of digital lines, serial resistors may be used. Examples are R2, R3, and R4. These are not
required.
• Terminal 1: R1 is shown optionally for the TXD input of the device. If an open drain host processor is used,
this is mandatory to ensure the bit timing into the device is met.
• Terminal 5: For "V" variants of the family, bypass capacitors should be placed as close to the pin as possible
(example C6 and C7). For device options without VIO I/O level shifting, this pin is not internally connected and
can be left floating or tied to any existing net, for example a split pin connection.
• Terminal 8: is shown assuming the mode terminal, STB, will be used. If the device will only be used in normal
mode, R4 is not needed and R5 could be used for the pull down resistor to GND.
Copyright © 2021 Texas Instruments Incorporated
30
Submit Document Feedback
Product Folder Links: TCAN1042-Q1 TCAN1042V-Q1 TCAN1042H-Q1 TCAN1042HV-Q1 TCAN1042G-Q1
TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1
TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
TCAN1042G-Q1, TCAN1042GV-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1
ZHCSEL0D –FEBRUARY 2016 –REVISED OCTOBER 2021
www.ti.com.cn
12.2 Layout Example
STB
VCC or VIO
TXD
GND
R1
R2
1
2
3
4
8
GND
R6
GND
7
C3
U1
VCC
6
R7
GND
5
VIO
RXD
R3
GND
图12-1. Layout Example
Copyright © 2021 Texas Instruments Incorporated
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31
Product Folder Links: TCAN1042-Q1 TCAN1042V-Q1 TCAN1042H-Q1 TCAN1042HV-Q1 TCAN1042G-Q1
TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1
TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1, TCAN1042HV-Q1
TCAN1042G-Q1, TCAN1042GV-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1
ZHCSEL0D –FEBRUARY 2016 –REVISED OCTOBER 2021
www.ti.com.cn
12 Device and Documentation Support
12.1 接收文档更新通知
要接收文档更新通知,请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册,即可每周接收产品信息更
改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
12.2 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料,可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范,并且不一定反映 TI 的观点;请参阅
TI 的《使用条款》。
12.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.5 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2021 Texas Instruments Incorporated
32
Submit Document Feedback
Product Folder Links: TCAN1042-Q1 TCAN1042V-Q1 TCAN1042H-Q1 TCAN1042HV-Q1 TCAN1042G-Q1
TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
NIPDAU
SN
TCAN1042DQ1
LIFEBUY
ACTIVE
SOIC
SON
D
8
8
75
RoHS & Green
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042
1042
TCAN1042DRBRQ1
DRB
3000 RoHS & Green
250 RoHS & Green
2500 RoHS & Green
Samples
Samples
Samples
TCAN1042DRBTQ1
TCAN1042DRQ1
ACTIVE
ACTIVE
SON
DRB
D
8
8
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042
1042
SOIC
NIPDAU
TCAN1042GDQ1
LIFEBUY
ACTIVE
SOIC
SON
D
8
8
75
RoHS & Green
NIPDAU
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042
1042
TCAN1042GDRBRQ1
DRB
3000 RoHS & Green
Samples
Samples
Samples
TCAN1042GDRBTQ1
TCAN1042GDRQ1
ACTIVE
ACTIVE
SON
DRB
D
8
8
250
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042
1042
SOIC
2500 RoHS & Green
NIPDAU
TCAN1042GVDQ1
LIFEBUY
ACTIVE
SOIC
SON
D
8
8
75
RoHS & Green
NIPDAU
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042V
1042V
TCAN1042GVDRBRQ1
DRB
3000 RoHS & Green
Samples
Samples
Samples
TCAN1042GVDRBTQ1
TCAN1042GVDRQ1
ACTIVE
ACTIVE
SON
DRB
D
8
8
250
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042V
1042V
SOIC
2500 RoHS & Green
NIPDAU
TCAN1042HDQ1
LIFEBUY
ACTIVE
SOIC
SON
D
8
8
75
RoHS & Green
NIPDAU
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042
1042
TCAN1042HDRBRQ1
DRB
3000 RoHS & Green
Samples
Samples
Samples
TCAN1042HDRBTQ1
TCAN1042HDRQ1
ACTIVE
ACTIVE
SON
DRB
D
8
8
250
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042
1042
SOIC
2500 RoHS & Green
NIPDAU
TCAN1042HGDQ1
LIFEBUY
ACTIVE
SOIC
SON
D
8
8
75
RoHS & Green
NIPDAU
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042
1042
TCAN1042HGDRBRQ1
DRB
3000 RoHS & Green
Samples
Samples
Samples
TCAN1042HGDRBTQ1
TCAN1042HGDRQ1
ACTIVE
ACTIVE
SON
DRB
D
8
8
250
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042
1042
SOIC
2500 RoHS & Green
NIPDAU
TCAN1042HGVDQ1
LIFEBUY
ACTIVE
SOIC
SON
D
8
8
75
RoHS & Green
NIPDAU
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042V
1042V
TCAN1042HGVDRBRQ1
DRB
3000 RoHS & Green
Samples
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2023
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TCAN1042HGVDRBTQ1
TCAN1042HGVDRQ1
ACTIVE
ACTIVE
SON
DRB
D
8
8
250
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042V
Samples
Samples
SOIC
2500 RoHS & Green
NIPDAU
1042V
TCAN1042HVDQ1
LIFEBUY
ACTIVE
SOIC
SON
D
8
8
75
RoHS & Green
NIPDAU
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042V
1042V
TCAN1042HVDRBRQ1
DRB
3000 RoHS & Green
Samples
Samples
Samples
TCAN1042HVDRBTQ1
TCAN1042HVDRQ1
ACTIVE
ACTIVE
SON
DRB
D
8
8
250
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042V
1042V
SOIC
2500 RoHS & Green
NIPDAU
TCAN1042VDQ1
LIFEBUY
ACTIVE
SOIC
SON
D
8
8
75
RoHS & Green
NIPDAU
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042V
1042V
TCAN1042VDRBRQ1
DRB
3000 RoHS & Green
Samples
Samples
Samples
TCAN1042VDRBTQ1
TCAN1042VDRQ1
ACTIVE
ACTIVE
SON
DRB
D
8
8
250
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
1042V
1042V
SOIC
2500 RoHS & Green
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2023
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TCAN1042H-Q1, TCAN1042HG-Q1, TCAN1042HGV-Q1, TCAN1042HV-Q1 :
Catalog : TCAN1042H, TCAN1042HG, TCAN1042HGV, TCAN1042HV
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Jun-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TCAN1042DRBRQ1
TCAN1042DRBTQ1
TCAN1042DRQ1
SON
SON
SOIC
SON
SON
SOIC
SON
SON
SOIC
SON
SON
SOIC
SON
SON
SOIC
SOIC
DRB
DRB
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
3000
250
330.0
180.0
330.0
330.0
180.0
330.0
330.0
180.0
330.0
330.0
180.0
330.0
330.0
180.0
330.0
330.0
12.4
12.4
12.5
12.4
12.4
12.5
12.4
12.4
12.5
12.4
12.4
12.5
12.4
12.4
12.4
12.5
3.3
3.3
6.4
3.3
3.3
6.4
3.3
3.3
6.4
3.3
3.3
6.4
3.3
3.3
6.4
6.4
3.3
3.3
5.2
3.3
3.3
5.2
3.3
3.3
5.2
3.3
3.3
5.2
3.3
3.3
5.2
5.2
1.0
1.0
2.1
1.0
1.0
2.1
1.0
1.0
2.1
1.0
1.0
2.1
1.0
1.0
2.1
2.1
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
Q2
Q2
Q1
Q2
Q2
Q1
Q2
Q2
Q1
Q2
Q2
Q1
Q2
Q2
Q1
Q1
2500
3000
250
TCAN1042GDRBRQ1
TCAN1042GDRBTQ1
TCAN1042GDRQ1
DRB
DRB
D
2500
3000
250
TCAN1042GVDRBRQ1
TCAN1042GVDRBTQ1
TCAN1042GVDRQ1
TCAN1042HDRBRQ1
TCAN1042HDRBTQ1
TCAN1042HDRQ1
DRB
DRB
D
2500
3000
250
DRB
DRB
D
2500
3000
250
TCAN1042HGDRBRQ1
TCAN1042HGDRBTQ1
TCAN1042HGDRQ1
TCAN1042HGDRQ1
DRB
DRB
D
2500
2500
D
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Jun-2023
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TCAN1042HGVDRBRQ1
TCAN1042HGVDRBTQ1
TCAN1042HGVDRQ1
TCAN1042HVDRBRQ1
TCAN1042HVDRBTQ1
TCAN1042HVDRQ1
TCAN1042VDRBRQ1
TCAN1042VDRBTQ1
TCAN1042VDRQ1
SON
SON
SOIC
SON
SON
SOIC
SON
SON
SOIC
DRB
DRB
D
8
8
8
8
8
8
8
8
8
3000
250
330.0
180.0
330.0
330.0
180.0
330.0
330.0
180.0
330.0
12.4
12.4
12.5
12.4
12.4
12.5
12.4
12.4
12.5
3.3
3.3
6.4
3.3
3.3
6.4
3.3
3.3
6.4
3.3
3.3
5.2
3.3
3.3
5.2
3.3
3.3
5.2
1.0
1.0
2.1
1.0
1.0
2.1
1.0
1.0
2.1
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
Q2
Q2
Q1
Q2
Q2
Q1
Q2
Q2
Q1
2500
3000
250
DRB
DRB
D
2500
3000
250
DRB
DRB
D
2500
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Jun-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TCAN1042DRBRQ1
TCAN1042DRBTQ1
TCAN1042DRQ1
SON
SON
SOIC
SON
SON
SOIC
SON
SON
SOIC
SON
SON
SOIC
SON
SON
SOIC
SOIC
SON
SON
DRB
DRB
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
3000
250
346.0
200.0
340.5
346.0
200.0
340.5
346.0
200.0
340.5
346.0
200.0
340.5
346.0
200.0
356.0
340.5
346.0
200.0
346.0
183.0
336.1
346.0
183.0
336.1
346.0
183.0
336.1
346.0
183.0
336.1
346.0
183.0
356.0
336.1
346.0
183.0
35.0
25.0
25.0
35.0
25.0
25.0
35.0
25.0
25.0
35.0
25.0
25.0
35.0
25.0
35.0
25.0
35.0
25.0
2500
3000
250
TCAN1042GDRBRQ1
TCAN1042GDRBTQ1
TCAN1042GDRQ1
DRB
DRB
D
2500
3000
250
TCAN1042GVDRBRQ1
TCAN1042GVDRBTQ1
TCAN1042GVDRQ1
TCAN1042HDRBRQ1
TCAN1042HDRBTQ1
TCAN1042HDRQ1
DRB
DRB
D
2500
3000
250
DRB
DRB
D
2500
3000
250
TCAN1042HGDRBRQ1
TCAN1042HGDRBTQ1
TCAN1042HGDRQ1
TCAN1042HGDRQ1
TCAN1042HGVDRBRQ1
TCAN1042HGVDRBTQ1
DRB
DRB
D
2500
2500
3000
250
D
DRB
DRB
Pack Materials-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Jun-2023
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TCAN1042HGVDRQ1
TCAN1042HVDRBRQ1
TCAN1042HVDRBTQ1
TCAN1042HVDRQ1
TCAN1042VDRBRQ1
TCAN1042VDRBTQ1
TCAN1042VDRQ1
SOIC
SON
SON
SOIC
SON
SON
SOIC
D
8
8
8
8
8
8
8
2500
3000
250
340.5
346.0
200.0
340.5
346.0
200.0
340.5
338.1
346.0
183.0
336.1
346.0
183.0
336.1
20.6
35.0
25.0
25.0
35.0
25.0
25.0
DRB
DRB
D
2500
3000
250
DRB
DRB
D
2500
Pack Materials-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Jun-2023
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
TCAN1042DQ1
TCAN1042GDQ1
TCAN1042GVDQ1
TCAN1042HDQ1
TCAN1042HGDQ1
TCAN1042HGVDQ1
TCAN1042HVDQ1
TCAN1042VDQ1
D
D
D
D
D
D
D
D
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
8
8
8
8
8
8
8
8
75
75
75
75
75
75
75
75
507
507
507
507
507
507
507
507
8
8
8
8
8
8
8
8
3940
3940
3940
3940
3940
3940
3940
3940
4.32
4.32
4.32
4.32
4.32
4.32
4.32
4.32
Pack Materials-Page 5
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Copyright © 2023,德州仪器 (TI) 公司
TCAN1042HVDRQ1 相关器件
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TCAN1042V-Q1 | TI | 具有灵活数据速率的汽车类故障保护 CAN 收发器 | 获取价格 | |
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TCAN1042VDRBRQ1 | TI | 具有灵活数据速率的汽车类故障保护 CAN 收发器 | DRB | 8 | -55 to 125 | 获取价格 | |
TCAN1042VDRBTQ1 | TI | 具有灵活数据速率的汽车类故障保护 CAN 收发器 | DRB | 8 | -55 to 125 | 获取价格 | |
TCAN1042VDRQ1 | TI | 具有灵活数据速率的汽车类故障保护 CAN 收发器 | D | 8 | -55 to 125 | 获取价格 | |
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TCAN1043A-Q1_V01 | TI | TCAN1043A-Q1 Low-Power Fault Protected CAN FD Transceiver with INH and WAKE | 获取价格 | |
TCAN1043ADMTRQ1 | TI | TCAN1043A-Q1 Low-Power Fault Protected CAN FD Transceiver with INH and WAKE | 获取价格 | |
TCAN1043ADRQ1 | TI | TCAN1043A-Q1 Low-Power Fault Protected CAN FD Transceiver with INH and WAKE | 获取价格 | |
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