THS3112ID [TI]
双路、低噪声、高输出电流、110MHz 放大器 | D | 8 | -40 to 85;
| 型号： | THS3112ID |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 双路、低噪声、高输出电流、110MHz 放大器 | D | 8 | -40 to 85 放大器 光电二极管 |
| 文件： | 总20页 (文件大小：663K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁ ꢂ ꢃꢄ ꢅꢅ
ꢀꢁ ꢂ ꢃꢄ ꢅꢆ
SLOS382 − SEPTEMBER 2001
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D
Line Drivers
FEATURES
D
D
Motor Drivers
Piezo Drivers
D
Low Noise
− 2.9 pA/√Hz Noninverting Current Noise
− 10.8 pA/√Hz Inverting Current Noise
− 2.2 nV/√Hz Voltage Noise
DESCRIPTION
The THS3122/5 are low-noise, high-speed current
feedback amplifiers, with high output current drive. This
makes them ideal for any application that requires low
distortion over a wide frequency with heavy loads. The
THS3122/5 can drive four serially terminated video
lines while maintaining a differential gain error less than
0.03%.
D
D
High Output Current, 450 mA
High Speed
− 128 MHz , −3 dB BW(R = 50 Ω, R = 470 Ω)
L
F
− 1550 V/µs Slew Rate (G = 2, R = 50 Ω)
L
D
D
D
D
Wide Output Swing
− 26 V Output Voltage, R = 50 Ω
PP
L
Low Distortion
The high output drive capability of the THS3122/5
enables the devices to drive 50-Ω loads with low
distortion over a wide range of output voltages:
− -80 dBc (1 MHz, 2 V , G = 2)
PP
Low Power Shutdown Mode (THS3125)
− 370-µA Shutdown Supply Current
Standard SOIC, SOIC PowerPAD, and
TSSOP PowerPAD Package
−80 −dBc THD at 2 V
−75 −dBc THD at 8 V
PP
PP
The THS3122/5 can operate from 5 V to 15 V supply
voltages while drawing as little as 7.2 mA of supply
current per channel. They offer a low power shutdown
mode, reducing the supply current to only 370 µA. The
THS3122/5 are packaged in a standard SOIC, SOIC
PowerPAD, and TSSOP PowerPAD packages.
APPLICATIONS
D
Video Distribution
Instrumentation
D
VOLTAGE NOISE AND CURRENT NOISE
vs
THS3125
SOIC (D) AND
THS3122
SOIC (D) AND
FREQUENCY
100
V
T
A
=
5 V to 15 V
SOIC PowerPAD (DDA) PACKAGE
TSSOP PowerPAD (PWP) PACKAGE
CC
= 25°C
(TOP VIEW)
(TOP VIEW)
I
n−
1 OUT
1 IN−
1 IN+
V
CC+
1
2
3
4
8
7
6
5
1 OUT
1 IN−
1 IN+
V
CC+
1
2
3
4
5
6
7
14
2 OUT
2 IN−
2 IN+
13 2 OUT
12 2 IN−
11 2 IN+
I
10
n+
V
CC−
V
CC−
N/C
10
9
V
N/C
n
GND
N/C
SHUTDOWN
N/C
8
1
0.01
0.1
1
10
100
f − Frequency − kHz
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
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Copyright 2001, Texas Instruments Incorporated
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ꢣ ꢧ ꢤ ꢣꢝ ꢞꢱ ꢠꢟ ꢢ ꢪꢪ ꢨꢢ ꢡ ꢢ ꢔ ꢧ ꢣ ꢧ ꢡ ꢤ ꢬ
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1
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SLOS382 − SEPTEMBER 2001
AVAILABLE OPTIONS
PACKAGED DEVICE
EVALUATION
MODULES
T
A
SOIC-8
(D)
SOIC-8 PowerPAD
(DDA)
SOIC-14
(D)
TSSOP-14
(PWP)
0°C to 70°C
THS3122CD
THS3122ID
THS3122CDDA
THS3122IDDA
THS3125CD
THS3125ID
THS3125CPWP
THS3125IPWP
THS3122EVM
THS3125EVM
−40°C to 85°C
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, V
to V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 V
CC+
CC−
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
CC
Output current (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275 mA
Differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 V
Maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Total power dissipation at (or below) 25°C free-air temperature . . . . . . . . . . . See Dissipation Ratings Table
Operating free-air temperature, T : Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
Storage temperature, T : Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 125°C
stg
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 125°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The THS3122 and THS3125 may incorporate a PowerPAD on the underside of the chip. This acts as a heatsink and must be
connected to a thermally dissipating plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction
temperature which could permanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing the
PowerPAD thermally enhanced package.
DISSIPATION RATING TABLE
T
= 25°C
A
PACKAGE
θ
JA
POWER RATING
‡
D-8
DDA
D-14
PWP
95°C/W
1.32 W
67°C/W
1.87 W
‡
66.6°C/W
1.88 W
37.5°C/W
3.3 W
‡
This data was taken using the JEDEC proposed high-K test PCB.
For the JEDEC low-K test PCB, the θ is168°C/W for the D-8
JA
package and 122.3°C/W for the D-14 package.
recommended operating conditions
MIN NOM
MAX
15
UNIT
Dual supply
5
10
0
Supply voltage, V
CC+
to V
CC−
V
Single supply
30
C-suffix
70
Operating free-air temperature, T
°C
A
I-suffix
−40
2
85
High level (device shutdown)
Low level (device active)
Shutdown pin input levels, relative to the GND pin
V
0.8
2
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SLOS382 − SEPTEMBER 2001
electrical characteristics over recommended operating free-air temperature range, T = 25°C,
A
V
= 15 V, R = 750 Ω, R = 100 Ω (unless otherwise noted)
F L
CC
dynamic performance
PARAMETER
TEST CONDITIONS
MIN
TYP
138
160
126
128
20
MAX
UNIT
V
=
=
=
=
=
=
=
=
=
=
=
=
=
5 V
R
= 50 Ω,
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
F
R
R
= 50 Ω
= 50 Ω
L
L
G = 1
V
V
V
V
V
V
V
V
V
V
V
V
15 V
5 V
Small-signal bandwidth (−3 dB)
R
=470 Ω,
G = 2
F
MHz
15 V
5 V
BW
R
= 470 Ω,
G = 2
F
Bandwidth (0.1 dB)
15 V
5 V
30
V
V
V
= 4 V
47
O(PP)
O(pp)
O
Full power bandwidth
G = −1
G = 2
MHz
V/µs
ns
= 20 V
15 V
15 V
5 V
64
= 10 V
1550
500
1000
53
PP
SR
Slew rate (see Note 2), G=8
Settling time to 0.1%
R
= 680 Ω
F
V
O
= 5 V
PP
15 V
5 V
V
V
= 2 V
= 5 V
O
PP
t
s
G = −1
15 V
64
O
PP
NOTE 2: Slew rate is defined from the 25% to the 75% output levels.
noise/distortion performance
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
−80
UNIT
V
= 2 V
= 8 V
= 2 V
= 5 V
G = 2,
R
= 470 Ω,
O(PP)
O(PP)
O(PP)
O(PP)
F
V
CC
=
15 V, f = 1 MHz
V
V
V
−75
THD
Total harmonic distortion
dBc
−77
G = 2,
R
= 470 Ω,
F
V
V
=
=
5 V, f = 1 MHz
CC
−76
V
n
Input voltage noise
5 V, 15 V
f = 10 kHz
2.2
2.9
nV/√Hz
pA/√Hz
CC
Noninverting Input
Inverting Input
I
n
Input current noise
Crosstalk
V
CC
=
5 V, 15 V
f = 10 kHz
10.8
−67
−67
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
=
=
=
=
=
=
5 V
G = 2,
f = 1 MHz,
PP
dBc
V
O
= 2 V
15 V
5 V
0.01%
G = 2,
R = 150 Ω
L
Differential gain error
Differential phase error
15 V
5 V
0.01%
0.011°
0.011°
40 IRE modulation
100 IRE Ramp
NTSC and PAL
15 V
3
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SLOS382 − SEPTEMBER 2001
electrical characteristics over recommended operating free-air temperature range, T = 25°C,
A
V
= 15 V, R = 750 Ω, R = 100 Ω (unless otherwise noted) (continued)
CC
F
L
dc performance
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
T
= 25°C
4.4
6
8
2
3
A
Input offset voltage
V
V
V
V
= 0 V,
= 0 V,
T
A
= full range
= 25°C
IC
O
mV
T
A
0.4
V
IO
=
=
5 V,
15 V
CC
CC
Channel offset voltage matching
Offset drift
T
A
= full range
= full range
= 25°C
T
A
10
6
µV/°C
T
A
23
30
2
V
V
V
V
= 0 V,
= 0 V,
IN− Input bias current
IN+ Input bias current
IC
O
CC
CC
T
A
= full range
= 25°C
I
I
µA
IB
=
=
5 V,
15 V
T
A
0.33
5.4
T
A
= full range
3
V
V
V
V
= 0 V,
= 0 V,
IC
O
CC
CC
T
A
= 25°C
22
30
Input offset current
µA
IO
=
=
5 V,
15 V
T
A
= full range
= 1 kΩ,
L
V
CC
V
CC
=
=
5 V,
15 V
Z
OL
Open loop transimpedance
R
1
MΩ
input characteristics
PARAMETER
TEST CONDITIONS
= 5 V
MIN
2.5
12.5
58
TYP
2.7
MAX
UNIT
V
V
V
CC
CC
CC
V
ICR
Input common-mode voltage range
T
= full range
V
A
=
15 V
12.7
62
T
A
= 25°C
=
5 V,
V = −2.5 V to 2.5 V
T
= full range
= 25°C
56
I
A
CMRR Common-mode rejection ratio
dB
T
A
63
67
V
CC
= 15 V,
V = −12.5 V to 12.5 V
I
T
A
= full range
60
IN+
IN−
1.5
15
2
MΩ
Ω
R
C
Input resistance
I
i
Input capacitance
pF
output characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
4.1
4
MAX
UNIT
G = 4, V = 1.06 V,
I
R
= 1 kΩ,
T
= 25°C
V
L
A
V
=
5 V
CC
T
A
= 25°C
3.8
3.7
G = 4, V = 1.025 V,
I
R
R
= 50 Ω,
= 1 kΩ,
L
L
V
CC
=
5 V
T
A
= full range
V
V
O
Output voltage swing
G = 4, V = 3.6 V,
I
T
A
= 25°C
14.2
13.3
V
CC
=
15 V
T
A
= 25°C
12
G = 4, V = 3.325 V,
I
R
R
R
= 50 Ω,
= 10 Ω,
= 25 Ω,
V
L
L
L
V
CC
=
15 V
T
A
= full range
11.5
G = 4, V = 1.025 V,
I
T
A
= 25°C
200
360
280
mA
V
CC
=
5 V
I
O
Output current drive
Output resistance
G = 4, V = 3.325 V,
I
T
A
= 25°C
= 25°C
440
14
mA
V
CC
= 15 V
r
open loop
T
A
Ω
o
4
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SLOS382 − SEPTEMBER 2001
electrical characteristics over recommended operating free-air temperature range, T = 25°C,
A
V
= 15 V, R = 750 Ω, R = 100 Ω (unless otherwise noted) (continued)
F L
CC
power supply
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
9
UNIT
T
= 25°C
7.2
A
V
CC
V
CC
V
CC
V
CC
=
=
=
=
5V
T
A
= full range
= 25°C
10
Quiescent current (per channel)
Power supply rejection ratio
I
mA
CC
T
A
8.4
60
73
10.5
11.5
15 V
T
A
= full range
= 25°C
T
A
53
50
68
66
5 V 1 V
15 V 1 V
T
= full range
= 25°C
A
PSRR
dB
T
A
T
A
= full range
shutdown characteristics (THS3125 only)
PARAMETER
TEST CONDITIONS
MIN
TYP
370
200
500
18
MAX
UNIT
µA
ns
I
t
t
I
I
Shutdown quiescent current (per channel)
Disable time (see Note 3)
V
= 3.3 V
500
CC(SHDN)
(SHDN)
DIS
= 0 V
GND
CC
Enable time (see Note 3)
ns
EN
V
= 5 V to 15 V
Shutdown pin low level leakage current
Shutdown pin high level leakage current
V
V
= 0 V
25
µA
µA
IL(SHDN)
IH(SHDN)
(SHDN)
= 3.3 V
110
130
(SHDN)
NOTE 3: Disable/enable time is defined as the time from when the shutdown signal is applied to the SHDN pin to when the supply current has
reached half of its final value.
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Small signal closed loop gain
Small and large signal output
vs Frequency
1 − 10
11, 12
13, 14, 15
16, 17
18
vs Frequency
vs Frequency
Harmonic distortion
vs Peak−to−peak output voltage
vs Frequency
V , I
Voltage noise and current noise
Common-mode rejection ratio
Crosstalk
n
n
CMRR
vs Frequency
19
vs Frequency
20
Z
Output impedance
Slew rate
vs Frequency
21
o
SR
vs Output voltage step
vs Free-air temperature
vs Common-mode input voltage
vs Free-air temperature
vs Load current
22
23
V
Input offset voltage
IO
24
I
B
Input bias current
Output voltage
25
V
26
O
vs Free-air temperature
vs Supply voltage
27
Quiescent current
28
I
Shutdown supply current
Differential gain and phase error
Shutdown response
vs Free-air temperature
vs 75 Ω serially terminated loads
29
CC
30, 31
32
Small signal pulse response
Large signal pulse response
33, 34
35, 36
5
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SLOS382 − SEPTEMBER 2001
TYPICAL CHARACTERISTICS
SMALL SIGNAL CLOSED LOOP GAIN
SMALL SIGNAL CLOSED LOOP GAIN
vs
SMALL SIGNAL CLOSED LOOP GAIN
vs
vs
FREQUENCY
FREQUENCY
FREQUENCY
6
3
2
R
= 330 Ω
F
R
= 470 Ω
F
3
0
0
1
R
= 680 Ω
= 500 Ω
−3
−6
F
R
= 680 Ω
= 500 Ω
F
−3
0
R
F
R
= 750 Ω
= 560 Ω
−6
F
R
−9
F
R = 330 Ω
F
−1
−9
R
−12
−15
−18
−21
−24
−27
−30
F
−2
−3
−4
−5
−6
−12
−15
−18
−21
−24
−27
−30
G = −1,
G = −1,
G = 1,
V
= 15 V,
V
=
5 V,
V
=
5 V,
R = 50 Ω
L
CC
CC
CC
R
= 50 Ω
R
= 50 Ω
L
L
0.1
1
10
100
1000
0.1
1
10
100
1000
0.1
1
10
100
1000
f − Frequency − MHz
f − Frequency − MHz
f − Frequency − MHz
Figure 1
Figure 2
Figure 3
SMALL SIGNAL CLOSED LOOP GAIN
vs
SMALL SIGNAL CLOSED LOOP GAIN
vs
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
FREQUENCY
FREQUENCY
9
3
9
R
= 470 Ω
F
R
= 430 Ω
F
R
= 430 Ω
F
3
6
3
0
−3
R
= 500 Ω
F
R
= 500 Ω
= 470 Ω
F
R
= 560 Ω
R
= 470 Ω
F
F
6
0
R
F
R
= 750 Ω
F
0
−6
−3
−9
G = 2,
−3
−6
G = 2,
G = 1,
V
=
5 V,
V
=
15 V,
R = 50 Ω
L
V
=
15 V,
CC
CC
CC
R
= 50 Ω
R
= 50 Ω
L
L
−6
0.1
−12
0.1
1
10
100
1000
1
10
100
1000
0.1
1
10
100
1000
f − Frequency − MHz
f − Frequency − MHz
f − Frequency − MHz
Figure 4
Figure 5
Figure 6
SMALL SIGNAL CLOSED LOOP GAIN
vs
SMALL SIGNAL CLOSED LOOP GAIN
vs
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
FREQUENCY
FREQUENCY
15
15
15
R
= 200 Ω
R
= 200 Ω
F
F
12
12
9
12
9
6
R
R
= 200 Ω
F
9
6
R
= 270 Ω
F
R
= 270 Ω
6
F
3
R
= 390 Ω
3
F
R
= 390 Ω
F
= 470 Ω
= 560 Ω
F
0
3
0
−3
−6
−3
−6
−9
−12
−15
−18
0
R
F
−3
−9
G = 4,
−6
G = 4,
−12
V
R
= 5 V,
= 50 Ω
V
=
5 V,
V
R
=
15 V,
CC
L
CC
CC
L
−15
−18
−9
R
= 50 Ω
= 50 Ω
L
−12
0.1
1
10
100
1000
0.1
1
10
100
1000
0.1
1
10
100
1000
f − Frequency − MHz
f − Frequency − MHz
f − Frequency − MHz
Figure 7
Figure 8
Figure 9
6
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ꢀꢁ ꢂ ꢃꢄ ꢅꢅ
ꢀꢁ ꢂ ꢃꢄ ꢅꢆ
SLOS382 − SEPTEMBER 2001
TYPICAL CHARACTERISTICS
SMALL AND LARGE SIGNAL OUTPUT
vs
SMALL AND LARGE SIGNAL OUTPUT
vs
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
FREQUENCY
FREQUENCY
18
18
15
G = 2, V
=
5 V,
G = 2, V
=
15 V,
CC
CC
4 V
4 V
PP
R
= 200 Ω
PP
F
R
= 680 Ω, R = 50 Ω
R
= 680 Ω,R = 50 Ω
L
L
12
9
L
L
12
6
12
6
2 V
1 V
2 V
1 V
PP
PP
PP
PP
PP
PP
R
= 470 Ω
F
6
0
0
−6
3
0.5 V
0.5 V
R
= 560 Ω
F
−6
−12
0
0.25 V
0.25 V
PP
PP
−3
−12
0.125 V
0.125 V
−6
PP
PP
−18
−24
V
R
=
15 V,
−18
−24
CC
L
−9
= 50 Ω
−12
0.1
10
100
1000
0.1
1
10
100
1000
1
0.1
1
10
100
1000
f − Frequency − MHz
f − Frequency − MHz
f − Frequency − MHz
Figure 10
Figure 11
Figure 12
HARMONIC DISTORTION
HARMONIC DISTORTION
HARMONIC DISTORTION
vs
vs
vs
FREQUENCY
FREQUENCY
FREQUENCY
0
0
−10
−20
−30
−40
−50
0
G = 2,
G = 2,
G = 2,
−10
−10
−20
−30
−40
−50
−60
−70
−80
V
V
=
5 V,
= 2 V,
V
V
=
15 V,
= 8 V,
= 470 Ω,
= 50 Ω
V
V
=
15 V,
= 2 V,
CC
O(PP)
CC
O(PP)
CC
O(PP)
−20
−30
−40
−50
−60
−70
−80
−90
−100
3rd Harmonic
R
R
= 470 Ω,
R
R
R
R
= 470 Ω,
= 50 Ω
F
L
F
L
F
L
2nd Harmonic
= 50 Ω
5th Harmonic
3rd Harmonic
5th Harmonic
3rd Harmonic
−60
−70
2nd Harmonic
5th Harmonic
2nd Harmonic
−80
4th Harmonic
10 100
−90
4th Harmonic
10
−90
4th Harmonic
−100
−100
0.1
1
100
0.1
1
10
0.1
1
f − Frequency − MHz
f − Frequency − MHz
f − Frequency − MHz
Figure 13
Figure 14
Figure 15
HARMONIC DISTORTION
vs
PEAK-TO-PEAK OUTPUT VOLTAGE
HARMONIC DISTORTION
vs
PEAK-TO-PEAK OUTPUT VOLTAGE
VOLTAGE NOISE AND CURRENT NOISE
vs
FREQUENCY
0
0
100
G = 2,
G = 2,
V
T
=
5 V to 15 V
CC
A
−10
−20
−30
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
V
=
5 V,
V
=
15 V,
= 25°C
CC
CC
f = 1 MHz,
f = 1 MHz,
R
R
= 470 Ω,
= 50 Ω
R
R
= 470 Ω,
= 50 Ω
F
L
F
L
I
n−
−40
−50
−60
−70
5th Harmonic
I
10
n+
5th Harmonic
2nd Harmonic
2nd Harmonic
3rd Harmonic
3rd Harmonic
V
n
−80
−90
4th Harmonic
2.5 3.5
4th Harmonic
−100
1
0
0.5
1
1.5
2
3
4
4.5 5
0
1
2
3
4
5
6
7
8
9
0.01
0.1
1
10
100
V
− Peak-to-Peak Output Voltage − V
V
− Peak-to-Peak Output Voltage − V
PP
PP
f − Frequency − kHz
Figure 16
Figure 17
Figure 18
7
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ꢀ ꢁꢂ ꢃ ꢄꢅ ꢅ
ꢀ ꢁꢂ ꢃ ꢄꢅ ꢆ
SLOS382 − SEPTEMBER 2001
TYPICAL CHARACTERISTICS
COMMON-MODE REJECTION RATIO
vs
CROSSTALK
vs
OUTPUT IMPEDANCE
vs
FREQUENCY
FREQUENCY
FREQUENCY
100
10
80
0
G = 2,
V
R
= 5 V, 15 V
CC
= 1 kΩ,
−10
−20
−30
−40
−50
−60
70
V
=
5 V, 15 V
= 470 Ω,
= 50 Ω,
CC
F
V
= 15 V
CC
R
R
F
L
60
50
40
30
20
V
= 5 V
CC
1
0.1
G = 2,
R
R
T
A
= 470 Ω,
= 50 Ω,
= 25°C
F
L
10
0
−70
−80
0.01
0.1
1
10
100
1000
0.1
1
10
100
1000
0.1
1
10
100
1000
f − Frequency − MHz
f − Frequency − MHz
f − Frequency − MHz
Figure 19
Figure 20
Figure 21
SLEW RATE
vs
INPUT OFFSET VOLTAGE
vs
INPUT OFFSET VOLTAGE
vs
OUTPUT VOLTAGE STEP
FREE-AIR TEMPERATURE
COMMON-MODE INPUT VOLTAGE
0
1
2
1800
1600
1400
1200
1000
800
600
400
200
0
V
= 15 V,
V
V
= 15 V,
= 0 V,
G = 2,
CC
CC
CM
1.5
1
R
T
= 100 Ω,
= 25°C
R
R
T
A
= 470 Ω,
= 50 Ω,
= 25°C
L
A
F
L
R
= 100 Ω
L
2
V
= 15 V
0.5
0
CC
3
4
−0.5
−1
5
V
=
6
5 V
CC
6
7
−1.5
−2
−40
−15
10
35
60
85
0
1
2
3
4
5
7
8
9
10
−15
−10
−5
0
5
10
15
T
A
− Free-Air Temperature − °C
V
− Output Voltage Step − V
V
− Common-Mode Input Voltage − V
O
CM
Figure 22
Figure 23
Figure 24
INPUT BIAS CURRENT
vs
QUIESCENT CURRENT
vs
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
LOAD CURRENT
12
10
8
15
12
10
8
V
=
15 V, I
IB+
CC
V
=
15 V
CC
14
13
12
11
10
V
=
15 V, I
IB−
CC
6
V
= 5 V
CC
6
V
=
5 V, I
IB+
CC
4
4
V
=
5 V, I
IB−
CC
2
V
R
T
A
= 15 V,
= 330 Ω,
= 25°C
CC
F
2
0
0
−2
−40
−15
10
35
60
85
0
50 100 150 200 250 300 350 400 450
− Load Current − mA
−40
−15
10
35
60
85
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
I
L
Figure 25
Figure 26
Figure 27
8
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ꢀꢁ ꢂ ꢃꢄ ꢅꢅ
ꢀꢁ ꢂ ꢃꢄ ꢅꢆ
SLOS382 − SEPTEMBER 2001
TYPICAL CHARACTERISTICS
QUIESCENT CURRENT
vs
SHUTDOWN SUPPLY CURRENT
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
12
10
450
400
350
300
250
200
150
100
V
= 3.3 V
SD
85 °C
R
= 750 Ω
F
V
=
15 V
CC
8
6
4
2
0
25 °C
−40 °C
V
=
5 V
CC
50
0
0
2.5
5
7.5
10
12.5
15
−40
−15
10
35
60
85
V
− Supply Voltage −
V
T
A
− Free-Air Temperature − °C
CC
Figure 28
Figure 29
DIFFERENTIAL PHASE AND GAIN ERROR
DIFFERENTIAL PHASE AND GAIN ERROR
vs
vs
75 Ω SERIALLY TERMINATED LOADS
75 Ω SERIALLY TERMINATED LOADS
0.07
0.08
0.35
0.35
V
= 15 V,
V
= 5 V,
CC
G = 2,
CC
G = 2,
0.07
0.06
0.05
0.04
0.03
0.02
0.3
0.3
0.25
0.2
0.15
0.1
0.05
0
40 IRE Modulation
100 IRE Ramp
NTSC
40 IRE Modulation
100 IRE Ramp
NTSC
0.06
0.05
0.04
0.03
0.02
0.25
0.2
Gain Error
Gain Error
Phase Error
Phase Error
0.15
0.1
0.05
0
0.01
0
0.01
0
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
75 Ω Serially Terminated Loads
75 Ω Serially Terminated Loads
Figure 30
Figure 31
THS3125
SHUTDOWN RESPONSE
SMALL SIGNAL PULSE RESPONSE
SMALL SIGNAL PULSE RESPONSE
5
4
3
2
1
0
0.3
0.3
V = 15 V
CC
G = 8
0.2
0.1
0
0.2
0.1
R
R
= 330 Ω
= 100 Ω
F
L
0
2
−0.1
−0.2
−0.3
−0.1
1.5
1
V
= 5 V,
V
= 15 V,
CC
G = 2,
CC
G = 2,
−0.2
−0.3
0.5
0
R
R
= 470 Ω,
= 50 Ω
R
R
= 470 Ω,
= 50 Ω
F
L
F
L
0
1
2
3
4
5
6
7
8
9
10
0
100
200
300
400
500
600
0
100
200
300
400
500
600
t − Time − µs
t − Time − ns
t − Time − ns
Figure 32
Figure 33
Figure 34
9
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ꢀ ꢁꢂ ꢃ ꢄꢅ ꢅ
ꢀ ꢁꢂ ꢃ ꢄꢅ ꢆ
SLOS382 − SEPTEMBER 2001
TYPICAL CHARACTERISTICS
LARGE SIGNAL PULSE RESPONSE
3
LARGE SIGNAL PULSE RESPONSE
3
2
2
1
1
0
0
−1
−2
−3
−1
−2
−3
V
= 5 V,
CC
G = 2,
V
= 15 V,
CC
G = 2,
R
R
= 470 Ω,
= 50 Ω
F
L
R
R
= 470 Ω,
= 50 Ω
F
L
0
100
200
300
400
500
600
0
100
200
300
400
500
600
t − Time − ns
t − Time − ns
Figure 36
Figure 35
10
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ꢀꢁ ꢂ ꢃꢄ ꢅꢅ
ꢀꢁ ꢂ ꢃꢄ ꢅꢆ
SLOS382 − SEPTEMBER 2001
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
M
14
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°−ā8°
0.044 (1,12)
A
0.016 (0,40)
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
8
14
16
DIM
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MAX
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
11
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ꢀ ꢁꢂ ꢃ ꢄꢅ ꢅ
ꢀ ꢁꢂ ꢃ ꢄꢅ ꢆ
SLOS382 − SEPTEMBER 2001
MECHANICAL INFORMATION
DDA (S−PDSO−G8)
Power PADt PLASTIC SMALL-OUTLINE
0,49
0,35
M
0,10
1,27
8
5
Thermal Pad
(See Note D)
0,20 NOM
3,99
3,81
6,20
5,84
Gage Plane
0,25
1
4
4,98
4,80
0°−8°
0,89
0,41
1,68 MAX
Seating Plane
0,10
1,55
1,40
0,13
0,03
4202561/A 02/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.
This pad is electrically and thermally connected to the backside of the die and possibly selected leads.
PowerPAD is a trademark of Texas Instruments.
12
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ꢀꢁ ꢂ ꢃꢄ ꢅꢅ
ꢀꢁ ꢂ ꢃꢄ ꢅꢆ
SLOS382 − SEPTEMBER 2001
MECHANICAL INFORMATION
PWP (R-PDSO-G**)
PowerPAD PLASTIC SMALL-OUTLINE PACKAGE
20-PIN SHOWN
0,30
0,19
0,65
20
M
0,10
11
Thermal Pad
(See Note D)
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
1
10
0,25
A
0°−ā8°
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
28
DIM
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
A MAX
A MIN
4073225/E 03/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusions.
D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically
and thermally connected to the backside of the die and possibly selected leads.
E. Falls within JEDEC MO-153
PowerPAD is a trademark of Texas Instruments.
13
www.ti.com
PACKAGE OPTION ADDENDUM
www.ti.com
19-May-2005
PACKAGING INFORMATION
Orderable Device
THS3122CD
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
THS3122CDDA
SO
Power
PAD
DDA
DDA
8
75
TBD
Call TI
Level-1-235C-UNLIM
THS3122CDDAR
ACTIVE
SO
Power
PAD
8
2500
TBD
Call TI
Level-1-235C-UNLIM
THS3122CDG4
THS3122CDR
THS3122CDRG4
THS3122ID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
D
D
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
THS3122IDDA
SO
Power
PAD
DDA
75
TBD
Call TI
Level-1-235C-UNLIM
THS3122IDDAR
ACTIVE
SO
Power
PAD
DDA
8
2500
TBD
Call TI
Level-1-235C-UNLIM
THS3122IDR
THS3122IDRG4
THS3125CD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
D
D
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
14
14
14
14
14
14
14
14
14
14
14
14
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
THS3125CDG4
THS3125CDR
SOIC
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
THS3125CDRG4
THS3125CPWP
THS3125CPWPG4
THS3125CPWPR
THS3125CPWPRG4
THS3125ID
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
HTSSOP
HTSSOP
HTSSOP
HTSSOP
SOIC
PWP
PWP
PWP
PWP
D
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
THS3125IDR
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
THS3125IDRG4
THS3125IPWP
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
HTSSOP
PWP
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
19-May-2005
Orderable Device
THS3125IPWPG4
THS3125IPWPR
THS3125IPWPRG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
HTSSOP
PWP
14
14
14
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
HTSSOP
HTSSOP
PWP
PWP
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
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Addendum-Page 2
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