THS6007CPWPRG4 [TI]
IC,LINE TRANSCEIVER,2 DRIVER,2 RCVR,TSSOP,28PIN,PLASTIC;
| 型号： | THS6007CPWPRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IC,LINE TRANSCEIVER,2 DRIVER,2 RCVR,TSSOP,28PIN,PLASTIC 驱动 光电二极管 驱动器 |
| 文件： | 总35页 (文件大小：659K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
PWP PACKAGE
(TOP VIEW)
ADSL Differential Line Driver and Receiver
Driver Features
– 140 MHz Bandwidth (–3dB) With
25-Ω Load
– 1300 V/µs Slew Rate, G = 5
– 400 mA Output Current Minimum Into
25-Ω Load
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
R1 OUT
R1 IN–
R1 IN+
NC
R V
CC+
2
R2 OUT
R2 IN–
R2 IN+
NC
3
4
5
NC
– –72 dBc 3rd Order Harmonic Distortion
6
R V
D V
NC
CC–
CC–
at f = 1 MHz, 25-Ω Load, and 20 V
7
D V
O(PP)
CC–
8
D1 OUT
NC
D2 OUT
NC
Receiver Features
– 175 MHz Bandwidth (–3dB)
– 230 V/µs Slew Rate
9
10
11
12
13
14
D V
D V
CC+
CC+
D1 IN+
D1 IN–
NC
D2 IN+
D2 IN–
NC
– –79 dBc Total Harmonic Distortion at
f = 1 MHz, R 1 kΩ
L
– Quiescent Current = 3.4 mA Per Channel
Wide Supply Range ±4.5 V to ±16 V
Available in the PowerPAD Package
NC
NC
NC – No internal connection
description
The THS6007 contains two high-current, high-speed drivers and two low-power, high-speed receivers. These
drivers and receivers can be configured differentially for driving and receiving signals over low-impedance lines.
The THS6007 is ideally suited for asymmetrical digital subscriber line (ADSL) applications where it supports
the high-peak voltage and current requirements of that application. The drivers are current feedback amplifiers
designed for the high slew rates necessary to support low total harmonic distortion (THD) in ADSL applications.
The receivers are traditional voltage feedback amplifiers designed for maximum flexibility while consuming only
3.4 mA per channel quiescent current. Separate power supply connections for each driver and both receivers
are provided to minimize crosstalk.
The THS6007 is packaged in the patented PowerPAD package. This package provides outstanding thermal
characteristics in a small footprint package, which is fully compatible with automated surface-mount assembly
procedures. Theexposedthermalpadontheundersideofthepackageisindirectcontactwiththedie. Bysimply
soldering the pad to the PWB copper and using other thermal outlets, the heat is conducted away from the
junction.
AVAILABLE OPTIONS
PACKAGED DEVICE
EVALUATION
†
T
A
PowerPAD TSSOP
(PWP)
MODULE
0°C to 70°C
THS6007CPWP
THS6007IPWP
THS6007EVM
–40°C to 85°C
†
The PWP packages are available taped and reeled. Add an R suffix to the device type (i.e.,
THS6007PWPR)
CAUTION: The THS6007 provides ESD protection circuitry. However, permanent damage can still occur if this device is subjected
to high-energy electrostatic discharges. Proper ESD precautions are recommended to avoid any performance degradation or loss
of functionality.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, V
to V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 V
CC–
CC+
Input voltage, V (driver and receiver) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V
I
CC
Output current, I (driver) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800 mA
O
Output current, I (receiver) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 mA
O
Differential input voltage, V (driver and receiver) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±4 V
ID
Maximum junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Continuous total power dissipation at (or below) T = 25°C (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . 4.48 W
Operating free air temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
Storage temperature, T
J
A
A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 125°C
stg
Lead temperature, 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The THS6007 incorporates a PowerPad on the underside of the chip. This acts as a heatsink and must be connected to a thermal
dissipation plane for proper power dissipation. Failure to do so can result in exceeding the maximum junction temperature, which could
permanently damage the device. See the Thermal Information section of this document for more information about PowerPad
technology.
recommended operating conditions
MIN
±4.5
9
TYP
MAX
±16
32
UNIT
V
Split supply
Supply voltage, V
and V
CC–
CC+
Single supply
Operating free-air temperature, T
–40
85
°C
A
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
functional block diagram
Driver 1
10
D V
+
CC
11
12
D1 IN+
D1 IN–
+
8
D1 OUT
_
7
D V
D V
–
+
CC
Driver 2
19
CC
18
17
+
D2 IN+
D2 IN–
21
22
D2 OUT
_
D V
–
CC
Receiver 1
28
1
R V
+
CC
3
2
+
_
R1 IN+
R1 IN–
R1 OUT
25
26
+
_
R2 IN+
R2 IN–
27
6
R2 OUT
R V
–
CC
Receiver 2
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
DRIVER
electrical characteristics, V
= ±15 V, R = 25 Ω, R = 1 kΩ, T = 25°C (unless otherwise noted)
CC
L
F
A
dynamic performance
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V = 200 mV,
G = 1,
R = 25 Ω
L
I
V
V
V
V
V
= ±15 V
= ±5 V
140
CC
CC
CC
CC
CC
R
= 680 Ω,
F
V = 200 mV,
G = 1,
R = 25 Ω
L
I
F
100
120
100
315
265
30
R
= 1 kΩ,
V = 200 mV,
G = 2,
R = 25 Ω
L
I
F
= ±15 V
= ±5 V
R
= 620 Ω,
Small-signal bandwidth (–3 dB)
MHz
V = 200 mV,
G = 2,
R = 820 Ω
F
I
L
R
= 25 Ω,
BW
V = 200 mV,
G = 1,
R = 100 Ω
L
I
F
= ±15 V
= ±15 V
R
= 820 Ω,
V = 200 mV,
G = 2,
R = 100 Ω
L
I
F
V
V
CC
R
= 560 Ω,
= ±5 V,
= 820 Ω
CC
R
F
Bandwidth for 0.1 dB flatness
V = 200 mV,
I
G = 1
MHz
MHz
V
R
= ±15 V,
= 680 Ω
CC
40
F
V
V
V
V
= ±15 V,
= ±5 V,
= ±15 V,
= ±5 V,
V
V
V
V
= 20 V
= 4 V
20
35
CC
CC
CC
CC
O(PP)
O(PP)
O
†
Full power bandwidth
= 20 V
,
G = 5
G = 2
G = 2
1300
900
70
(PP)
‡
SR
Slew rate
V/µs
= 5 V
,
(PP)
O
t
s
Settling time to 0.1%
0 V to 10 V Step,
ns
†
‡
Full power bandwidth = slew rate/2π V
.
O(Peak)
Slew rate is measured from an output level range of 25% to 75%.
noise/distortion performance
PARAMETER
TEST CONDITIONS
MIN
TYP
–65
–79
MAX
UNIT
V
V
= 20 V
= 2 V
V
= ±15 V,
R
= 680 Ω,
F
O(PP)
CC
G = 2,
f = 1 MHz
R = 680 Ω,
F
O(PP)
THD
Total harmonic distortion
dBc
V
= ±5 V,
CC
G = 2,
V
= 2 V
–76
1.7
O(PP)
f = 1 MHz
V
= ±5 V or ±15 V,
f = 10 kHz,
f = 10 kHz,
CC
G = 2,
V
n
Input voltage noise
nV/√Hz
pA/√Hz
Single-ended
= ±5 V or ±15 V,
Positive (IN+)
Negative (IN–)
11.5
16
V
G = 2
CC
I
n
Input noise current
V
CC
V
CC
V
CC
V
CC
= ±5 V
= ±15 V
= ±5 V
= ±15 V
0.04%
0.05%
0.07°
0.08°
G = 2,
NTSC,
40 IRE Modulation
A
Differential gain error
D
R
= 150 Ω,
L
G = 2,
= 150 Ω,
NTSC,
40 IRE Modulation
φ
D
Differential phase error
Crosstalk
R
L
Driver to driver V = 200 mV,
f = 1 MHz
–62
dB
I
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
DRIVER
electrical characteristics, V
(continued)
= ±15 V, R = 25 Ω, R = 1 kΩ, T = 25°C (unless otherwise noted)
CC
L
F
A
dc performance
†
PARAMETER
TEST CONDITIONS
MIN
TYP
1.5
5
MAX
UNIT
V
= ±5 V
CC
Open loop transresistance
MΩ
V
V
V
V
= ±15 V
CC
T
= 25°C
2
5
7
A
V
IO
Input offset voltage
= ±5 V or ±15 V
= ±5 V or ±15 V,
= ±5 V or ±15 V
mV
µV/°C
mV
CC
CC
CC
T
A
= full range
= full range
= 25°C
Input offset voltage drift
T
A
20
T
A
1.5
4
5
Differential input offset voltage
T
A
= full range
= 25°C
T
A
3
4
9
Negative
Positive
µA
µA
T
A
= full range
= 25°C
12
10
12
8
T
A
I
IB
Input bias current
V
V
= ±5 V or ±15 V
= ±5 V or ±15 V,
CC
T
A
= full range
= 25°C
T
A
1.5
10
Differential
µA
T
A
= full range
= full range
11
Differential input offset voltage drift
T
A
µV/°C
CC
NOTE: Full range = –40°C to 85°C
input characteristics
†
PARAMETER
TEST CONDITIONS
= ±5 V
MIN
TYP
MAX
UNIT
V
V
±3.6
±3.7
CC
V
ICR
Common-mode input voltage range
V
= ±15 V
±13.4 ±13.5
CC
Common-mode rejection ratio
Differential common-mode rejection ratio
Input resistance
62
70
100
300
1.4
CMRR
V
CC
= ±5 V or ±15 V,
T
A
= full range
dB
R
C
kΩ
I
I
Differential input capacitance
pF
NOTE: Full range = –40°C to 85°C
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
DRIVER
electrical characteristics, V
(continued)
= ±15 V, R = 25 Ω, R = 1 kΩ, T = 25°C (unless otherwise noted)
CC
L
F
A
output characteristics
†
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
3
to
–2.8
3.2
to
–3
V
CC
V
CC
V
CC
V
CC
= ±5 V
= ±15 V
= ±5 V
= ±15 V
Single ended
Differential
R
= 25 Ω
V
L
L
11.8
to
–11.5
12.5
to
–12.2
V
O
Output voltage swing
6
to
–5.6
6.4
to
–6
R
= 50 Ω
V
23.6
to
–23 –24.4
25
to
V
V
= ±5 V,
R
R
= 5 Ω
500
CC
L
L
I
I
Output current (see Note 2)
mA
O
= ±15 V,
= 25 Ω
400
500
800
13
CC
Short-circuit output current (see Note 2)
Output resistance
mA
OS
R
Open loop
Ω
O
NOTE 2: A heat sink is required to keep the junction temperature below absolute maximum when an output is heavily loaded or shorted. See
absolute maximum ratings and Thermal Information section.
power supply
†
PARAMETER
TEST CONDITIONS
Split supply
Single supply
MIN
±4.5
9
TYP
MAX
±16.5
33
UNIT
V
CC
Power supply operating range
V
V
= ±5 V
T
= full range
= 25°C
A
12
CC
CC
A
I
Quiescent current (each driver)
Power supply rejection ratio
T
11.5
–74
–72
13
mA
CC
V
= ±15 V
T
A
= full range
= 25°C
15
T
A
–68
–65
–64
–62
V
= ±5 V
dB
dB
CC
CC
T
A
= full range
= 25°C
PSRR
T
A
V
= ±15 V
T
A
= full range
NOTE: Full range = –40°C to 85°C
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
RECEIVER
electrical characteristics at T = 25°C, V
= ±15 V, R = 150 Ω (unless otherwise noted)
L
A
CC
dynamic performance
PARAMETER
TEST CONDITIONS
MIN
TYP
175
160
70
MAX
UNIT
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= ±15 V
CC
Gain = 1
Gain = –1
Gain = 1
MHz
= ±5 V
= ±15 V
= ±5 V
= ±15 V
= ±5 V
CC
Small-signal bandwidth (–3 dB)
Bandwidth for 0.1 dB flatness
CC
MHz
MHz
MHz
V/µs
ns
65
CC
BW
SR
35
CC
35
CC
= 20 V,
= 5 V,
V
V
= ±15 V
= ±5 V
2.7
7.1
230
170
43
O(pp)
O(pp)
CC
Full power bandwidth
CC
= ±15 V,
= ±5 V,
= ±15 V,
= ±5 V,
= ±15 V,
= ±5 V,
20-V step
5-V step
5-V step
2-V step
5-V step
2-V step
Gain = 5
Gain = 1
CC
CC
CC
CC
CC
CC
Slew rate
Settling time to 0.1%
Gain = –1
Gain = –1
30
t
s
233
280
Settling time to 0.01%
ns
†
‡
Full power bandwidth = slew rate/2π V
.
O(Peak)
Slew rate is measured from an output level range of 25% to 75%.
noise/distortion performance
PARAMETER
TEST CONDITIONS
MIN
TYP
–79
–77
10
MAX
UNIT
V
V
= ±15 V
= ±5 V
R
R
= 1 kΩ
= 1 kΩ
V
= 2 V,
CC
L
L
O(pp)
f = 1 MHz, Gain = 2
THD
Total harmonic distortion
dBc
CC
V
n
Input voltage noise
V
CC
V
CC
V
CC
= ±5 V or ±15 V, f = 10 kHz
= ±5 V or ±15 V, f = 10 kHz
= ±5 V or ±15 V, f = 1 MHz
nV/√Hz
pA/√Hz
dB
I
n
Input current noise
0.7
X
T
Receiver-to-receiver crosstalk
–75
dc performance
PARAMETER
TEST CONDITIONS
MIN
10
9
TYP
MAX
UNIT
T
= 25°C
19
A
V
V
= ±15 V,
= ±5 V,
V
= ±10 V,
= ±2.5 V,
R
= 1 kΩ
V/mV
CC
O
L
L
T
A
= full range
= 25°C
Open loop gain
T
A
8
16
1
V
R
= 250 Ω
V/mV
CC
O
T
A
= full range
= 25°C
7
T
A
7
8
V
OS
Input offset voltage
Offset voltage drift
Input bias current
mV
µV/°C
µA
T
= full range
= full range
= 25°C
A
A
T
A
15
V
CC
= ±5 V or ±15 V
T
1.2
6
8
I
I
IB
T
A
= full range
= 25°C
T
A
20
250
400
Input offset current
Offset current drift
nA
OS
T
A
= full range
T
A
= full range
0.3
nA/°C
NOTE: Full range = –40°C to 85°C
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
RECEIVER
electrical characteristics at T = 25°C, V = ±15 V, R = 150 Ω (unless otherwise noted) (continued)
A
CC
L
input characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
CC
V
CC
V
CC
V
CC
= ±15 V
= ±5 V
±13.8 ±14.1
V
Common-mode input voltage range
V
ICR
±3.8
78
±3.9
93
= ±15 V,
= ±5 V,
V
V
= ±12 V,
= ±2 V,
T
= full range
= full range
dB
dB
ICR
A
CMRR Common mode rejection ratio
T
A
84
90
ICR
R
C
Input resistance
1
MΩ
pF
I
I
Input capacitance
1.5
NOTE: Full range = –40°C to 85°C
output characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
V
V
V
V
V
V
= ±15 V
= ±5 V
R
R
= 250 Ω
= 150 Ω
±12 ±13.6
±3.4 ±3.8
±13 ±13.8
CC
CC
CC
CC
CC
CC
CC
L
L
V
V
I
Output voltage swing
O
= ±15 V
= ±5 V
R
R
= 1 kΩ
= 20 Ω
V
L
L
±3.5
65
±3.9
85
= ±15 V
= ±5 V
†
mA
Output current
O
50
70
†
I
Short-circuit current
Output resistance
= ±15 V
100
mA
SC
R
Open loop
13
Ω
O
†
Observe power dissipation ratings to keep the junction temperature below the absolute maximum rating when the output is heavily loaded or
shorted. See the absolute maximum ratings section of this data sheet for more information.
power supply
PARAMETER
TEST CONDITIONS
MIN
±4.5
9
TYP
MAX
±16.5
33
UNIT
Dual supply
V
Supply voltage operating range
Supply current (per amplifier)
V
CC
Single supply
T
= 25°C
3.4
2.9
90
4.2
A
V
= ±15 V
= ±5 V
CC
T
A
= full range
= 25°C
5
I
mA
dB
CC
T
A
3.7
V
V
CC
T
A
= full range
= full range
4.5
PSRR Power supply rejection ratio
= ±5 V or ±15 V
T
A
79
CC
NOTE: Full range = –40°C to 85°C
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
PARAMETER MEASUREMENT INFORMATION
1 kΩ
1 kΩ
1 kΩ
1 kΩ
–
+
–
+
Driver 1
Driver 2
V
O
V
O
V
I
V
I
25 Ω
25 Ω
50 Ω
50 Ω
Figure 1. Driver Input-to-Output Crosstalk Test Circuit
1 kΩ
1 kΩ
1 kΩ
1 kΩ
–
+
–
+
Receiver 1
Receiver 2
V
O
V
O
V
I
V
I
150 Ω
150 Ω
50 Ω
50 Ω
Figure 2. Receiver Input-to-Output Crosstalk Test Circuit
R
R
f
g
15 V
–
Driver
V
O
+
V
I
R
25 Ω
L
50 Ω
–15 V
Figure 3. Driver Test Circuit, Gain = 1 + (R /R )
f
g
R
R
f
g
15 V
–
Receiver
V
O
V
I
+
R
150 Ω
L
50 Ω
–15 V
Figure 4. Receiver Test Circuit, Gain = 1 + (R /R )
f
g
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
5
vs Supply voltage
Peak-to-peak output voltage
Driver
vs Load resistance
vs Free-air temperature
vs Free-air temperature
vs Free-air temperature
vs Frequency
6
V
Input offset voltage
Input bias current
Driver
Driver
Driver
Driver
Driver
Driver
7
IO
I
IB
8
CMMR Common-mode rejection ratio
9
Driver-to-driver crosstalk
10
PSSR
Power supply rejection ratio
vs Free-air temperature
vs Frequency
11
Closed-loop output impedance
12
vs Supply voltage
vs Free-air temperature
vs Output step
13
I
Supply current
Driver
CC
14
SR
Slew rate
Driver
Driver
Driver
Driver
Driver
Driver
Driver
Driver
15, 16
17
V
Input voltage and current noise
Normalized frequency response
Output amplitude
vs Frequency
n
vs Frequency
18, 19
20 – 23
24 – 27
28, 29
30, 31
32, 33
34, 35
36, 37
38
vs Frequency
Normalized output response
Small and large signal frequency response
vs Frequency
vs Frequency
Single-ended harmonic distortion
Differential gain and phase
vs Output voltage
vs DC input offset voltage
vs Number of 150-Ω loads
Driver
400-mV step response
10-V step response
Driver
Driver
39
20-V step response
Driver
40
Driver-to-receiver crosstalk
Receiver-to-driver crosstalk
Power supply rejection ratio
Open loop gain and phase response
Receiver-to-receiver crosstalk
Total harmonic distortion
Settling
Receiver
Receiver
Receiver
Receiver
Receiver
Receiver
Receiver
Receiver
vs Frequency
vs Frequency
vs Frequency
vs Frequency
vs Frequency
vs Frequency
vs Output step
vs Frequency
vs Output voltage
vs Frequency
vs Frequency
41
42
43
44
45
THD
46, 47
48
PSSR
Power supply rejection ratio
49
50, 51
52 – 55
56 – 67
68, 70
69
Distortion
Receiver
Output amplitude
2-V step response
5-V step response
20-V step response
Input offset voltage
Input bias current
Receiver
Receiver
Receiver
Receiver
Receiver
Receiver
71
V
IO
vs Free-air temperature
vs Free-air temperature
vs Supply voltage
72
I
IB
73
74
V
O
Output voltage
Receiver
vs Free-air temperature
vs Supply voltage
75
V
ICR
Common-mode input voltage
Supply current
Receiver
Receiver
Receiver
76
I
vs Supply voltage
77
CC
V
I
Voltage and current noise
vs Frequency
78
n, n
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
TYPICAL CHARACTERISTICS (DRIVER)
PEAK-TO-PEAK OUTPUT VOLTAGE
INPUT OFFSET VOLTAGE
vs
PEAK-TO-PEAK OUTPUT VOLTAGE
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
LOAD RESISTANCE
15
10
5
15
10
2
1
T
R
R
= 25°C
= 1 kΩ
= 25 Ω
A
F
L
G = 1
V
= ±15 V
CC
R
= 1 kΩ
F
V
= ±5 V
Gain = 1
CC
0
V
= ±5 V
= ±5 V
CC
CC
5
0
T
R
= 25°C
= 1 kΩ
Gain = 1
–1
–2
–3
A
F
0
V
= ±15 V
CC
–5
–10
–15
–5
–10
–15
V
–4
–5
V
= ±15 V
CC
5
6
7
8
9
10 11 12 13 14 15
10
100
1000
–40 –20
0
20
40
60
80 100
R
L
– Load Resistance – Ω
V
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
CC
Figure 5
Figure 6
Figure 7
INPUT BIAS CURRENT
vs
COMMON-MODE REJECTION RATIO
DRIVER-TO-DRIVER CROSSTALK
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
FREQUENCY
5
4
3
–20
–30
–40
–50
–60
–70
–80
–90
80
G = 1
= 1 kΩ
V
I
= ±15 V
CC
IB+
V
V
= ± 15 V
CC
= 200 mV
R
F
I
75
70
V
I
= ±5 V
CC
IB+
Input = Driver 1
Output = Driver 2
V
= ±15 V
CC
2
1
0
1 kΩ
V
= ±5 V
1 kΩ
1 kΩ
CC
V
I
= ±15 V
V
= ±5 V
CC
IB–
–
+
CC
V
O
65
60
V
I
Input = Driver 2
Output = Driver 1
I
IB–
1 kΩ
–40 –20
0
20
40
60
80
100
100k
1M
10M
100M
–40 –20
0
20
40
60
80
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
f – Frequency – Hz
Figure 9
Figure 10
Figure 8
POWER SUPPLY REJECTION RATIO
CLOSED-LOOP OUTPUT IMPEDANCE
vs
SUPPLY CURRENT
vs
vs
FREE-AIR TEMPERATURE
FREQUENCY
SUPPLY VOLTAGE
100
12
11
10
95
V
R
= ±15 V
CC
= 1 kΩ
G = 1
= 1 kΩ
T
R
= 25°C
= 1 kΩ
Gain = +1
A
F
R
F
F
90
85
80
75
Gain = 2
10
1
T
= 25°C
A
V
= 1 V
I(PP)
9
V
= 15 V
= –5 V
CC
V
= 5 V
CC
8
7
6
5
V
0.1
O
1 kΩ
V
1 kΩ
CC
1 kΩ
–
V
I
+
0.01
1000
V
= –15 V
CC
70
65
50 Ω
V
I
Z
=
– 1
o
)
(
V
O
0.001
5
6
7
8
9
10 11 12 13 14 15
–40 –20
0
20
40
60
80
100
100k
1M
10M
100M
500M
f – Frequency – Hz
± V
– Supply Voltage – V
CC
T
A
– Free-Air Temperature – °C
Figure 12
Figure 13
Figure 11
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
TYPICAL CHARACTERISTICS (DRIVER)
SLEW RATE
SLEW RATE
vs
SUPPLY CURRENT
vs
vs
OUTPUT STEP
OUTPUT STEP
FREE-AIR TEMPERATURE
1500
1000
900
800
700
600
500
400
300
200
100
13
12
10
8
V
= ± 15V
CC
Gain = 5
V
= ± 5V
CC
Gain = 2
V
= ±15 V
CC
1300
1100
+SR
+SR
R
R
= 1 kΩ
= 25 Ω
F
L
R
R
= 1 kΩ
F
L
= 25 Ω
–SR
V
= ±5 V
–SR
CC
900
700
6
500
300
4
2
0
100
0
20
–40 –20
0
20
40
60
80
100
5
10
15
0
5
1
2
3
4
Output Step (Peak–To–Peak) – V
Output Step (Peak–To–Peak) – V
T
A
– Free-Air Temperature – °C
Figure 15
Figure 16
Figure 14
INPUT VOLTAGE AND CURRENT NOISE
NORMALIZED FREQUENCY RESPONSE
vs
vs
FREQUENCY
FREQUENCY
100
2
100
V
T
A
= ±15 V
CC
= 25°C
R
= 300 Ω
1
F
0
–1
–2
–3
R
R
= 510 Ω
I
Noise
Noise
F
F
n–
= 750 Ω
= 1 kΩ
10
10
I
n+
R
F
–4
–5
–6
V
= ±15 V
CC
V = 200 mV
I
R
= 25 Ω
V
Noise
L
n
Gain = 1
T
A
–7
–8
= 25°C
1
10
1
100k
100
1k
10k
100
1M
10M
100M
500M
f – Frequency – Hz
f – Frequency – Hz
Figure 18
Figure 17
OUTPUT AMPLITUDE
vs
OUTPUT AMPLITUDE
vs
NORMALIZED FREQUENCY RESPONSE
vs
FREQUENCY
FREQUENCY
FREQUENCY
3
2
9
8
2
R
= 360 Ω
F
1
0
R
= 620 Ω
F
R
= 510 Ω
F
7
6
5
1
0
–1
–2
–3
–4
–5
–1
R
= 470 Ω
F
R
= 1 kΩ
R = 820 Ω
F
F
–2
–3
–4
–5
–6
4
3
2
1
0
R
= 1.5 kΩ
R
= 1.2 kΩ
F
F
R
= 620 Ω
–6
–7
F
V
V
R
= ±15 V
CC
in
L
V
= ± 5 V
CC
V
= ± 5 V
= 200 mV
= 25 Ω
CC
Gain = 2
= 25 Ω
Gain = 1
= 25 Ω
–8
R
R
Gain = 2
T
A
L
I
L
–9
V = 200 mV
R
= 1 kΩ
V = 200 mV
= 25°C
F
I
–10
100K
100k
1M
10M
100M
500M
100k
1M
10M
100M
500M
1M
10M
100M 500M
f – Frequency – Hz
f – Frequency – Hz
f – Frequency – Hz
Figure 20
Figure 21
Figure 19
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
TYPICAL CHARACTERISTICS (DRIVER)
NORMALIZED OUTPUT RESPONSE
vs
OUTPUT AMPLITUDE
vs
OUTPUT AMPLITUDE
vs
FREQUENCY
FREQUENCY
FREQUENCY
1
70
60
70
60
50
40
30
20
10
0
R
= 200 Ω
L
Gain = 1000
Gain = 1000
0
–1
–2
–3
–4
50
40
30
20
10
0
Gain = 100
Gain = 100
R
= 100 Ω
= 50 Ω
L
R
L
R
= 25 Ω
L
–5
–6
V
R
= ±15 V
CC
= 1 kΩ
V
= ± 5 V
CC
G
L
V
R
R
= ± 5 V
CC
–7
–8
–9
R
R
V
=10 Ω
= 25 Ω
= 2 V
F
=10 Ω
= 25 Ω
= 2 V
G
L
O
Gain = 1
V = 200 mV
I
O
V
–10
100k
–10
100k
100k
1M
10M
100M
500M
1M
10M
100M
500M
1M
10M
100M
500M
f – Frequency – Hz
f – Frequency – Hz
f – Frequency – Hz
Figure 23
Figure 24
Figure 22
NORMALIZED OUTPUT RESPONSE
vs
NORMALIZED OUTPUT RESPONSE
vs
NORMALIZED OUTPUT RESPONSE
vs
FREQUENCY
FREQUENCY
FREQUENCY
3
1
3
0
2
R
= 620 Ω
R
= 430 Ω
2
1
F
F
–1
1
0
R
= 820 Ω
F
–2
–3
–4
0
–1
–2
–1
–2
R
= 1 kΩ
F
R
R
= 25 Ω
= 200 Ω
= 100 Ω
R
= 620 Ω
= 1 kΩ
L
L
F
–5
–6
–7
–3
–4
–5
R
–3
–4
–5
–6
F
R
L
V
R
= ±15 V
= 100 Ω
R
= 50 Ω
V
R
= ±15 V
= 100 Ω
Gain = 2
CC
L
L
V
R
= ±15 V
CC
L
CC
= 1 kΩ
F
Gain = 1
V = 200 mV
I
Gain = 2
V = 200 mV
I
–8
–9
–6
–7
V = 200 mV
I
100k
1M
10M
100M
500M
100k
1M
10M
100M
500M
100k
1M
10M
100M
500M
f – Frequency – Hz
f – Frequency – Hz
f – Frequency – Hz
Figure 26
Figure 27
Figure 25
SINGLE–ENDED HARMONIC DISTORTION
vs
SMALL AND LARGE SIGNAL
FREQUENCY RESPONSE
SMALL AND LARGE SIGNAL
FREQUENCY RESPONSE
FREQUENCY
3
0
–3
–6
–40
V = 500 mV
I
V = 500 mV
I
V
= ± 15 V
CC
Gain = 2
–50
–60
R
R
V
= 680 Ω
–3
–6
–9
–9
–12
–15
F
L
V = 250 mV
I
= 25 Ω
= 2V
V = 250 mV
I
O(PP)
V = 125 mV
I
V = 125 mV
I
–70
–80
–12
–15
–18
–21
–24
–18
–21
–24
–27
–30
2nd Harmonic
V = 62.5 mV
I
V = 62.5 mV
I
3rd Harmonic
Gain = 2
Gain = 1
–90
V
= ± 15 V
= 680 Ω
= 25 Ω
V
R
R
= ± 15 V
= 820 Ω
= 25 Ω
CC
CC
R
R
F
L
F
L
–100
100k
1M
10M
100M
500M
100k
1M
10M
100k
1M
10M
100M 500M
f – Frequency – Hz
f – Frequency – Hz
f – Frequency – Hz
Figure 29
Figure 30
Figure 28
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
TYPICAL CHARACTERISTICS (DRIVER)
SINGLE–ENDED HARMONIC DISTORTION SINGLE–ENDED HARMONIC DISTORTION SINGLE–ENDED HARMONIC DISTORTION
vs
vs
vs
FREQUENCY
OUTPUT VOLTAGE
OUTPUT VOLTAGE
–50
–60
–70
–80
–50
–60
–40
–50
V
= ± 15 V
Gain = 2
= 680 Ω
CC
V
= ± 5 V
Gain = 2
= 680 Ω
= 25 Ω
V
= ± 5 V
CC
CC
Gain = 2
= 680 Ω
= 25 Ω
f = 1 MHz
R
R
F
L
R
R
V
R
R
F
L
F
L
= 25 Ω
f = 1 MHz
2nd Harmonic
= 2V
–60
–70
O(PP)
3rd Harmonic
3rd Harmonic
2nd Harmonic
–80
–80
–90
2nd Harmonic
–90
–90
3rd Harmonic
15
–100
–100
–100
5
10
20
1
2
3
4
0
100k
1M
10M
V
– Output Voltage – V
V
– Output Voltage – V
f – Frequency – Hz
O(PP)
O(PP)
Figure 32
Figure 33
Figure 31
DIFFERENTIAL GAIN AND PHASE
vs
DIFFERENTIAL GAIN AND PHASE
vs
DC INPUT OFFSET VOLTAGE
DC INPUT OFFSET VOLTAGE
0.05
0.04
0.03
0.02
0.01
0
0.10
0.08
0.06
0.05
0.04
0.03
0.02
0.01
0
0.10
0.08
0.06
0.04
0.02
0
V
R
R
= ±15 V
= 150 Ω
= 1 kΩ
CC
L
F
V
R
R
= ±5 V
= 150 Ω
= 1 kΩ
CC
L
F
Gain
f = 3.58 MHz
Gain = 2
f = 3.58 MHz
Gain = 2
40 IRE Modulation
40 IRE Modulation
Phase
Gain
0.04
0.02
0
Phase
–0.7 –0.5 –0.3 –0.1 0.1
0.3
0.5 0.7
–0.7 –0.5 –0.3 –0.1 0.1 0.3
0.5 0.7
DC Input Offset Voltage – V
DC Input Offset Voltage – V
Figure 35
Figure 34
DIFFERENTIAL GAIN AND PHASE
vs
DIFFERENTIAL GAIN AND PHASE
vs
NUMBER OF 150-Ω LOADS
NUMBER OF 150-Ω LOADS
0.15
0.12
0.09
0.06
0.03
0
0.25
0.15
0.12
0.09
0.06
0.03
0
0.25
0.20
V
R
= ±15 V
CC
= 1 kΩ
V
R
= ±5 V
CC
= 1 kΩ
F
F
Gain = 2
Gain = 2
0.20
0.15
0.10
f = 3.58 MHz
40 IRE Modulation
100 IRE Ramp
f = 3.58 MHz
40 IRE Modulation
100 IRE Ramp
0.15
0.10
Phase
Gain
Gain
0.05
0
0.05
0
Phase
6
1
2
3
4
5
6
7
8
1
2
3
4
5
7
8
Number of 150-Ω Loads
Number of 150-Ω Loads
Figure 37
Figure 36
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
TYPICAL CHARACTERISTICS (DRIVER)
400-mV STEP RESPONSE
10-V STEP RESPONSE
20-V STEP RESPONSE
400
300
200
100
0
8
6
16
12
8
4
2
4
0
0
V
= ±15 V
–100
–200
–2
–4
CC
Gain = 2
V
= ±15 V
V
= ±15 V
–4
–8
CC
Gain = 2
CC
Gain = 5
R
R
= 25 Ω
= 1 kΩ
L
F
R
R
= 25 Ω
= 1 kΩ
R
R
= 25 Ω
= 2 kΩ
L
F
L
F
t /t = 300 ps
r f
t /t = 5 ns
r f
t /t = 5 ns
r f
–300
–400
–6
–8
–12
–16
0
50 100 150 200 250 300 350 400 450 500
0
50 100 150 200 250 300 350 400 450 500
0
50 100 150 200 250 300 350 400 450 500
t – Time – ns
t – Time – ns
t – Time – ns
Note: See Figure 3
Note: See Figure 3
Note: See Figure 3
Figure 39
Figure 40
Figure 38
DRIVER-TO-RECEIVER CROSSTALK
RECEIVER-TO-DRIVER CROSSTALK
POWER SUPPLY REJECTION RATIO
vs
vs
vs
FREQUENCY
FREQUENCY
FREQUENCY
–20
–30
–40
–50
–60
–70
–80
–90
–20
–30
–40
–50
–60
–70
–80
–90
80
70
60
V
V
= ± 15 V
V
V
= ± 15 V
= 200 mV rms
CC
= 200 mV rms
V
= ±15 V or ± 5 V
CC
I
CC
I
Both Channels
See Figure 1
Input = Driver 1
Output = Receiver 2
Input = Receiver 1 or Receiver 2
Output = Driver 1
50
40
Input = Driver 2
Output = Receiver 2
Input = Receiver 1 or Receiver 2
Output = Driver 2
Input = Driver 1
Output = Receiver 2
Input = Driver 1
Output = Receiver 1
30
20
10
0
100k
1M
10M
100M
100k
1M
10M
100M
10 k
100 k
1 M
10 M
100 M
f – Frequency – Hz
f – Frequency – Hz
f – Frequency – Hz
Figure 42
Figure 41
Figure 43
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
TYPICAL CHARACTERISTICS (RECEIVER)
OPEN LOOP GAIN & PHASE RESPONSE
RECEIVER-TO-RECEIVER CROSSTALK
vs
vs
FREQUENCY
FREQUENCY
100.00
45°
0°
–20
V
V
= ± 15 V
CC
= 200 mV rms
–30
–40
–50
–60
–70
–80
–90
I
80.00
60.00
40.00
20.00
0.00
Gain
–45°
90°
Phase
Input = Receiver 2
Output = Receiver 1
135°
180°
Input = Receiver 1
Output = Receiver 2
V
= ±5 V and ±15 V
CC
1k
–225°
–20.00
100
10k 100k 1M 10M 100M 1G
100k
1M
10M
100M
f – Frequency – Hz
f – Frequency – Hz
Figure 44
Figure 45
SETTLING
TOTAL HARMONIC DISTORTION
TOTAL HARMONIC DISTORTION
vs
vs
vs
OUTPUT STEP
FREQUENCY
FREQUENCY
–40
–50
–60
–70
–80
–90
–100
–40
–50
–60
–70
–80
–90
–100
330
290
250
210
170
130
90
V
= ± 15 V
V
= ± 5 V
CC
Gain = 2
CC
Gain = 2
V
= 2 V
V
= 2 V
O(PP)
O(PP)
R
= 150 Ω
R
= 150 Ω
V
= ±5 V(0.01%)
CC
L
L
V
= ±15 V(0.01%)
CC
R
= 1 kΩ
L
V
= ±5 V(0.1%)
CC
R
= 1 kΩ
L
V
= ±15 V(0.1%)
CC
50
10
2
3
4
5
100k
1M
10M
100k
1M
10M
f - Frequency - Hz
f - Frequency - Hz
V
– Output Step Voltage – V
O
Figure 46
Figure 47
Figure 48
POWER SUPPLY REJECTION
DISTORTION
vs
OUTPUT VOLTAGE
DISTORTION
vs
OUTPUT VOLTAGE
RATIO
vs
FREQUENCY
–50
–50
–60
0
–20
2nd Harmonic
V
= ± 15 V & ± 5 V
CC
2nd Harmonic
–60
–70
–V
CC
3rd Harmonic
3rd Harmonic
–70
–40
+V
CC
–80
–80
–60
V
R
= ± 15 V
V
= ± 15 V
R = 150 Ω
L
CC
= 1 kΩ
CC
–90
–90
–80
L
Gain = 5
Gain = 5
f = 1 MHz
f = 1 MHz
–100
–100
–100
0
5
10
15
20
0
5
10
15
20
100k
1M
10M
100M
f - Frequency - Hz
V
– Output Voltage – V
V
– Output Voltage – V
O
O
Figure 49
Figure 50
Figure 51
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
TYPICAL CHARACTERISTICS (RECEIVER)
DISTORTION
vs
DISTORTION
vs
DISTORTION
vs
FREQUENCY
FREQUENCY
FREQUENCY
–50
–60
–50
–60
–50
–60
V
R
= ± 15 V
V
R
= ± 5 V
V
= ± 15 V
CC
= 1 kΩ
CC
= 1 kΩ
CC
R = 150 Ω
L
L
L
Gain = 2
= 2 V
Gain = 2
= 2 V
Gain = 2
V = 2 V
V
V
O(PP)
O(PP)
O(PP)
3rd Harmonic
–70
–70
–70
2nd Harmonic
2nd Harmonic
2nd Harmonic
–80
–80
–80
3rd Harmonic
–90
–90
–90
3rd Harmonic
–100
–100
–100
100k
1M
10M
100k
1M
10M
100k
1M
10M
f – Frequency – Hz
f – Frequency – Hz
Figure 53
f – Frequency – Hz
Figure 52
Figure 54
OUTPUT AMPLITUDE
vs
OUTPUT AMPLITUDE
vs
DISTORTION
vs
FREQUENCY
FREQUENCY
FREQUENCY
–50
–60
4
4
V
R
= ± 5 V
CC
= 150 Ω
Gain = 2
= 2 V
L
R
= 130 Ω
F
R
= 51 Ω
= 0 Ω
F
2
0
2
0
V
O(PP)
R
= 51 Ω
R
= 130 Ω
F
F
3rd Harmonic
–70
R
R
= 0 Ω
F
F
2nd Harmonic
–80
–2
–4
–6
–2
–4
–6
V
= ± 15 V
V
= ± 5 V
CC
Gain = 1
= 150 Ω
CC
Gain = 1
–90
R
V
R
= 150 Ω
L
L
= 63 mV
V
= 63 mV
O(PP)
O(PP)
–100
100k
1M
10M
100k
1M
10M 100M 1G
100k
1M
10M 100M 1G
f – Frequency – Hz
f - Frequency - Hz
f - Frequency - Hz
Figure 55
Figure 56
Figure 57
OUTPUT AMPLITUDE
vs
OUTPUT AMPLITUDE
vs
OUTPUT AMPLITUDE
vs
FREQUENCY
FREQUENCY
FREQUENCY
2
2
2
R
= 51 Ω
F
R = 1.3 kΩ
F
R
= 51 Ω
F
R
= 2 kΩ
F
0
–2
–4
–6
–8
0
–2
–4
–6
–8
0
–2
–4
–6
–8
R
= 1 kΩ
F
R
= 0 Ω
R
= 0 Ω
F
F
V
= ± 15 V
V
= ± 5 V
V
= ± 15 V
CC
Gain = 1
CC
Gain = 1
= 1 kΩ
CC
Gain = –1
R = 150 Ω
L
R
V
= 1 kΩ
R
V
L
L
= 63 mV
= 63 mV
V
= 63 mV
O(PP)
O(PP)
O(PP)
100k
1M
10M 100M 1G
100k
1M
10M 100M 1G
100k
1M
10M 100M 1G
f - Frequency - Hz
f - Frequency - Hz
f - Frequency - Hz
Figure 58
Figure 59
Figure 60
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
TYPICAL CHARACTERISTICS (RECEIVER)
OUTPUT AMPLITUDE
vs
OUTPUT AMPLITUDE
vs
OUTPUT AMPLITUDE
vs
FREQUENCY
FREQUENCY
FREQUENCY
2
0
2
0
2
0
R
= 1.3 kΩ
R = 1.5 kΩ
F
F
R
= 1.5 kΩ
F
R
= 2 kΩ
R
= 2 kΩ
F
F
R
= 1.3 kΩ
R = 1.3 kΩ
F
F
R
= 1 kΩ
F
–2
–4
–6
–8
–2
–4
–6
–8
–2
–4
–6
–8
V
= ± 5 V
V
= ± 15 V
V
= ± 5 V
CC
CC
Gain = –1
= 1 kΩ
CC
Gain = –1
R = 1 kΩ
L
Gain = –1
R
V
= 150 Ω
R
V
L
L
= 63 mV
= 63 mV
V
= 63 mV
O(PP)
O(PP)
O(PP)
100k
1M
10M 100M 1G
100k
1M
10M 100M 1G
100k
1M
10M 100M 1G
f - Frequency - Hz
f - Frequency - Hz
f - Frequency - Hz
Figure 61
Figure 62
Figure 63
OUTPUT AMPLITUDE
vs
OUTPUT AMPLITUDE
vs
OUTPUT AMPLITUDE
vs
FREQUENCY
FREQUENCY
FREQUENCY
8
8
8
R = 1.2 kΩ
F
R
= 1.2 kΩ
R
= 1.5 kΩ
F
F
R
= 1.5 kΩ
F
R
= 1.5 kΩ
F
6
4
6
4
6
4
R
= 1.2 kΩ
F
R
= 750 Ω
F
R
= 750 Ω
F
2
2
2
V
= ± 15 V
V
= ± 5 V
V
= ± 15 V
CC
Gain = 2
= 150 Ω
CC
CC
Gain = 2
R = 1 kΩ
L
0
0
0
Gain = 2
R
R
= 150 Ω
L
L
V
= 126 mV
V
= 126 mV
V
= 126 mV
O(PP)
O(PP)
O(PP)
–2
–2
–2
100k
1M
10M 100M 1G
100k
1M
100k
1M
10M 100M 1G
10M
100M
1G
f - Frequency - Hz
f - Frequency - Hz
f - Frequency - Hz
Figure 64
Figure 65
Figure 66
OUTPUT AMPLITUDE
vs
FREQUENCY
2-V STEP RESPONSE
5-V STEP RESPONSE
8
1.2
3
V
= ± 5 V
CC
Gain = 2
R
= 1.2 kΩ
F
0.8
0.4
2
1
R
R
= 1.2 kΩ
= 150 Ω
6
4
F
L
R
= 1.5 kΩ
F
0.0
0
2
–0.4
–0.8
–1.2
–1
–2
–3
V
= ± 5 V
CC
Gain = –1
V
= ± 5 V
CC
Gain = 2
0
R
R
= 1.3 kΩ
= 150 Ω
F
L
R
V
= 1 kΩ
L
= 126 mV
O(PP)
–2
100k
1M
10M 100M 1G
0
200
400
600
800
1000
0
200
400
600
800
1000
f - Frequency - Hz
t - Time - ns
t - Time - ns
Figure 67
Figure 68
Figure 69
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
TYPICAL CHARACTERISTICS (RECEIVER)
INPUT OFFSET VOLTAGE
vs
FREE-AIR TEMPERATURE
2-V STEP RESPONSE
20-V STEP RESPONSE
1.2
1.0
12
10
8
1.5
1.3
1.1
0.9
0.7
0.5
0.3
V
= ± 15 V
V
= ± 15 V
CC
Gain = 2
CC
Gain = 5
0.8
R
R
= 1.2 kΩ
= 150 Ω
R
R
= 1.2 kΩ
= 150 Ω
F
L
F
L
V
= ± 15 V
0.6
6
CC
0.4
4
0.2
2
–0.0
–0.2
–0.4
–0.6
–0.8
–1.0
–1.2
0
–2
–4
–6
–8
–10
–12
V
= ± 5 V
CC
0
200
400
600
800
1000
0
200
400
600
800
1000
–40 –20
0
20
40
60
80 100
t - Time - ns
t - Time - ns
T
- Free-Air Temperature - °C
A
Figure 70
Figure 71
Figure 72
OUTPUT VOLTAGE
vs
INPUT BIAS CURRENT
vs
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
15
13
11
9
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
15
13
11
9
T
=25°C
A
V
R
= ± 15 V
= 150 Ω
CC
L
V
R
= ± 15 V
CC
= 1 kΩ
R
= 1 kΩ
V
= ±15 V
L
L
CC
7
V
R
= ± 5 V
= 1 kΩ
R
= 150 Ω
CC
L
L
7
5
V
= ± 5 V
CC
5
3
V
R
= ± 5 V
CC
= 150 Ω
L
1
3
–40 –20
0
20
40
60
80 100
–40 –20
0
20
40
60
80 100
5
7
9
11
13
15
T
– Free-Air Temperature – C
T
- Free-Air Temperature - °C
±V
- Supply Voltage - V
CC
A
A
Figure 73
Figure 74
Figure 75
COMMON-MODE INPUT VOLTAGE
SUPPLY CURRENT
vs
VOLTAGE AND CURRENT NOISE
vs
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
FREQUENCY
15
13
11
9
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
100
10
V
= ± 15 V and ± 5 V
CC
= 25°C
T
=25°C
A
T
A
T
=85°C
A
V
N
T
=25°C
A
I
7
N
1
T
=–40°C
A
5
0.1
3
5
7
9
11
13
15
5
7
9
11
13
15
10
100
1k
10k
100k
±V
- Supply Voltage - V
± V
- Supply Voltage - V
f - Frequency - Hz
CC
CC
Figure 76
Figure 77
Figure 78
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
ADSL
TheTHS6007wasprimarilydesignedasalinedriverandlinereceiverforADSL(asymmetricaldigitalsubscriber
line). The driver output stage has been sized to provide full ADSL power levels of 20 dBm onto the telephone
lines. Although actual driver output peak voltages and currents vary with each particular ADSL application, the
THS6007 is specified for a minimum full output current of 400 mA at its full output voltage of approximately 12
V. ThisperformancemeetsthedemandingneedsofADSLatthecentralofficeendofthetelephoneline. Atypical
ADSL schematic is shown in Figure 79.
15 V
+
THS6007
Driver 1
0.1 µF
6.8 µF
12.5 Ω
+
_
V
I+
1:2
680 Ω
To Telephone Line
100 Ω
0.1 µF
6.8 µF
+
–15 V
15 V
1 kΩ
15 V
220 Ω
+
2 kΩ
1 kΩ
THS6007
Driver 2
0.1 µF
6.8 µF
0.1 µF
12.5 Ω
+
V
I–
–
+
_
V
O+
THS6007
Receiver 1
680 Ω
1 kΩ
2 kΩ
1 kΩ
0.1 µF
6.8 µF
+
–15 V
–
+
V
O–
THS6007
Receiver 2
0.1 µF
–15 V
Figure 79. Typical THS6007 ADSL Application
20
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THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
ADSL (continued)
The ADSL transmit band consists of 255 separate carrier frequencies each with its own modulation and
amplitude level. With such an implementation, it is imperative that signals put onto the telephone line have as
low a distortion as possible. This is because any distortion either interferes directly with other ADSL carrier
frequencies or it creates intermodulation products that interfere with ADSL carrier frequencies.
The THS6007 has been specifically designed for ultralow distortion by careful circuit implementation and by
taking advantage of the superb characteristics of the complementary bipolar process. Driver single-ended
harmonic distortion measurements are shown in Figures 30 and 31. It is commonly known that in the differential
driver configuration, the second order harmonics tend to be reduced by 6 dB or more. Thus, the dominant total
harmonic distortion (THD) will be primarily due to the third order harmonics. For this test, the load was 25 Ω and
the output signal produced a 2 V
signal. Thus, the test was run at full signal and full load conditions.
O(PP)
Another significant point is the fact that distortion decreases as the impedance load increases. This is because
the output resistance of the amplifier becomes less significant as compared to the output load resistance.
ADSL receive line noise
Per ANSI T1.413, the receive noise power spectral density for an ADSL line is –140 dBm/√Hz. This results in
a voltage noise requirement of less than 31.6 nV/√Hz for the receiver in an ADSL system with a 1:1 transformer
ratio.
Noise Power Spectral Density = –140 dBm/√Hz
Power = 1e–17 × 1 Hz = 0.01 fW
Assume: R = 100 Ω
L
V
= √(P×R) = √(0.01 fW × 100 Ω) = 31.6 nV/√Hz
noise
For ADSL systems that use a 1:2 transformer ratio, such as central office line cards, the voltage noise
requirement for the receiver is lowered to 15.8 nV/√Hz.
TRANSFORMER
V
noise
ON LINE
RATIO
1:1
31.6 nV/√Hz
15.8 nV/√Hz
1:2
The THS6007 receiver was designed to operate with 10 nV/√Hz voltage noise, exceeding the noise
requirements for an ADSL system operating with 1:1 or 1:2 transformer ratios.
21
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THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
The THS6007 contains four independent operational amplifiers. Two are designated as drivers because of their
highoutputcurrentcapability, andtwoaredesignatedasreceivers. Thereceiveramplifiersarevoltagefeedback
topology amplifiers made for high-speed, low-power operation and are capable of driving output loads of at least
50 mA. The drivers are current feedback topology amplifiers and have been specifically designed to deliver the
full power requirements of ADSL. They can deliver output currents of at least 400 mA at full output voltage.
The THS6007 is fabricated using Texas Instruments 30-V complementary bipolar process, BiCOM. This
process provides excellent isolation and high slew rates that result in the device’s excellent crosstalk and
extremely low distortion.
independent power supplies
Each driver amplifier and both receivers of the THS6007 have their own power supply pins. This was specifically
done to solve a problem that often occurs when multiple devices in the same package share common power
pins. This problem is crosstalk between the individual devices caused by currents flowing in common
connections. Whenever the current required by one device flows through a common connection shared with
anotherdevice, thiscurrent, inconjunctionwiththeimpedanceinthesharedline, producesanunwantedvoltage
on the power supply. Proper power supply decoupling and good device power supply rejection helps to reduce
this unwanted signal. What is left is crosstalk.
However, with independent power supply pins for each device, the effects of crosstalk through common
impedance in the power supplies is more easily managed. This is because it is much easier to achieve low
common impedance on the PCB with copper etch than it is to achieve low impedance within the package with
either bond wires or metal traces on silicon.
22
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THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
power supply restrictions
Although the THS6007 is specified for operation from power supplies of ±5 V to ±15 V (or singled-ended power
supply operation from 10 V to 30 V), and each amplifier has its own power supply pins, several precautions must
be taken to assure proper operation.
1. The power supplies for each driver amplifier must be the same value. For example, if driver 1 uses ±15volts,
then driver 2 must also use ±15 volts. Using ±15 volts for driver 1 and ±5 volts for driver 2 is not allowed.
2. The power supplies for the receiver amplifiers may be different than the driver supply voltages. Although
it is recommended to use the same type of supply, either split supplies(±V ) or single supply (+V
GND), for both drivers and receivers.
and
CC
CC
All the amplifiers within the THS6007 incorporate a standard Class A-B output stage. This means that some
of the quiescent current is directed to the load as the load current increases. So under heavy load conditions,
accurate power dissipation calculations are best achieved through actual measurements. For small loads,
however, internal power dissipation for each amplifier in the THS6007 can be approximated by the following
formula:
V
O
P
D
2 V
I
V
_ V
D
CC CC
CC
O
R
L
Where:
P
V
= Power dissipation for one amplifier
= Split supply voltage
CC
I
V
R
= Supply current for that particular amplifier
= Output voltage of amplifier
= Load resistance
CC
O
L
To find the total THS6007 power dissipation, we simply sum up all four amplifier power dissipation results.
Generally, the worst case power dissipation occurs when the output voltage is one-half the V voltage. One
CC
last note, which is often overlooked: the feedback resistor (R ) is also a load to the output of the amplifier and
f
should be taken into account for low value feedback resistors.
23
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THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
device protection features
The drivers of the THS6007 have two built-in protection features that protect the device against improper
operation. The first protection mechanism is output current limiting. Should the drivers output become shorted
to ground, the output current is automatically limited to the value given in the data sheet. While this protects the
output against excessive current, the device internal power dissipation increases due to the high current and
large voltage drop across the output transistors. Continuous output shorts are not recommended and could
damage the device. Additionally, connection of the amplifier output to one of the supply rails (±V ) can cause
CC
failure of the device and is not recommended. The use of Schottky diodes from each amplifier’s output to each
power supply voltage rail is recommended. This will limit surges from the transmission line so as to not damage
the THS6007.
The drivers second built-in protection feature is thermal shutdown. Should the internal junction temperature rise
above approximately 180 C, the device automatically shuts down. Such a condition could exist with improper
heat sinking or if the output is shorted to ground. When the abnormal condition is fixed and the junction
temperature drops below 150°C, the internal thermal shutdown circuit automatically turns the device back on.
thermal information
The THS6007 is packaged in a thermally-enhanced PWP package, which is a member of the PowerPAD
family of packages. This package is constructed using a downset leadframe upon which the die is mounted
[see Figure 80(a) and Figure 80(b)]. This arrangement results in the lead frame being exposed as a thermal pad
on the underside of the package [see Figure 80(c)]. Because this thermal pad has direct thermal contact with
the die, excellent thermal performance can be achieved by providing a good thermal path away from the thermal
pad.
The PowerPAD package allows for both assembly and thermal management in one manufacturing operation.
During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be
soldered to a copper area underneath the package. Through the use of thermal paths within this copper area,
heat can be conducted away from the package into either a ground plane or other heat dissipating device. This
is discussed in more detail in the PCB design considerations section of this document.
The PowerPAD package represents a breakthrough in combining the small area and ease of assembly of
surface mount with the, heretofore, awkward mechanical methods of heatsinking.
DIE
Side View (a)
Thermal
Pad
DIE
End View (b)
Bottom View (c)
NOTE A: The thermal pad is electrically isolated from all terminals in the package.
Figure 80. Views of Thermally Enhanced PWP Package
24
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THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
recommended feedback and gain resistor values
As with all current-feedback amplifiers, the bandwidth of the THS6007 drivers is an inversely proportional
function of the value of the feedback resistor. This can be seen from Figures 18 and 19. For the driver, the
recommended resistors for the optimum frequency response for a 25-Ω load system are 680 Ω for a gain = 1
and 620 Ω for a gain = 2 or –1. These should be used as a starting point and once optimum values are found,
1% tolerance resistors should be used to maintain frequency response characteristics. Because there is a finite
amount of output resistance of the operational amplifier, load resistance can play a major part in frequency
response. This is especially true with the drivers, which tend to drive low-impedance loads. This can be seen
in Figure 12, Figure 24, and Figure 25. As the load resistance increases, the output resistance of the amplifier
becomes less dominant at high frequencies. To compensate for this, the feedback resistor should change. For
100-Ω loads, it is recommended that the feedback resistor be changed to 820 Ω for a gain of 1 and 560 Ω for
a gain of 2 or –1. Although, for most applications, a feedback resistor value of 1 kΩ is recommended, which is
a good compromise between bandwidth and phase margin that yields a very stable amplifier.
Consistent with current-feedback amplifiers, increasing the gain is best accomplished by changing the gain
resistor, not the feedback resistor. This is because the bandwidth of the amplifier is dominated by the feedback
resistor value and internal dominant-pole capacitor. The ability to control the amplifier gain independent of the
bandwidth constitutes a major advantage of current feedback amplifiers over conventional voltage feedback
amplifiers. Therefore, once a frequency response is found suitable to a particular application, adjust the value
of the gain resistor to increase or decrease the overall amplifier gain.
Finally, it is important to realize the effects of the feedback resistance on distortion. Increasing the resistance
decreases the loop gain and increases the distortion. It is also important to know that decreasing load
impedance increases total harmonic distortion (THD). Typically, the third order harmonic distortion increases
more than the second order harmonic distortion.
The receivers of the THS6007 are voltage feedback amplifiers (VFB). Therefore the amplifiers follow the
classical amplifier use of a gain-bandwidth-product. As gain increases, the bandwidth (–3 dB) decreases
accordingly. There are no limitations on using capacitors within the feedback loop of VFB amplifier circuits.
Figures 56 through 67 show the effects of feedback resistance and gain versus frequency. Using these graphs
as a reference point is highly recommended.
offset voltage
Theoutputoffsetvoltage,(V )isthesumoftheinputoffsetvoltage(V )andbothinputbiascurrents(I )times
OO
IO
IB
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
R
F
I
IB–
R
G
+
–
+
V
I
V
O
R
S
I
IB+
R
R
R
R
F
F
V
V
1
I
R
1
I
R
OO
IO
IB
S
IB–
F
G
G
Figure 81. Output Offset Voltage Model
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
noise calculations and noise figure
Noise can cause errors on very small signals. This is especially true for the receiver amplifiers which are
generally used for amplifying small signals coming over a transmission line. The noise model for
current-feedback amplifiers (CFB) is the same as voltage-feedback amplifiers (VFB). The only difference
between the two is that the CFB amplifiers generally specify different current noise parameters for each input
while VFB amplifiers usually only specify one noise-current parameter. The noise model is shown in Figure 82.
This model includes all of the noise sources as follows:
•
•
•
•
e = Amplifier internal voltage noise (nV/√Hz)
n
IN+ = Noninverting current noise (pA/√Hz)
IN– = Inverting current noise (pA/√Hz)
e
= Thermal voltage noise associated with each resistor (e = 4 kTR )
Rx x
Rx
e
Rs
e
n
R
Noiseless
S
+
_
e
ni
e
no
IN+
IN–
e
Rf
R
f
e
Rg
R
g
Figure 82. Noise Model
The total equivalent input noise density (e ) is calculated by using the following equation:
ni
2
2
2
e
e
IN
R
IN–
R
R
4 kTR
4 kT R
R
n
s
ni
S
F
G
F
G
Where:
–23
k = Boltzmann’s constant = 1.380658 × 10
T = Temperature in degrees Kelvin (273 +°C)
R || R = Parallel resistance of R and R
F
G
F
G
To get the equivalent output noise of the amplifier, just multiply the equivalent input noise density (e ) by the
ni
overall amplifier gain (A ).
V
R
R
F
e
e
A
e
1
(Noninverting Case)
no
ni
ni
V
G
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
noise calculations and noise figure (continued)
As the previous equations show, to keep noise at a minimum, small-value resistors should be used. As the
closed-loop gain is increased (by reducing R ), the input noise is reduced considerably because of the parallel
g
resistance term. This leads to the general conclusion that the most dominant noise sources are the source
resistor (R ) and the internal amplifier noise voltage (e ). Because noise is summed in a root-mean-squares
S
n
method, noise sources smaller than 25% of the largest noise source can be effectively ignored. This can greatly
simplify the formula and make noise calculations much easier to calculate.
This brings up another noise measurement usually preferred in RF applications, noise figure (NF). Noise figure
is a measure of noise degradation caused by the amplifier. The value of the source resistance must be defined
and is typically 50 Ω in RF applications.
2
e
e
ni
NF
10log
Rs
Because the dominant noise components are generally the source resistance and the internal amplifier noise
voltage, we can approximate the noise figure as:
2
2
e
IN
R
n
S
NF
10log 1
4 kTR
S
The Figure 83 shows the noise figure graph for the drivers of the THS6007. Figure 84 shows the noise figure
graph for the receivers of the THS6007.
RECEIVER NOISE FIGURE
vs
SOURCE RESISTANCE
DRIVER NOISE FIGURE
vs
SOURCE RESISTANCE
40
35
30
25
20
15
10
5
20
T
A
= 25°C
f = 10 kHz
= 25°C
18
16
14
12
10
T
A
8
6
4
2
0
0
10
100
1k
10k
100k
10
100
1k
10k
Source Resistance – R (Ω)
R
– Source Resistance – Ω
S
s
Figure 83
Figure 84
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
PCB design considerations
Proper PCB design techniques in two areas are important to assure proper operation of the THS6007. These
areas are high-speed layout techniques and thermal-management techniques. Because the THS6007 is a
high-speed part, the following guidelines are recommended.
Ground plane – It is essential that a ground plane be used on the board to provide all components with a
low inductive ground connection. Although a ground connection directly to a terminal of the THS6007 is not
necessarily required, it is recommended that the thermal pad of the package be tied to ground. This serves
two functions. It provides a low inductive ground to the device substrate to minimize internal crosstalk and
it provides the path for heat removal.
Input stray capacitance – To minimize potential problems with amplifier oscillation, the capacitance at the
inverting input of the amplifiers must be kept to a minimum. To do this, PCB trace runs to the inverting input
must be as short as possible, the ground plane should be removed under any etch runs connected to the
inverting input, and external components should be placed as close as possible to the inverting input. This
isespeciallytrueinthenoninvertingconfiguration. AnexampleofthiscanbeseeninFigure85, whichshows
what happens when 1.8 pF is added to the inverting input terminal in the noninverting configuration. The
bandwidth increases dramatically at the expense of peaking. This is because some of the error current is
flowing through the stray capacitor instead of the inverting node of the amplifier. Although, in the inverting
mode, stray capacitance at the inverting input has little effect. This is because the inverting node is at a
virtual ground and the voltage does not fluctuate nearly as much as in the noninverting configuration.
DRIVER
NORMALIZED FREQUENCY RESPONSE
vs
FREQUENCY
3
V
= ±15 V
CC
V = 200 mV
2
I
R
R
= 25 Ω
= 1 kΩ
L
F
1
0
Gain = 1
C = 0 pF
I
(Stray C Only)
–1
–2
C = 1.8 pF
I
1 kΩ
–3
–4
–5
C
in
in
V
out
–
V
+
R
25 Ω
=
L
50 Ω
–6
–7
100
1M
10M
f – Frequency – Hz
100M
500M
Figure 85. Driver Normalized Frequency Response vs Frequency
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
PCB design considerations (continued)
Proper power supply decoupling – Use a minimum of a 6.8-µF tantalum capacitor in parallel with a 0.1-µF
ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several
amplifiers depending on the application, but a 0.1-µF ceramic capacitor should always be used on the
supply terminal of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible
tothesupplyterminal. Asthisdistanceincreases, theinductanceintheconnectingetchmakesthecapacitor
less effective. The designer should strive for distances of less than 0.1 inches between the device power
terminal and the ceramic capacitors.
Because of its power dissipation, proper thermal management of the THS6007 is required. Although there are
many ways to properly heatsink this device, the following steps illustrate one recommended approach for a
multilayer PCB with an internal ground plane.
1. Prepare the PCB with a top side etch pattern as shown in Figure 86. There should be etch for the leads as
well as etch for the thermal pad.
2. Place the thermal transfer holes in the area of the thermal pad. These holes should be 13 mils in diameter.
They are kept small so that solder wicking through the holes is not a problem during reflow.
3. Additionalvias may be placed anywhere along the thermal plane outside of the thermal pad area. This helps
dissipate the heat generated by the IC. These additional vias may be larger than the 13-mil diameter vias
directly under the thermal pad. They can be larger because they are not in the thermal pad area to be
soldered so that wicking is not a problem.
4. Connect all holes to the internal ground plane.
5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection
methodology. Webconnectionshaveahighthermalresistanceconnectionthatisusefulforslowingtheheat
transfer during soldering operations. This makes the soldering of vias that have plane connections easier.
In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore,
the holes under the IC package should make their connection to the internal ground plane with a complete
connection around the entire circumference of the plated-through hole.
6. The top-side solder mask should leave the terminals of the package and the thermal pad area with its
thermal transfer holes exposed. The bottom-side solder mask should cover the thermal transfer holes of
the thermal pad area. This prevents solder from being pulled away from the thermal pad area during the
reflow process.
7. Apply solder paste to the exposed thermal pad area and all of the IC terminals.
8. With these preparatory steps in place, the THS6007 IC is simply placed in position and run through the
solder reflow operation as any standard surface-mount component. This results in a part that is properly
installed.
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
PCB design considerations (continued)
Thermal pad area (0.12 x 0.3)
with 10 vias
(Via diameter = 13 mils)
Figure 86. PowerPAD PCB Etch and Via Pattern
The actual thermal performance achieved with the THS6007 in its PowerPAD package depends on the
application. In the previous example, if the size of the internal ground plane is approximately 3 inches × 3 inches,
then the expected thermal coefficient, θ , is about 27.9 C/W. For a given θ , the maximum power dissipation
JA
JA
is shown in Figure 87 and is calculated by the following formula:
T
–T
MAX
A
P
D
JA
Where:
P
= Maximum power dissipation of THS6007 (watts)
= Absolute maximum junction temperature (150°C)
= Free-ambient air temperature (°C)
D
T
MAX
T
A
θ
= θ + θ
JA
JC CA
θ
θ
= Thermal coefficient from junction to case (0.72°C/W)
= Thermal coefficient from case to ambient
JC
CA
It is recommended to design the system to keep the junction temperature (T ) at a minimum of 125°C. Junction
J
temperatures higher 125°C than can lead to increased output distortion. Additionally, because the heat of the
device is dissipated through the PCB, care must be taken to ensure the PCB does not become thermally
saturated. Once this happens, the power dissipation of the system (PCB and active devices) becomes very
in-efficient and the performance will suffer.
More complete details of the PowerPAD installation process and thermal management techniques can be
found in the Texas Instruments Technical Brief, PowerPAD Thermally Enhanced Package. This document can
be found at the TI web site (www.ti.com) by searching on the key word PowerPAD . The document can also
be ordered through your local TI sales office. Refer to literature number SLMA002 when ordering.
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
PCB design considerations (continued)
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
8
7
6
5
4
3
θ
= 27.9 C/W
JA
2 oz. Trace and
Copper Pad With
Solder
T
J
= 150
C
2
1
θ
= 56.2 C/W
JA
2 oz. Trace and
Copper Pad
Without Solder
0
–40
–20
0
20
40
60
C
80
100
T
A
– Free-Air Temperature –
Figure 87. Maximum Power Dissipation vs Free-Air Temperature
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
general configurations
A common error for the first-time CFB user is to create a unity gain buffer amplifier by shorting the output directly
to the inverting input. A CFB amplifier in this configuration is now commonly referred to as an oscillator. The
THS6007 drivers, like all CFB amplifiers, must have a feedback resistor for stable operation. Additionally,
placing capacitors directly from the output to the inverting input is not recommended. This is because, at high
frequencies, a capacitor has a very low impedance. This results in an unstable amplifier and should not be
considered when using a current-feedback amplifier. Because of this, integrators and simple low-pass filters,
which are easily implemented on a VFB amplifier, have to be designed slightly differently. If filtering is required,
simply place an RC-filter at the noninverting terminal of the operational-amplifier (see Figure 88).
R
R
F
G
V
R
R
O
F
1
1
V
1
sR1C1
I
G
–
V
O
1
+
f
V
I
–3dB
2 R1C1
R1
C1
Figure 88. Single-Pole Low-Pass Filter
If a multiple pole filter is required, a Sallen-Key filter can work very well with CFB amplifiers. This is because
the filtering elements are not in the negative feedback loop and stability is not compromised. Because of their
high slew-rates and high bandwidths, CFB amplifiers can create very accurate signals and help minimize
distortion. An example is shown in Figure 89.
C1
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
+
_
V
I
1
R1
R2
f
–3dB
2 RC
C2
R
F
1
R
=
G
R
F
2 –
)
(
R
Q
G
Figure 89. 2-Pole Low-Pass Sallen-Key Filter
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
general configurations (continued)
THS6007 driver amplifiers can also be used as very good video distribution amplifiers. One characteristic of
distribution amplifiers is the fact that the differential phase (DP) and the differential gain (DG) are compromised
as the number of lines increases and the closed-loop gain increases. Be sure to use termination resistors
throughout the distribution system to minimize reflections and capacitive loading.
620 Ω
620 Ω
75 Ω Transmission Line
75 Ω
–
+
V
O1
V
I
THS6007
75 Ω
75 Ω
N Lines
75 Ω
V
ON
75 Ω
Figure 90. Video Distribution Amplifier Application
driving a capacitive load
Driving capacitive loads with high performance amplifiers is not a problem as long as certain precautions are
taken. The first is to realize that the THS6007 has been internally compensated to maximize its bandwidth and
slew rate performance. When the amplifier is compensated in this manner, capacitive loading directly on the
output will decrease the device’s phase margin leading to high frequency ringing or oscillations. Therefore, for
capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series with the output of
the amplifier, as shown in Figure 91. A minimum value of 20 Ω should work well for most applications. For
example, in 75-Ω transmission systems, setting the series resistor value to 75 Ω both isolates any capacitance
loading and provides the proper line impedance matching at the source end.
1.3 kΩ
1.3 kΩ
_
Input
20 Ω
THS6007
Output
Receiver
+
C
LOAD
Figure 91. Driving a Capacitive Load
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
MECHANICAL INFORMATION
PWP (R-PDSO-G**)
PowerPAD PLASTIC SMALL-OUTLINE
20 PINS SHOWN
0,30
0,19
0,65
20
M
0,10
11
Thermal Pad
(See Note D)
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
1
10
0,25
A
0°–8°
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
28
DIM
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
A MAX
A MIN
4073225/F 10/98
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusions.
D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.
This pad is electrically and thermally connected to the backside of the die and possibly selected leads.
E. Falls within JEDEC MO-153
PowerPAD is a trademark of Texas Instruments.
34
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 2000, Texas Instruments Incorporated
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