TISP4350H3LMFR [TI]
Silicon Surge Protector, 350 V, 60 A, SILICON SURGE PROTECTOR, PLASTIC, LMF002, DO-92, 2 PIN;
| 型号： | TISP4350H3LMFR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Silicon Surge Protector, 350 V, 60 A, SILICON SURGE PROTECTOR, PLASTIC, LMF002, DO-92, 2 PIN 硅浪涌保护器 触发装置 |
| 文件： | 总17页 (文件大小：528K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
TELECOMMUNICATION SYSTEM HIGH CURRENT OVERVOLTAGE PROTECTORS
G
G
8 kV 10/700, 200 A 5/310 ITU-T K.20/21 rating
LM PACKAGE
(TOP VIEW)
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
T(A)
NC
R(B)
1
2
3
MD4XAT
V
V
(BO)
DRM
DEVICE
NC - No internal connection on pin 2
V
V
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
58
65
75
90
70
80
95
LMF PACKAGE
(LM PACKAGE WITH FORMED LEADS)
(TOP VIEW)
115
125
145
165
180
220
240
250
260
290
300
350
395
400
T(A)
100
120
135
145
160
180
190
200
220
230
275
320
300
1
2
3
NC
R(B)
MD4XAKB
NC - No internal connection on pin 2
device symbol
T
G
Rated for International Surge Wave Shapes
R
SD4XAA
I
TSP
A
Terminals T and R correspond to the
alternative line designators of A and B
WAVE SHAPE
STANDARD
2/10 µs
8/20 µs
GR-1089-CORE
IEC 61000-4-5
FCC Part 68
500
300
250
10/160 µs
ITU-T K.20/21
FCC Part 68
10/700 µs
200
10/560 µs
FCC Part 68
160
100
G
G
Low Differential Capacitance . . . 80 pF max.
..................UL Recognized Component
10/1000 µs
GR-1089-CORE
HOW TO ORDER
DEVICE
PACKAGE
CARRIER
Bulk Pack
ORDER AS
TISP4xxxH3LM
Straight Lead DO-92 (LM)
TISP4xxxH3LM
Tape and Reeled TISP4xxxH3LMR
Formed Lead DO-92 (LMF) Tape and Reeled TISP4xxxH3LMFR
Insert xxx value corresponding to protection voltages of 070, 080, 095, 115 etcetera.
description
These devices are designed to limit overvoltages on the telephone line. Overvoltages are normally caused by
a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. A
single device provides 2-point protection and is typically used for the protection of 2-wire telecommunication
Copyright © 2000 Texas Instruments Incorporated
PRODUCTION DATA information is current as of
publication date. Products conform to specifications
per the terms of Texas Instruments standard warranty.
Production processing does not necessary include
testing of all parameters.
Designed and manufactured by Power
Innovations, A Bourns Company, under
private label for Texas Instruments.
1
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
equipment (e.g. between the Ring to Tip wires for telephones and modems). Combinations of devices can be
used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially
clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to
crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the
overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup
as the diverted current subsides.
This TISP4xxxH3LM range consists of seventeen voltage variants to meet various maximum system voltage
levels (58 V to 320 V). They are guaranteed to voltage limit and withstand the listed international lightning
surges in both polarities. These protection devices are supplied in a DO-92 (LM) cylindrical plastic package.
The TISP4xxxH3LM is a straight lead DO-92 supplied in bulk pack and on tape and reeled. The
TISP4xxxH3LMF is a formed lead DO-92 supplied only on tape and reeled.
absolute maximum ratings, T = 25 °C (unless otherwise noted)
A
RATING
SYMBOL
VALUE
58
UNIT
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
65
75
90
100
120
135
145
160
180
190
200
220
230
275
320
300
Repetitive peak off-state voltage, (see Note 1)
V
V
DRM
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)
500
300
250
220
200
200
200
200
160
100
8/20 µs (IEC 61000-4-5, combination wave generator, 1.2/50 voltage, 8/20 current)
10/160 µs (FCC Part 68, 10/160 µs voltage wave shape)
5/200 µs (VDE 0433, 10/700 µs voltage wave shape)
0.2/310 µs (I 31-24, 0.5/700 µs voltage wave shape)
I
A
TSP
5/310 µs (ITU-T K.20/21, 10/700 µs voltage wave shape)
5/310 µs (FTZ R12, 10/700 µs voltage wave shape)
5/320 µs (FCC Part 68, 9/720 µs voltage wave shape)
10/560 µs (FCC Part 68, 10/560 µs voltage wave shape)
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)
NOTES: 1. See Applications Information and Figure 10 for voltage values at lower temperatures.
2. Initially the TISP4xxxH3LM must be in thermal equilibrium with T = 25 °C.
J
3. The surge may be repeated after the TISP4xxxH3LM returns to its initial conditions.
4. See Applications Information and Figure 11 for current ratings at other temperatures.
2
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
absolute maximum ratings, T = 25 °C (unless otherwise noted) (continued)
A
RATING
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
20 ms (50 Hz) full sine wave
SYMBOL
VALUE
UNIT
55
60
16.7 ms (60 Hz) full sine wave
I
A
TSM
1000 s 50 Hz/60 Hz a.c.
2.3
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 100 A
Junction temperature
di /dt
400
A/µs
°C
T
T
-40 to +150
-65 to +150
J
Storage temperature range
T
°C
stg
NOTES: 2. Initially the TISP4xxxH3LM must be in thermal equilibrium with T = 25 °C.
J
3. The surge may be repeated after the TISP4xxxH3LM returns to its initial conditions.
5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 8 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures
above 25 °C
electrical characteristics, T = 25 °C (unless otherwise noted)
A
PARAMETER
Repetitive peak off-
state current
TEST CONDITIONS
MIN
TYP
MAX
5
UNIT
T = 25 °C
A
I
V
=
V
DRM
µA
DRM
D
T = 85 °C
A
10
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
70
80
95
115
125
145
165
180
220
240
250
260
290
300
350
395
400
V
Breakover voltage
dv/dt = 750 V/ms,
R
= 300 Ω
V
(BO)
SOURCE
3
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
electrical characteristics, T = 25 °C (unless otherwise noted) (continued)
A
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
78
UNIT
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
88
103
124
134
154
174
189
230
250
261
271
301
311
362
408
413
0.6
dv/dt ≤ 1000 V/µs, Linear voltage ramp,
Impulse breakover
voltage
Maximum ramp value = 500 V
di/dt = 20 A/µs, Linear current ramp,
Maximum ramp value = 10 A
V
V
(BO)
I
Breakover current
On-state voltage
Holding current
dv/dt = 750 V/ms,
R
= 300 Ω
0.15
A
V
A
(BO)
SOURCE
V
I = 5 A, t = 100 µs
3
T
T
W
I
I = 5 A, di/dt = -/+30 mA/ms
0.15
5
0.6
H
T
Critical rate of rise of
off-state voltage
Off-state current
dv/dt
Linear voltage ramp, Maximum ramp value < 0.85V
kV/µs
µA
DRM
I
V
=
50 V
T = 85 °C
A
10
218
120
115
200
110
100
185
100
90
D
D
f = 100 kHz, V = 1 V rms, V = 0,
4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4125 thru ‘4220
‘4240 thru ‘4400
172
95
d
D
92
f = 100 kHz, V = 1 V rms, V = -1 V
157
85
d
D
80
f = 100 kHz, V = 1 V rms, V = -2 V
145
78
d
D
C
Off-state capacitance
pF
off
72
f = 100 kHz, V = 1 V rms, V = -50 V
70
90
d
D
33
43
28
35
f = 100 kHz, V = 1 V rms, V = -100 V
25
33
d
D
(see Note 6)
22
28
NOTE 6: To avoid possible voltage clipping, the ‘4125 is tested with V = -98 V.
D
thermal characteristics
PARAMETER
MIN
TYP
MAX
UNIT
TEST CONDITIONS
EIA/JESD51-3 PCB, I = I
,
TSM(1000)
T
105
T = 25 °C, (see Note 7)
A
RθJA
Junction to free air thermal resistance
°C/W
265 mm x 210 mm populated line card,
4-layer PCB, I = I , T = 25 °C
55
T
TSM(1000)
A
NOTE 7: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
4
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
PARAMETER MEASUREMENT INFORMATION
+i
Quadrant I
Switching
ITSP
Characteristic
ITSM
IT
V(BO)
VT
I(BO)
IH
ID
IDRM
VDRM
VD
+v
-v
ID
VD
VDRM
IDRM
IH
IT
I(BO)
VT
V(BO)
ITSM
Quadrant III
Switching
ITSP
Characteristic
-i
PMXXAAB
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR T AND R TERMINALS
ALL MEASUREMENTS ARE REFERENCED TO THE R TERMINAL
5
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
TYPICAL CHARACTERISTICS
OFF-STATE CURRENT
NORMALISED BREAKOVER VOLTAGE
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
TC4HAF
TCHAS
1.10
1.05
1.00
0.95
102
101
100
10-1
10-2
10-3
10-4
10-5
VD = 50 V
-25
0
25
50
75
100 125 150
-25
0
25
50
75
100
125
150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 2.
Figure 3.
ON-STATE CURRENT
vs
NORMALISED HOLDING CURRENT
vs
JUNCTION TEMPERATURE
ON-STATE VOLTAGE
TC4HAD
TC4HACB
2.0
1.5
200
150
TA = 25 °C
tW = 100 µs
100
70
50
40
30
1.0
0.9
20
15
0.8
'4125
THRU
'4220
10
7
0.7
5
4
3
0.6
0.5
'4070
THRU
'4115
'4240
THRU
'4400
2
1.5
0.4
1
0.7
-25
0
25
50
75
100 125 150
1
1.5
2
3
4
5
7
10
TJ - Junction Temperature - °C
VT - On-State Voltage - V
Figure 4.
Figure 5.
6
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
TYPICAL CHARACTERISTICS
DIFFERENTIAL OFF-STATE CAPACITANCE
NORMALISED CAPACITANCE
vs
vs
RATED REPETITIVE PEAK OFF-STATE VOLTAGE
OFF-STATE VOLTAGE
TCHATB
TC4HAQA
90
1
0.9
85
80
75
TJ = 25°C
0.8
0.7
Vd = 1 Vrms
0.6
0.5
70
∆C = Coff(-2 V) - Coff(-50 V)
65
60
55
50
45
40
'4070 THRU '4115
0.4
0.3
'4125 THRU '4220
'4240 THRU '4400
0.2
0.5
1
2
3
5
10
20 30 50
100150
50 60 70 80 90100
150
200 250 300
VDRM - Repetitive Peak Off-State Voltage - V
VD - Off-state Voltage - V
Figure 6.
Figure 7.
7
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
RATING AND THERMAL INFORMATION
THERMAL IMPEDANCE
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
vs
POWER DURATION
CURRENT DURATION
TI4HAH
TI4HAG
30
150
VGEN = 600 Vrms, 50/60 Hz
100
80
RGEN = 1.4*VGEN/ITSM(t)
20
15
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
60
50
40
10
9
30
8
20
15
7
6
5
10
8
4
ITSM(t) APPLIED FOR TIME t
6
5
4
3
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
2
3
1.5
2
0·1
1
10
100
1000
0·1
1
10
100
1000
t - Current Duration - s
t - Power Duration - s
Figure 8.
Figure 9.
VDRM DERATING FACTOR
IMPULSE RATING
vs
AMBIENT TEMPERATURE
vs
MINIMUM AMBIENT TEMPERATURE
TC4HAA
TI4HAIA
700
600
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
BELLCORE 2/10
500
400
IEC 1.2/50, 8/20
300
250
FCC 10/160
ITU-T 10/700
FCC 10/560
'4070 THRU '4115
200
150
120
'4125 THRU '4220
BELLCORE 10/1000
100
90
'4240 THRU '4440
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80
-40 -35 -30 -25 -20 -15 -10 -5
0
5
10 15 20 25
TAMIN - Minimum Ambient Temperature - °C
TA - Ambient Temperature - °C
Figure 10.
Figure 11.
8
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
APPLICATIONS INFORMATION
deployment
These devices are two terminal overvoltage protectors. They may be used either singly to limit the voltage
between two conductors (Figure 12) or in multiples to limit the voltage at several points in a circuit (Figure 13).
Th3
Th1
Th1
Th2
Figure 12. TWO POINT PROTECTION
Figure 13. MULTI-POINT PROTECTION
In Figure 12, protector Th1 limits the maximum voltage between the two conductors to
configuration is normally used to protect circuits without a ground reference, such as modems. In Figure 13,
protectors Th2 and Th3 limit the maximum voltage between each conductor and ground to the V of the
V
. This
(BO)
(BO)
individual protector. Protector Th1 limits the maximum voltage between the two conductors to its
V
(BO)
value. If the equipment being protected has all its vulnerable components connected between the conductors
and ground, then protector Th1 is not required.
impulse testing
To verify the withstand capability and safety of the equipment, standards require that the equipment is tested
with various impulse wave forms. The table below shows some common values.
PEAK VOLTAGE
SETTING
V
VOLTAGE
WAVE FORM
µs
PEAK CURRENT
CURRENT
TISP4xxxH3
SERIES
STANDARD
VALUE
A
WAVE FORM 25 °C RATING RESISTANCE
µs
A
Ω
2500
2/10
500
100
200
100
37.5
25
2/10
500
100
250
160
200
200
200
GR-1089-CORE
0
1000
10/1000
10/160
10/1000
10/160
10/560
5/320 †
5/320 †
0.2/310
1500
0
0
0
0
0
FCC Part 68
(March 1998)
800
10/560
1500
9/720 †
9/720 †
0.5/700
1000
I3124
1500
37.5
37.5
100
1500
ITU-T K.20/K.21
10/700
5/310
200
0
4000
† FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K.21 10/700 impulse generator
If the impulse generator current exceeds the protectors current rating then a series resistance can be used
to reduce the current to the protectors rated value and so prevent possible failure. The required value of
series resistance for a given waveform is given by the following calculations. First, the minimum total circuit
impedance is found by dividing the impulse generators peak voltage by the protectors rated current. The
impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then
subtracted from the minimum total circuit impedance to give the required value of series resistance. In some
cases the equipment will require verification over a temperature range. By using the rated waveform values
from Figure 11, the appropriate series resistor value can be calculated for ambient temperatures in the range
of -40 °C to 85 °C.
9
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
a.c. power testing
The protector can withstand currents applied for times not exceeding those shown in Figure 8. Currents that
exceed these times must be terminated or reduced to avoid protector failure. Fuses, PTC (Positive
Temperature Coefficient) resistors and fusible resistors are overcurrent protection devices which can be used
to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one ampere. In
some cases it may be necessary to add some extra series resistance to prevent the fuse opening during
impulse testing. The current versus time characteristic of the overcurrent protector must be below the line
shown in Figure 8. In some cases there may be a further time limit imposed by the test standard (e.g. UL
1459 wiring simulator failure).
capacitance
The protector characteristic off-state capacitance values are given for d.c. bias voltage, V , values of 0, -1 V,
D
-2 V and -50 V. Where possible values are also given for -100 V. Values for other voltages may be calculated
by multiplying the V = 0 capacitance value by the factor given in Figure 6. Up to 10 MHz the capacitance is
D
essentially independent of frequency. Above 10 MHz the effective capacitance is strongly dependent on
connection inductance. In many applications, such as Figure 15 and Figure 17, the typical conductor bias
voltages will be about -2 V and -50 V. Figure 7 shows the differential (line unbalance) capacitance caused by
biasing one protector at -2 V and the other at -50 V.
normal system voltage levels
The protector should not clip or limit the voltages that occur in normal system operation. For unusual
conditions, such as ringing without the line connected, some degree of clipping is permissible. Under this
condition about 10 V of clipping is normally possible without activating the ring trip circuit.
Figure 10 allows the calculation of the protector V
value at temperatures below 25 °C. The calculated
DRM
value should not be less than the maximum normal system voltages. The TISP4260H3LM, with a V
of
DRM
200 V, can be used for the protection of ring generators producing 100 V rms of ring on a battery voltage of
-58 V (Th2 and Th3 in Figure 17). The peak ring voltage will be 58 + 1.414*100 = 199.4 V. However, this is the
open circuit voltage and the connection of the line and its equipment will reduce the peak voltage. In the
extreme case of an unconnected line, clipping the peak voltage to 190 V should not activate the ring trip. This
level of clipping would occur at the temperature when the V
has reduced to 190/200 = 0.95 of its 25 °C
DRM
value. Figure 10 shows that this condition will occur at an ambient temperature of -22 °C. In this example, the
TISP4260H3LM will allow normal equipment operation provided that the minimum expected ambient
temperature does not fall below -22 °C.
JESD51 thermal measurement method
To standardise thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51
3
3
standard. Part 2 of the standard (JESD51-2, 1995) describes the test environment. This is a 0.0283 m (1 ft )
cube which contains the test PCB (Printed Circuit Board) horizontally mounted at the centre. Part 3 of the
standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for packages smaller
than 27 mm on a side and the other for packages up to 48 mm. The LM package measurements used the
smaller 76.2 mm x 114.3 mm (3.0 “ x 4.5 “) PCB. The JESD51-3 PCBs are designed to have low effective
thermal conductivity (high thermal resistance) and represent a worse case condition. The PCBs used in the
majority of applications will achieve lower values of thermal resistance and so can dissipate higher power
levels than indicated by the JESD51 values.
10
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
typical circuits
MODEM
TIP
TIP
WIRE
WIRE
FUSE
R1a
RING DETECTOR
HOOK SWITCH
D.C. SINK
Th3
Th2
PROTECTED
EQUIPMENT
Th1
R1b
E.G. LINE CARD
TISP4350
OR
SIGNAL
TISP4400
RING
WIRE
RING
WIRE
AI6XBK
AI6XBM
Figure 14. MODEM INTER-WIRE PROTECTION
Figure 15. PROTECTION MODULE
R1a
Th3
SIGNAL
Th1
Th2
R1b
AI6XBL
D.C.
Figure 16. ISDN PROTECTION
OVER-
SLIC
RING/TEST
TEST
RING
SLIC
CURRENT
PROTECTION
PROTECTION
RELAY
RELAY
RELAY
PROTECTION
TIP
WIRE
S3a
R1a
Th4
Th3
S1a
S2a
SLIC
Th1
Th2
Th5
R1b
RING
WIRE
S3b
TISP6xxxx,
TISPPBLx,
S1b
S2b
½TISP6NTP2
VBAT
C1
220 nF
TEST
EQUIP-
MENT
RING
GENERATOR
AI6XBJ
Figure 17. LINE CARD RING/TEST PROTECTION
11
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
MECHANICAL DATA
device symbolization code
Devices will be coded as below.
SYMBOLIZATION
DEVICE
CODE
TISP4070H3LM
TISP4080H3LM
TISP4095H3LM
TISP4115H3LM
TISP4125H3LM
TISP4145H3LM
TISP4165H3LM
TISP4180H3LM
TISP4220H3LM
TISP4240H3LM
TISP4250H3LM
TISP4260H3LM
TISP4290H3LM
TISP4300H3LM
TISP4350H3LM
TISP4395H3LM
TISP4400H3LM
4070H3
4080H3
4095H3
4115H3
4125H3
4145H3
4165H3
4180H3
4220H3
4240H3
4250H3
4260H3
4290H3
4300H3
4350H3
4395H3
4400H3
carrier information
Devices are shipped in one of the carriers below. A reel contains 2 000 devices.
PACKAGE TYPE
CARRIER
ORDER #
Straight Lead DO-92
Bulk Pack
TISP4xxxH3LM
Straight Lead DO-92 Tape and Reeled TISP4xxxH3LMR
Formed Lead DO-92 Tape and Reeled TISP4xxxH3LMFR
12
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
MECHANICAL DATA
LM002 (DO-92)
2-pin cylindrical plastic package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
.
LM002 Package (DO-92)
5,21
4,44
4,19
3,17
3,43 MIN.
2,67
2,03
2,67
2,03
5,34
4,32
2,20 MAX.
A
2
2
12,7 MIN.
0,56
0,40
1
3
3
1
VIEW A
0,41
0,35
1,40
1,14
2,67
2,41
ALL LINEAR DIMENSIONS IN MILLIMETERS
MD4XARA
13
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
MECHANICAL DATA
LM002 (DO-92) - Formed Leads Version
2-pin cylindrical plastic package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
LMF002 (DO-92) - Formed Leads Version of LM002
5,21
4,44
4,19
3,17
3,43 MIN.
2,67
2,03
2,67
2,03
5,34
4,32
2,20 MAX.
4,00 MAX.
A
2
2
0,56
0,40
1
3
3
1
VIEW A
2,90
2,40
0,41
0,35
2,90
2,40
ALL LINEAR DIMENSIONS IN MILLIMETERS
MD4XASA
14
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
MECHANICAL DATA
tape dimensions
LM002 Package (Straight Lead DO-92) Tape
LM002 Tape Dimensions Conform to
the Requirements of EIA-468-B
13,70
11,70
Body Indent Visible
0,50
0,00
32,00
23,00
2,50 MIN.
27,68
17,66
11,00
8,50
9,75
8,50
19,00
5,50
19,00
17,50
3,14
2,14
4,30
3,70
φ
Adhesive Tape on Reverse
Side - Shown Dashed
VIEW A
5,48
4,68
13,00
12,40
Tape Section
Shown in
View A
Flat of DO-92 Body
Towards Reel Axis
Direction of Feed
ALL LINEAR DIMENSIONS IN MILLIMETERS
MD4XAPC
15
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
MECHANICAL DATA
tape dimensions
LMF002 Package (Formed Lead DO-92) Tape
LMF002 Tape Dimensions Conform to
the Requirements of EIA-468-B
13,70
11,70
Body Indent Visible
0,50
0,00
32,00
23,00
2,50 MIN.
27,68
17,66
16,53
15,50
11,00
8,50
9,75
8,50
19,00
5,50
19,00
17,50
5,28
4,88
4,30
3,70
φ
Adhesive Tape on Reverse
Side - Shown Dashed
VIEW A
4,21
3,41
13,00
12,40
Tape Section
Shown in
View A
Flat of DO-92 Body
Towards Reel Axis
Direction of Feed
ALL LINEAR DIMENSIONS IN MILLIMETERS
MD4XAQC
16
TISP4070H3LM THRU TISP4115H3LM, TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
IMPORTANT NOTICE
Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or ser-
vice without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders,
that the information being relied on is current.
TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in
accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems neces-
sary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those man-
dated by government requirements.
Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or
environmental damage (“Critical Applications”).
TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE
FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS.
Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such
applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be
directed to TI through a local SC sales office.
In order to minimize risks associated with the customer's applications, adequate design and operating safeguards should be
provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents
or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any
patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination,
machine, or process in which such semiconductor products or services might be or are used.
Copyright © 2000, Texas Instruments Incorporated
17
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