TL032AMFK [TI]
ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS; 增强型JFET低功耗低偏移运算放大器
| 型号： | TL032AMFK |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS |
| 文件： | 总56页 (文件大小：885K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
Direct Upgrades for the TL06x Low-Power
BiFETs
Higher Slew Rate and Bandwidth Without
Increased Power Consumption
Low Power Consumption . . .
6.5 mW/Channel Typ
Available in TSSOP for Small Form-Factor
Designs
On-Chip Offset-Voltage Trimming for
Improved DC Performance
(1.5 mV, TL031A)
description
The TL03x series of JFET-input operational amplifiers offer improved dc and ac characteristics over the TL06x
family of low-power BiFET operational amplifiers. On-chip zener trimming of offset voltage yields precision
grades as low as 1.5 mV (TL031A) for greater accuracy in dc-coupled applications. Texas Instruments improved
BiFET process and optimized designs also yield improved bandwidths and slew rates without increased power
consumption. The TL03x devices are pin-compatible with the TL06x and can be used to upgrade existing
circuits or for optimal performance in new designs.
BiFET operational amplifiers offer the inherently higher input impedance of the JFET-input transistors without
sacrificing the output drive associated with bipolar amplifiers. This higher input impedance makes the TL3x
amplifiers better suited for interfacing with high-impedance sensors or very low-level ac signals. These devices
also feature inherently better ac response than bipolar or CMOS devices having comparable power
consumption.
The TL03x family has been optimized for micropower operation, while improving on the performance of the
TL06x series. Designers requiring significantly faster ac response should consider the Excalibur TLE206x
family of low-power BiFET operational amplifiers.
Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken to
observe common-mode input-voltage limits and output swing when operating from a single supply. DC biasing
of the input signal is required and loads should be terminated to a virtual-ground node at midsupply. Texas
Instruments TLE2426 integrated virtual-ground generator is useful when operating BiFET amplifiers from single
supplies.
The TL03x devices are fully specified at ±15 V and ±5 V. For operation in low-voltage and/or single-supply
systems, Texas Instruments LinCMOS families of operational amplifiers (TLC-prefix) are recommended. When
moving from BiFET to CMOS amplifiers, particular attention should be paid to slew rate, bandwidth
requirements, and output loading.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from –40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of –55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL031x, TL031Ax
D, JG, OR P PACKAGE
(TOP VIEW)
TL032x, TL032Ax
D, JG, OR P PACKAGE
(TOP VIEW)
TL034x, TL034Ax
D, J, N, OR PW PACKAGE
(TOP VIEW)
OFFSET N1
IN–
NC
V
OUT
1OUT
1IN–
1IN+
V
CC+
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1OUT
1IN–
1IN+
4OUT
4IN–
4IN+
1
2
3
4
5
6
7
14
13
12
11
10
9
2OUT
2IN–
2IN+
CC+
IN+
V
OFFSET N2
V
V
V
CC–
CC –
CC+
CC–
2IN+
2IN–
3IN+
3IN–
3OUT
2OUT
8
TL031M, TL031AM
FK PACKAGE
(TOP VIEW)
TL032M, TL032AM
FK PACKAGE
(TOP VIEW)
TL034M, TL034AM
FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
3
2
1
20 19
18
3
2
1
20 19
18 NC
NC
NC
1IN–
NC
1IN+
NC
4IN+
NC
4
5
6
7
8
NC
IN–
NC
IN+
NC
4
5
6
7
8
4
5
6
7
8
2OUT
NC
17
16
15
14
17
16
15
14
17
16
15
14
V
CC+
V
V
NC
CC+
NC
CC–
2IN–
NC
1IN+
NC
NC
OUT
NC
2IN+
3IN+
9 10 11 12 13
9 10 11 12 13
9 10 11 12 13
NC – No internal connection
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
AVAILABLE OPTIONS
PACKAGED DEVICES
CHIP
FORM
(Y)
V
MAX
CHIP
CARRIER
(FK)
CERAMIC
CERAMIC
DIP
PLASTIC
PLASTIC
DIP
IO
SMALL
OUTLINE
(D)
‡
†
T
A
TSSOP
(PW)
AT 25°C
†
DIP
(J)
DIP
(N)
(JG)
(P)
TL031ACD
TL032ACD
TL031ACP
TL032ACP
0.8 mV
1.5 mV
—
—
—
—
—
—
TL031Y
TL032Y
TL034Y
TL031CD
TL032CD
TL034ACD
0°C to 70°C
TL031CP
TL032CP
—
—
TL034ACN
—
4 mV
TL034CD
—
—
—
—
—
—
TL034CN
—
TL034CPW
—
TL031AID
TL032AID
TL031AIP
TL032AIP
0.8 mV
—
—
TL031ID
TL032ID
TL034AID
–40°C to 85°C
TL031IP
TL032IP
1.5 mV
—
—
—
—
—
TL034AIN
—
4 mV
TL034ID
—
—
TL034IN
—
—
—
—
—
—
TL031AMD TL031AMFK
TL032AMD TL032AMFK
TL031AMJG
TL032AMJG
TL031AMP
TL032AMP
0.8 mV
TL031MD
TL032MD
TL034AMD TL034AMFK
TL031MFK
TL032MFK
–55°C to 125°C
TL031MJG
TL032MJG
TL031MP
TL032MP
1.5 mV
4 mV
TL034AMJ
TL034MJ
TL034AMN
TL034MN
—
—
—
—
TL034MD TL034MFK
—
—
†
‡
TheD and PW packages are available taped and reeled and are indicated by adding an R suffix to device type (e.g., TL034CDR orTL034CPWR).
Chip forms are tested at 25°C.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
symbol (each amplifier)
IN–
IN+
–
+
OUT
CC+
equivalent schematic (each amplifier)
V
Q5
Q14
Q2
Q3
D1
R4
Q6
Q11
IN+
OUT
Q8
Q9
IN–
Q10
R7
JF1 JF2
Q17
R3
Q15
R6
C1
Q12
JF3
R8
JF4
Q1
Q4
OFFSET N1
OFFSET N2
(see Note A)
Q7
Q16
R1
R2
R5
Q13
V
CC–
NOTE A: OFFSET N1 and OFFSET N2 are available only on the TL031.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL031Y chip information
This chip, when properly assembled, has characteristics similar to the TL031C. Thermal compression or
ultrasonic bonding can be used on the doped-aluminum bonding pads. These chips can be mounted with
conductive epoxy or a gold-silicon preform.
Bonding-Pad Assignments
V
CC+
(7)
(5)
(4)
(3)
(2)
IN+
IN–
+
(6)
(6)
(3)
OUT
–
(4)
CC–
(1)
(5)
V
OFFSET N1
OFFSET N2
(7)
42
Chip Thickness: 15 MIls Typical
Bonding Pads: 4 × 4 Mils Minimum
T (max) = 150°C
J
Tolerances Are ±10%.
All Dimensions Are in Mils.
Pin (4) is Internally Connected
to Backside of the Chip.
(1)
(2)
(8)
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL032Y chip information
This chip, when properly assembled, has characteristics similar to the TL032C. Thermal compression or
ultrasonic bonding can be used on the doped-aluminum bonding pads. These chips can be mounted with
conductive epoxy or a gold-silicon preform.
Bonding-Pad Assignments
(7)
(6)
(5)
V
CC+
(8)
(8)
(3)
(2)
1IN+
1IN–
+
–
(1)
1OUT
(5)
(6)
+
2IN+
2IN–
(7)
67
(4)
2OUT
–
(4)
V
CC–
Chip Thickness: 15 Mils Typical
Bonding Pads: 4 × 4 Mils Minimum
T (max) = 150°C
J
Tolerances Are ±10%.
(1)
(2)
(3)
All Dimensions Are in Mils.
Pin (4) is Internally Connected to Backside of Chip.
51
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL034Y chip information
This chip, when properly assembled, has characteristics similar to the TL034C. Thermal compression or
ultrasonic bonding can be used on the doped-aluminum bonding pads. These chips can be mounted with
conductive epoxy or a gold-silicon preform.
V
CC+
(4)
Bonding-Pad Assignments
(12) (11) (10)
(3)
(2)
1IN+
1IN–
+
–
(1)
1OUT
(13)
(9)
(5)
(6)
+
2IN+
2IN–
(7)
2OUT
3IN+
–
(10)
(9)
(14)
(8)
+
–
(8)
3OUT
3IN–
(12)
(13)
66
+
–
4IN+
4IN–
(14)
4OUT
(7)
(6)
(1)
(11)
V
CC–
Chip Thickness: 15 Mils Typical
Bonding Pads: 4 × 4 Mils Minimum
(2)
(3)
(4)
(5)
T (max) = 150°C
J
Tolerances Are ±10%.
All Dimensions Are in Mils.
Pin (11) is Internally Connected
to Backside of the Chip.
93
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V
CC+
CC–
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V
ID
Input voltage, V (any input) (see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V
I
Input current, I (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 mA
I
Output current, I (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±40 mA
O
Total current into V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA
CC+
CC–
Total current out of V
Duration of short-circuit current at (or below) 25°C (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Storage temperature range,T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1 /16 inch) from case for 10 seconds: D, N, P, or PW package . . . . . . . . . 260°C
Lead temperature 1,6 mm (1 /16 inch) from case for 60 seconds: J or JG package . . . . . . . . . . . . . . . 300°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
and V
.
CC–
CC+
2. Differential voltages are at IN+ with respect to IN–.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 125°C
A
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING POWER RATING
A
D
FK
J
950 mW
7.6 mW/°C
11.0 mW/°C
11.0 mW/°C
8.4 mW/°C
9.2 mW/°C
8.0 mW/°C
5.6 mW/°C
608 mW
880 mW
880 mW
672 mW
736 mW
640 mW
448 mW
494 mW
715 mW
715 mW
546 mW
598 mW
520 mW
N/A
190 mW
275 mW
275 mW
210 mW
230 mW
200 mW
N/A
1375 mW
1375 mW
1050 mW
1150 mW
1100 mW
700 mW
JG
N
P
PW
recommended operating conditions
C SUFFIX
I SUFFIX
M SUFFIX
UNIT
V
MIN
±5
MAX
±15
4
MIN
±5
MAX
±15
4
MIN
±5
MAX
Supply voltage, V
±15
4
CC±
V
V
= ±5 V
–1.5
–11.5
0
–1.5
–1.5
CC±
Common-mode input voltage, V
V
IC
Operating free-air temperature, T
= ±15 V
14 –11.5
70 –40
14 –11.5
85 –55
14
CC±
125
°C
A
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL031C and TL031AC electrical characteristics at specified free-air temperature
TL031C, TL031AC
= ±5 V
PARAMETER
TEST CONDITIONS
V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
3.5
TYP
MAX
25°C
Full range†
25°C
0.54
0.5
1.5
2.5
0.8
1.8
TL031C
4.5
V
IO
Input offset voltage
mV
0.41
2.8
0.34
TL031AC
Full range†
3.8
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
25°C to
70°C
TL031C
7.1
7.1
5.9
5.9
Temperature coefficient of
input offset voltage
α
µV/°C
VIO
25°C to
70°C
TL031AC
25
Input offset voltage
long-term drift
25°C
0.04
0.04
µV/mo
pA
‡
25°C
70°C
25°C
70°C
1
9
100
200
200
400
1
12
2
100
200
200
400
V
= 0, V = 0,
IC
O
I
I
Input offset current
Input bias current
IO
See Figure 5
2
V
O
= 0, V = 0,
IC
pA
IB
See Figure 5
50
80
–1.5
to
–3.4
to
–11.5 –13.4
25°C
to
to
4
5.4
14
15.4
Common-mode input
voltage range
V
ICR
V
–1.5
to
–11.5
to
†
Full range
.4
14
25°C
0°C
3
3
4.3
4.2
13
13
13
14
14
14
Maximum positive peak
output voltage swing
V
V
R
R
R
= 10 kΩ
= 10 kΩ
= 10 kΩ
V
V
OM+
L
L
L
70°C
25°C
0°C
3
4.3
–3
–3
–3
4
–4.2
–4.1
–4.2
12
–12.5 –13.9
–12.5 –13.9
Maximum negative peak
output voltage swing
OM–
70°C
25°C
0°C
–12.5
–14
14.3
13.5
15.2
5
4
5
Large-signal differential
A
VD
3
11.1
13.3
V/mV
§
voltage amplification
70°C
25°C
25°C
25°C
0°C
4
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
5
87
87
87
96
96
96
4
94
94
94
96
96
96
pF
i
70
70
70
75
75
75
75
75
75
75
75
75
Common-mode
rejection ratio
V
V
min,
IC = ICR
CMRR
dB
dB
V
= 0, R = 50 Ω
O
O
S
70°C
25°C
0°C
Supply-voltage
rejection ratio
k
V
= 0, R = 50 Ω
S
SVR
(∆V
/∆V )
CC±
IO
70°C
†
‡
Full range is 0°C to 70°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
At V
CC±
= ±5 V, V = ±2.3 V; at V = ±15 V, V = ±10 V.
CC± O
O
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL031C and TL031AC electrical characteristics at specified free-air temperature (continued)
TL031C, TL031AC
PARAMETER
Total power dissipation
Supply current
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
mW
µA
T
CC±
TYP
CC±
MIN
A
MIN
MAX
2.5
TYP
6.5
MAX
25°C
0°C
1.9
1.8
8.4
8.4
P
V
V
= 0,
= 0,
No load
No load
2.5
6.3
D
O
70°C
25°C
0°C
1.9
2.5
6.3
8.4
192
184
189
250
250
250
217
211
210
280
280
280
I
CC
O
70°C
TL031C and TL031AC operating characteristics at specified free-air temperature
TL031C, TL031AC
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
V/µs
V/µs
ns
T
CC±
TYP
CC±
A
MIN
MAX
MIN
1.5
1
TYP
2.9
2.6
3.2
5.1
5
MAX
25°C
0°C
2
1.8
2.2
3.9
3.7
4
Positive slew rate at
SR+
SR–
†
unity gain
70°C
25°C
0°C
1.5
1.5
1.5
1.5
R
= 10 kΩ,
See Figure 1
C
= 100 pF,
L
L
Negative slew rate at
†
unity gain
70°C
25°C
0°C
5
V
= ±10 mV,
138
134
150
138
134
150
132
127
142
132
127
142
5%
4%
6%
61
I(PP)
= 10 kΩ,
t
Rise time
R
C
= 100 pF,
r
f
L
L
See Figures 1 and 2
= ±10 mV,
70°C
25°C
0°C
V
I(PP)
= 10 kΩ,
t
Fall time
R
C
= 100 pF,
ns
L
L
See Figure 1
= ±10 mV,
70°C
25°C
0°C
V
11%
10%
12%
61
I(PP)
= 100 pF,
Overshoot factor
C
C
= 100 pF,
L
L
See Figures 1 and 2
f = 10 Hz
70°C
TL031C
25°C
f = 1 kHz
f = 10 Hz
f = 1 kHz
41
41
R
= 20 Ω,
See Figure 3
Equivalent input
noise voltage
S
V
I
nV/√Hz
n
61
61
TL031AC
25°C
25°C
41
41
60
Equivalent input noise
current
f = 1 kHz
0.003
0.003
pA/√Hz
n
25°C
0°C
1
1
1.1
1.1
1
V = 10 mV,
R = 10 kΩ,
L
I
B
Unity-gain bandwidth
MHz
1
C
= 25 pF,
See Figure 4
L
70°C
25°C
0°C
1
61°
61°
60°
65°
65°
64°
V = 10 mV,
R = 10 kΩ,
L
I
L
φ
m
Phase margin at unity gain
C
= 25 pF,
See Figure 4
= ±15 V, V = ±5 V.
I(PP)
70°C
†
For V
= ±5 V, V
= ±1 V; for V
CC±
CC±
I(PP)
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL031I and TL031AI electrical characteristics at specified free-air temperature
TL031I, TL031AI
= ±5 V
PARAMETER
TEST CONDITIONS
V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
3.5
TYP
MAX
1.5
3.3
25°C
Full range
25°C
0.54
0.41
0.5
TL031I
†
5.3
V
IO
Input offset voltage
mV
2.8
0.34
0.8
2.6
TL031AI
†
Full range
4.6
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
25°C to
85°C
TL031I
6.5
6.5
6.2
6.2
Temperature coefficient of
input offset voltage
α
µV/°C
VIO
25°C to
85°C
TL031AI
25
Input offset voltage
long-term drift
25°C
0.04
0.04
µV/mo
‡
V
= 0,
V
V
= 0,
= 0,
25°C
85°C
25°C
85°C
1
0.02
2
100
0.45
200
0.9
1
0.02
2
100
0.45
200
0.9
pA
nA
pA
nA
O
IC
I
I
Input offset current
Input bias current
IO
See Figure 5
= 0,
V
O
IC
IB
See Figure 5
0.2
0.2
–1.5
to
–3.4
to
–11.5 –13.4
25°C
to
to
4
5.4
14
15.4
Common-mode input
voltage range
V
ICR
V
–1.5
to
–11.5
to
†
Full range
4
14
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
25°C
25°C
–40°C
85°C
25°C
–40°C
85°C
3
3
4.3
4.1
13
13
13
14
14
14
Maximum positive peak
output voltage swing
V
V
R
R
R
= 10 kΩ
= 10 kΩ
= 10 kΩ
V
V
OM+
L
L
L
3
4.4
–3
–3
–3
4
–4.2
–4.1
–4.2
12
–12.5 –13.9
–12.5 –13.8
Maximum negative peak
output voltage swing
OM–
–12.5
–14
14.3
11.6
15.3
5
4
5
Large-signal differential
A
VD
3
8.4
V/mV
§
voltage amplification
4
13.5
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
5
87
87
87
96
96
96
4
94
94
94
96
96
96
pF
i
70
70
70
75
75
75
75
75
75
75
75
75
V
V
min,
Common-mode
rejection ratio
IC = ICR
CMRR
dB
dB
V
= 0,
= 0,
R
R
= 50 Ω
= 50 Ω
O
O
S
S
Supply-voltage
rejection ratio
k
V
SVR
(∆V
/∆V )
CC±
IO
†
‡
Full range is –40°C to 85°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
At V
CC±
= ±5 V, V = ±2.3 V; at V = ±15 V, V = ±10 V.
CC± O
O
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL031I and TL031AI electrical characteristics at specified free-air temperature (continued)
TL031I, TL031AI
PARAMETER
Total power dissipation
Supply current
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
mW
µA
T
CC±
TYP
CC±
MIN
A
MIN
MAX
2.5
TYP
6.5
MAX
25°C
–40°C
85°C
1.9
1.4
8.4
8.4
P
V
V
= 0,
= 0,
No load
No load
2.5
5.4
D
O
1.9
2.5
6.2
8.4
25°C
192
144
189
250
250
250
217
181
207
280
280
280
I
–40°C
85°C
CC
O
TL031I and TL031AI operating characteristics at specified free-air temperature
TL031I, TL031AI
PARAMETER
TEST CONDITIONS
T
V
= ±5 V
V = ±15 V
CC±
UNIT
V/µs
V/µs
ns
A
CC±
TYP
MIN
MAX
MIN
1.5
1
TYP
2.9
2.1
3.3
5.1
4.8
4.9
132
123
146
132
123
146
5%
5%
7%
61
MAX
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
2
1.6
Positive slew rate at
SR+
SR–
†
unity gain
2.3
1.5
1.5
1.5
1.5
R
= 10 kΩ
See Figure 1
C
= 100 pF,
L
L
3.9
Negative slew rate at unity
3.3
†
gain
4.1
V
= ±10 mV,
138
132
154
138
132
154
I(PP)
= 10 kΩ,
t
Rise time
R
C
= 100 pF,
r
f
L
L
See Figures 1 and 2
= ±10 mV,
V
I(PP)
= 10 kΩ,
t
Fall time
R
C
= 100 pF,
ns
L
L
See Figure 1
= ±10 mV,
V
11%
12%
13%
61
I(PP)
= 10 kΩ,
Overshoot factor
R
C
= 100 pF,
L
L
See Figures 1 and 2
f = 10 Hz
TL031I
25°C
25°C
25°C
Equivalent
input
noise voltage
f = 1 kHz
f = 10 Hz
f = 1 kHz
41
41
R
= 20 Ω,
See Figure 3
S
V
I
nV/√Hz
n
61
61
TL031AI
41
41
60
Equivalent input noise
current
f = 1 kHz
0.003
0.003
pA/√Hz
n
25°C
–40°C
85°C
1
1
1.1
1.1
1
V = 10 mV
R = 10 kΩ,
L
I
B
Unity-gain bandwidth
MHz
1
C
= 25 pF,
See Figure 4
L
0.9
61°
60°
60°
25°C
65°
65°
64°
V = 10 mV,
R = 10 kΩ,
L
I
φ
m
Phase margin at unity gain
–40°C
85°C
C
= 25 pF
See Figure 4
= ±1 V; for V = ±15 V, V = ±5 V.
CC± I(PP)
L
†
For V
= ±5 V, V
CC±
I(PP)
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL031M and TL031AM electrical characteristics at specified free-air temperature
TL031M, TL031AM
= ±5 V
PARAMETER
TEST CONDITIONS
V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
3.5
TYP
MAX
25°C
Full range
25°C
0.54
0.5
1.5
4.5
0.8
3.8
TL031M
†
6.5
V
IO
Input offset voltage
mV
0.41
2.8
0.34
TL031AM
†
Full range
5.8
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
25°C to
125°C
TL031M
5.1
5.1
4.3
4.3
Temperature coefficient of
input offset voltage
α
µV/°C
VIO
25°C to
125°C
TL031AM
Input offset voltage
long-term drift
25°C
0.04
0.04
µV/mo
‡
V
= 0,
V
V
= 0,
= 0,
25°C
125°C
25°C
1
0.2
2
100
10
1
0.2
2
100
10
pA
nA
pA
nA
O
IC
I
I
Input offset current
Input bias current
IO
See Figure 5
= 0,
V
O
200
20
200
20
IC
IB
See Figure 5
125°C
7
8
–1.5
to
–3.4
to
–11.5 –13.4
25°C
to
to
4
5.4
14
15.4
Common-mode input
voltage range
V
ICR
V
–1.5
to
–11.5
to
†
Full range
4
14
25°C
–55°C
125°C
25°C
3
3
4.3
4.1
13
13
13
14
14
14
Maximum positive peak
output voltage swing
V
V
R
R
R
= 10 kΩ
= 10 kΩ
= 10 kΩ
V
V
OM+
L
L
L
3
4.4
–3
–3
–3
4
–4.2
–4
–12.5 –13.9
–12.5 –13.8
Maximum negative peak
output voltage swing
–55°C
125°C
25°C
OM–
–4.3
12
–12.5
–14
14.3
10.4
15
5
4
4
Large-signal differential
A
VD
–55°C
125°C
25°C
3
7.1
V/mV
§
voltage amplification
3
12.9
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
25°C
5
87
87
87
96
96
96
4
94
94
94
96
95
96
pF
i
25°C
70
70
70
75
75
75
75
70
70
75
75
75
CMR
R
Common-mode
rejection ratio
V
V
= V
min,
IC
O
ICR
= 0, R = 50 Ω
–55°C
125°C
25°C
dB
dB
S
Supply-voltage
rejection ratio
k
V
O
= 0,
= 0,
R = 50 Ω
S
–55°C
125°C
25°C
SVR
(∆V
/∆V )
CC±
IO
1.9
1.1
1.8
2.5
2.5
2.5
6.5
4.7
5.8
8.4
8.4
8.4
P
Total power dissipation
V
O
No load
–55°C
125°C
mW
D
†
‡
Full range is –55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
At V
CC±
= ±5 V, V = ±2.3 V; at V = ±15 V, V = ±10 V.
CC± O
O
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL031M and TL031AM electrical characteristics at specified free-air temperature (continued)
TL031M, TL031AM
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
250
250
250
TYP
217
156
197
MAX
25°C
–55°C
125°C
192
114
178
280
280
280
I
Supply current
V
O
= 0,
No load
µA
CC
TL031M and TL031AM operating characteristics at specified free-air temperature
TL031M, TL031AM
PARAMETER
TEST CONDITIONS
T
V
= ±5 V
V = ±15 V
CC±
UNIT
V/µs
V/µs
ns
A
CC±
TYP
MIN
MAX
MIN
1.5
1
TYP
2.9
1.9
3.5
5.1
4.6
4.7
132
123
158
132
123
158
5%
6%
8%
61
MAX
25°C
–55°C
125°C
25°C
2
1.4
Positive slew rate at
SR+
SR–
†
unity gain
2.4
1
R
= 10 kΩ,
See Figure 1
C
= 100 pF,
L
L
3.9
1.5
1
Negative slew rate at
–55°C
125°C
25°C
3.2
†
unity gain
4.1
1
V
= ±10 mV,
138
142
166
138
142
166
I(PP)
= 10 kΩ,
t
Rise time
R
C
L
= 100 pF,
–55°C
125°C
25°C
r
f
L
See Figures 1 and 2
= ±10 mV,
V
I(PP)
= 10 kΩ,
t
Fall time
R
C
= 100 pF,
–55°C
125°C
25°C
ns
L
L
See Figure 1
= ±10 mV,
V
11%
16%
14%
61
I(PP)
= 10 kΩ,
Overshoot factor
R
C
= 100 pF,
–55°C
125°C
L
L
See Figures 1 and 2
f = 10 Hz
TL031M
25°C
25°C
25°C
f = 1 kHz
f = 10 Hz
f = 1 kHz
41
41
Equivalent input
noise voltage
R = 20 Ω,
S
See Figure 3
V
I
nV/√Hz
n
61
61
TL031AM
41
41
Equivalent input noise
current
f = 1 kHz
0.003
0.003
pA/√Hz
n
25°C
–55°C
125°C
25°C
1
1
1.1
1.1
0.9
65°
64°
62°
V = 10 mV,
R = 10 kΩ,
L
I
B
Unity-gain bandwidth
MHz
1
C
= 25 pF,
See Figure 4
L
0.9
61°
57°
59°
V = 10 mV,
R = 10 kΩ,
L
I
L
φ
m
Phase margin at unity gain
–55°C
125°C
C
= 25 pF,
See Figure 4
= ±15 V, V = ±5 V.
I(PP)
†
For V
= ±5 V, V
= ±1 V; for V
CC±
CC±
I(PP)
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL031Y electrical characteristics, T = 25°C
A
TL031Y
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
CC±
TYP
CC±
MIN
MIN
MAX
TYP
MAX
V
Input offset voltage
0.54
0.5
mV
IO
V
R
= 0,
= 50 Ω
V
V
= 0,
= 0,
O
S
IC
Temperature coefficient of
input offset voltage
α
7.1
5.9
µV/°C
VIO
I
I
Input offset current
Input bias current
1
2
1
2
pA
pA
IO
V
O
= 0,
IC
See Figure 5
IB
–3.4
to
5.4
–13.4
to
15.4
Common-mode input voltage
range
V
ICR
V
Maximum positive peak
output voltage swing
V
V
R
R
R
= 10 kΩ
= 10 kΩ
= 10 kΩ
4.3
–4.2
12
14
–13.9
14.3
V
V
OM+
L
L
L
Maximum negative peak
output voltage swing
OM–
Large-signal differential
A
VD
V/mV
†
voltage amplification
12
5
12
4
r
Input resistance
10
10
Ω
i
c
Input capacitance
pF
i
V
R
= V
= 50 Ω
min,
V
= 0,
IC
S
ICR
O
CMRR Common-mode rejection ratio
87
96
94
96
dB
dB
Supply-voltage rejection ratio
k
V
O
= 0,
R = 50 Ω
S
SVR
(∆V /∆V )
CC± IO
P
Total power dissipation
Supply current
1.9
6.5
mW
D
V
O
= 0,
No load
I
192
217
µA
CC
†
At V
CC±
= ±5 V, V = ±2.3 V; at V = ±15 V, V = ±10 V.
CC± O
O
TL031Y operating characteristics, T = 25°C
A
TL031Y
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
CC±
CC±
MIN
MIN
TYP
MAX
TYP
MAX
‡
R
C
= 10 kΩ,
= 100 pF,
R
C
= 10 kΩ,
= 100 pF,
SR+
SR–
2
2.9
V/µs
V/µs
Positive slew rate at unity gain
L
L
L
L
‡
3.9
5.1
Negative slew rate at unity gain
See Figure 1 See Figure 1
t
t
Rise time
V
= ±10 mV,
138
138
11%
61
132
132
5%
ns
ns
r
I(PP)
= 10 kΩ,
Fall time
R
C = 100 pF,
L
f
L
Overshoot factor
See Figures 1 and 2
f = 10 Hz
f = 1 kHz
61
R
= 20 Ω,
S
V
I
Equivalent input noise voltage
Equivalent input noise current
Unity-gain bandwidth
nV/√Hz
n
See Figure 3
41
41
f = 1 kHz
0.003
0.003
pA/√Hz
n
V = 10 mV,
R = 10 kΩ,
L
I
B
1
1.1
MHz
1
C
= 25 pF,
See Figure 4
R = 10 kΩ,
L
L
V = 10 mV,
I
φ
Phase margin at unity gain
61°
65°
m
C
= 25 pF,
See Figure 4
L
‡
For V
= ±5 V, V
= ±1 V; for V = ±15 V, V
CC± I(PP)
= ±5 V.
CC±
I(PP)
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL032C and TL032AC electrical characteristics at specified free-air temperature
TL032C, TL032AC
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
3.5
TYP
MAX
25°C
Full range
25°C
0.69
0.57
1.5
2.5
0.8
1.8
TL032C
†
4.5
V
IO
Input offset voltage
mV
0.53
2.8
0.39
TL032AC
= 0,
†
Full range
3.8
V
V
R
O
25°C to
70°C
= 0,
= 50 Ω
IC
TL032C
11.5
11.5
0.04
10.8
10.8
0.04
Temperature coefficient
of input offset voltage
S
α
µV/°C
VIO
25°C to
70°C
TL032AC
25
Input offset voltage
long-term drift
25°C
µV/mo
pA
‡
25°C
70°C
25°C
70°C
1
9
100
200
200
400
1
12
2
100
200
200
400
V
O
= 0,
See Figure 5
V
V
= 0,
= 0,
IC
I
I
Input offset current
Input bias current
IO
2
V
O
= 0,
See Figure 5
IC
pA
IB
50
80
–1.5
to
–3.4
to
–11.5 –13.4
25°C
to
to
4
5.4
14
15.4
Common-mode input
voltage range
V
ICR
V
–1.5
to
–11.5
to
†
Full range
4
14
25°C
0°C
3
3
4.3
4.2
13
13
13
14
14
14
Maximum positive peak
output voltage swing
V
V
R
R
R
= 10 kΩ
= 10 kΩ
= 10 kΩ
V
V
OM+
L
L
L
70°C
25°C
0°C
3
4.3
–3
–3
–3
4
–4.2
–4.1
–4.2
12
–12.5 –13.9
–12.5 –13.9
Maximum negative
peak output voltage
swing
OM–
70°C
25°C
0°C
–12.5
–14
14.3
13.5
15.2
5
4
5
Large-signal differential
A
VD
3
11.1
13.3
V/mV
§
voltage amplification
70°C
25°C
25°C
25°C
0°C
4
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
5
87
87
87
96
96
96
14
94
94
94
96
96
96
pF
i
70
70
70
75
75
75
75
75
75
75
75
75
Common-mode
rejection ratio
V
IC
V
O
= V
min,
ICR
= 0, R = 50 Ω
CMRR
dB
dB
S
70°C
25°C
0°C
Supply-voltage
rejection ratio
V
= ±5 V to ±15 V,
CC±
k
SVR
O
S
(∆V
/∆V )
CC±
IO
70°C
†
‡
Full range is 0°C to 70°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
At V
CC±
= ±5 V, V = 2.3 V; at V = ±15 V, V = ±10 V.
CC± O
O
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL032C and TL032AC electrical characteristics at specified free-air temperature (continued)
TL032C, TL032AC
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
5
TYP
13
MAX
25°C
0°C
3.8
3.7
17
17
Total power dissipation
(two amplifiers)
P
D
V
V
= 0,
= 0,
No load
No load
5
12.7
12.6
422
420
120
mW
O
70°C
0°C
3.8
5
17
368
378
120
500
500
560
560
Supply current
(two amplifiers)
I
µA
CC
O
70°C
25°C
V /V
O1 O2
Crosstalk attenuation
A
VD
= 100 dB
dB
TL032C and TL032AC operating characteristics at specified free-air temperature
TL032C, TL032AC
PARAMETER
TEST CONDITIONS
T
V
= ±5 V
V = ±15 V
CC
±
UNIT
V/µs
V/µs
ns
A
CC±
TYP
MIN
MAX
MIN
1.5
1
TYP
2.9
2.6
3.2
5.1
5
MAX
25°C
0°C
12
1.8
2.2
3.9
3.7
4
Positive slew rate at unity
SR+
SR–
†
gain
70°C
25°C
0°C
1.5
1.5
1.5
1.5
R
= 10 kΩ, C = 100 pF,
L
See Figure 1
L
Negative slew rate at unity
†
gain
70°C
25°C
0°C
5
138
134
150
138
134
150
132
127
142
132
127
142
5%
4%
6%
49
t
Rise time
r
f
70°C
25°C
0°C
V
R
= ±10 V,
I(PP)
t
Fall time
ns
= 10 kΩ, C = 100 pF,
L
L
See Figures 1 and 2
70°C
25°C
0°C
11%
10%
12%
49
Overshoot factor
70°C
f = 10 Hz
TL032C
25°C
25°C
f = 1 kHz
f = 10 Hz
f = 1 kHz
41
41
R
= 20 Ω,
See Figure 3
Equivalent input
noise voltage
S
V
I
nV/√Hz
n
49
49
TL032AC
41
41
60
Equivalent input noise current
Unity-gain bandwidth
f = 1 kHz
25°C
25°C
0°C
0.003
1
0.003
1.1
1.1
1
pA/√Hz
n
V = 10 mV,
R = 10 kΩ,
L
I
L
B
1
1
MHz
C
= 25 pF,
See Figure 4
70°C
25°C
0°C
1
61°
61°
60°
65°
65°
64°
V = 10 mV,
R = 10 kΩ,
L
See Figure 4
I
L
φ
m
Phase margin at unity gain
C
= 25 pF,
70°C
†
For V
= ±5 V, V
= ±1 V; for V = ±15 V, V
CC± I(PP)
= ±5 V.
CC±
I(PP)
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL032I and TL032AI electrical characteristics at specified free-air temperature
TL032I, TL032AI
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
3.5
TYP
MAX
25°C
Full range
25°C
0.69
0.53
0.57
1.5
3.3
0.8
2.6
TL032I
†
5.3
V
IO
Input offset voltage
mV
2.8
0.39
TL032AI
†
Full range
4.6
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
25°C to
85°C
TL032I
11.4
11.4
0.04
10.8
10.8
0.04
Temperature coefficient
of input offset voltage
α
µV/°C
VIO
25°C to
85°C
TL032AI
25
Input offset voltage
long-term drift
25°C
µV/mo
‡
25°C
85°C
25°C
85°C
1
0.02
2
100
0.45
200
0.9
1
0.02
2
100
0.45
200
0.9
pA
nA
pA
nA
V
= 0,
V
V
= 0,
= 0,
O
IC
I
I
Input offset current
Input bias current
IO
See Figure 5
V
O
= 0,
IC
IB
See Figure 5
0.2
0.3
–1.5
to
–3.4
to
–11.5 –13.4
25°C
to
to
4
5.4
14
15.4
Common-mode input
voltage range
V
V
V
ICR
–1.5
to
–11.5
to
†
Full range
4
14
25°C
–40°C
85°C
25°C
–40°C
85°C
–40°C
85°C
25°C
25°C
25°C
–40°C
85°C
25°C
–40°C
85°C
3
3
4.3
4.2
13
13
13
14
14
14
Maximum positive peak
output voltage swing
V
V
R
= 10 kΩ
OM+
L
3
4.4
–3
–3
–3
3
–4.2
–4.1
–4.2
8.4
–12.5 –13.9
–12.5 –13.8
Maximum negative
peak output voltage
swing
R
R
= 10 kΩ
= 10 kΩ
V
OM–
L
L
–12.5
–14
11.6
15.3
4
5
Large-signal differential
A
VD
V/mV
§
voltage amplification
4
13.5
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
5
87
87
87
96
96
96
4
94
94
94
96
96
96
pF
i
70
70
70
75
75
75
75
75
75
75
75
75
Common-mode
rejection ratio
V
IC
V
O
= V
min,
ICR
= 0, R = 50 Ω
CMRR
dB
dB
S
Supply-voltage
rejection ratio
V
V
= ±5 V to ±15 V,
CC±
k
SVR
(∆V
/∆V )
CC±
IO
= 0,
R = 50 Ω
S
O
†
‡
Full range is –40°C to 85°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
At V
CC±
= ±5 V, V = 2.3 V; at V = ±15 V, V = ±10 V.
CC± O
O
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL032I and TL032AI electrical characteristics at specified free-air temperature (continued)
TL032I, TL032AI
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
5
TYP
13
MAX
25°C
–40°C
85°C
3.8
2.9
17
17
Total power dissipation
(two amplifiers)
P
D
V
= 0,
= 0,
No load
No load
5
10.9
12.4
434
362
414
120
mW
O
O
3.7
5
17
25°C
384
288
372
120
500
500
500
560
560
560
Supply current
(two amplifiers)
I
V
–40°C
85°C
µA
CC
V /V
O1 O2
Crosstalk attenuation
A
VD
= 100 dB
25°C
dB
TL032I and TL032AI operating characteristics at specified free-air temperature
TL032I, TL032AI
PARAMETER
TEST CONDITIONS
T
V
= ±5 V
V = ±15 V
CC±
UNIT
V/µs
V/µs
ns
A
CC±
TYP
MIN
MAX
MIN
1.5
1
TYP
2.9
2.1
3.3
5.1
4.8
4.9
132
123
146
132
123
146
5%
5%
7%
49
MAX
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
2
1.6
Positive slew rate at unity
SR+
SR–
†
gain
2.3
1.5
1.5
1.5
1.5
R
= 10 kΩ, C = 100 pF
L
L
3.9
Negative slew rate at unity
3.3
†
gain
4.1
138
132
154
138
132
154
V
R
= ±10 V,
I(PP)
t
r
Rise time
= 10 kΩ, C = 100 pF,
L
L
See Figures 1 and 2
V
R
= ±10 V,
I(PP)
t
f
Fall time
ns
= 10 kΩ, C = 100 pF,
L
L
See Figure 1
11%
12%
13%
49
V
R
= ±10 V,
I(PP)
= 10 kΩ, C = 100 pF,
Overshoot factor
L
L
See Figures 1 and 2
f = 10 Hz
TL032I
25°C
f = 1 kHz
f = 10 Hz
f = 1 kHz
41
41
R
= 20 Ω,
See Figure 3
Equivalent input
noise voltage
S
V
n
nV/√Hz
49
49
TL032AI
25°C
25°C
41
41
60
Equivalent input noise
current
I
n
f = 1 kHz
0.003
0.003
pA/√Hz
25°C
–40°C
85°C
1
1
1.1
1.1
1
V = 10 mV,
R = 10 kΩ,
L
I
B
Unity-gain bandwidth
MHz
1
C
= 25 pF,
See Figure 4
L
0.9
61°
61°
60°
25°C
65°
65°
64°
V = 10 mV,
R = 10 kΩ,
L
I
L
φ
m
Phase margin at unity gain
–40°C
85°C
C
= 25 pF,
See Figure 4
= ±15 V, V = ±5 V.
I(PP)
†
For V
= ±5 V, V
= ±1 V; for V
CC±
CC±
I(PP)
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL032M and TL032AM electrical characteristics at specified free-air temperature
TL032M, TL032AM
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
3.5
TYP
MAX
25°C
Full range
25°C
0.69
0.53
0.57
1.5
4.5
0.8
3.8
TL032M
†
6.5
V
IO
Input offset voltage
mV
2.8
0.39
TL032AM
†
Full range
5.8
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
25°C to
125°C
TL032M
9.7
9.7
9.7
9.7
Temperature coefficient
of input offset voltage
α
µV/°C
VIO
25°C to
125°C
TL032AM
Input offset voltage
long-term drift
25°C
0.04
0.04
µV/mo
‡
25°C
125°C
25°C
1
0.2
2
100
10
1
0.2
2
100
10
pA
nA
pA
nA
V
= 0,
V
V
= 0,
= 0,
O
IC
I
I
Input offset current
Input bias current
IO
See Figure 5
200
20
200
20
V
O
= 0,
IC
IB
See Figure 5
125°C
7
8
–1.5
to
–3.4
to
–11.5 –13.4
25°C
to
to
4
5.4
14
15.4
Common-mode input
voltage range
V
ICR
V
–1.5
to
–11.5
to
†
Full range
4
14
25°C
–55°C
125°C
25°C
3
3
4.3
4.1
13
13
13
14
14
14
Maximum positive peak
output voltage swing
V
V
R
R
R
= 10 kΩ
= 10 kΩ
= 10 kΩ
V
V
OM+
L
L
L
3
4.4
–3
–3
–3
4
–4.2
–4
–12.5 –13.9
–12.5 –13.8
Maximum negative peak
output voltage swing
–55°C
125°C
25°C
OM–
–4.3
12
–12.5
–14
14.3
10.4
15
5
4
4
Large-signal differential
A
VD
–55°C
125°C
25°C
3
7.1
V/mV
§
voltage amplification
3
12.9
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
25°C
5
87
87
87
96
95
96
4
94
94
94
96
95
96
pF
i
25°C
70
70
70
75
75
75
75
70
70
75
75
75
Common-mode rejection
ratio
V
V
= V
min,
IC
O
ICR
= 0, R = 50 Ω
CMRR
–55°C
125°C
25°C
dB
dB
S
Supply-voltage
rejection ratio
V
= ±5 V to ±15 V,
CC±
O
k
–55°C
125°C
SVR
S
(∆V
/∆V )
CC±
IO
†
‡
Full range is –55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
At V
CC±
= ±5 V, V = 2.3 V; at V = ±15 V, V = ±10 V.
CC± O
O
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL032M and TL032AM electrical characteristics at specified free-air temperature (continued)
TL032M, TL032AM
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
5
TYP
13
MAX
25°C
–55°C
125°C
25°C
3.8
2.3
17
17
Total power dissipation
(two amplifiers)
P
D
V
V
= 0,
= 0,
No load
No load
5
9.4
mW
O
3.6
5
11.8
434
312
394
120
17
384
228
356
120
500
500
500
560
560
560
Supply current
(two amplifiers)
I
–55°C
125°C
25°C
µA
CC
O
V /V
O1 O2
Crosstalk attenuation
A
= 100 dB
dB
VD
TL032M and TL032AM operating characteristics at specified free-air temperature
TL032M, TL032AM
PARAMETER
TEST CONDITIONS
T
V
= ±5 V
V = ±15 V
CC±
UNIT
V/µs
V/µs
A
CC±
TYP
MIN
MAX
MIN
1.5
1
TYP
2.9
1.9
3.5
5.1
4.6
4.7
132
123
58
MAX
25°C
–55°C
125°C
25°C
2
1.4
Positive slew rate at unity
SR+
SR–
†
gain
R
C
= 10 kΩ,
= 100 pF,
See and Figure 1
L
L
2.4
1
3.9
1.5
1
Negative slew rate at unity
–55°C
125°C
25°C
3.2
†
gain
4.1
1
V
R
C
= ±10 V,
= 10 kΩ,
138
142
166
138
142
166
I(PP)
L
L
–55°C
125°C
25°C
t
Rise time
ns
ns
r
f
= 100 pF,
See Figures 1 and 2
V
R
C
= ±10 V,
= 10 kΩ,
132
123
158
5%
6%
8%
49
I(PP)
L
L
–55°C
125°C
25°C
t
Fall time
= 100 pF,
See Figure 1
V
R
C
= ±10 V,
= 10 kΩ,
11%
16%
14%
49
I(PP)
L
L
–55°C
125°C
Overshoot factor
= 100 pF,
See Figures 1 and 2
f = 10 Hz
TL032M
25°C
Equivalent
input noise
voltage
f = 1 kHz
f = 10 Hz
f = 1 kHz
41
41
R
= 20 Ω,
See Figure 3
S
V
I
nV/√Hz
n
49
49
TL032AM
25°C
25°C
41
41
Equivalent input noise
current
f = 1 kHz
0.003
0.003
pA/√Hz
n
25°C
–55°C
125°C
25°C
1
1
1.1
1.1
0.9
65°
64°
62°
V = 10 mV,
R = 10 kΩ,
L
I
B1
Unity-gain bandwidth
MHz
C
= 25 pF,
See Figure 4
L
0.9
61°
57°
59°
V = 10 mV,
R = 10 kΩ,
L
I
φ
m
Phase margin at unity gain
–55°C
125°C
= 25 p,
= ±1 V; for V = ±15 V, V = ±5 V.
CC± I(PP)
L
†
For V
= ±5 V, V
CC±
I(PP)
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL032Y electrical characteristics, T = 25°C
A
TL032Y
PARAMETER
TEST CONDITIONS
V
= ±5 V
CC±
TYP
V
= ±15 V
UNIT
CC±
MIN
MIN
MAX
TYP
MAX
V
Input offset voltage
0.69
0.57
mV
IO
V
R
= 0,
= 50 Ω
V
= 0,
O
S
IC
Temperature coefficient of
input offset voltage
α
11.5
10.8
1
µV/°C
VIO
V
O
= 0,
V
V
= 0,
= 0,
IC
I
I
Input offset current
Input bias current
1
2
pA
pA
IO
See Figure 5
V
O
= 0,
IC
2
IB
See Figure 5
–3.4
to
5.4
–13.4
to
15.4
V
ICR
Common-mode input voltage range
V
Maximum positive peak
output voltage swing
V
V
R
R
R
= 10 kΩ
= 10 kΩ
= 10 kΩ
4.3
–4.2
12
14
–13.9
14.3
V
V
OM+
L
L
L
Maximum negative peak
output voltage swing
OM–
Large-signal differential
A
VD
V/mV
†
voltage amplification
12
5
12
14
r
Input resistance
10
10
Ω
i
c
Input capacitance
pF
i
V
V
= V
min,
IC
O
ICR
= 0, R = 50 Ω
CMRR
Common-mode rejection ratio
87
96
94
96
13
dB
dB
S
Supply-voltage rejection ratio
V
V
= ±5 V to ±15 V,
= 0, R = 50 Ω
S
CC±
O
k
SVR
(∆V /∆V
CC± IO
)
Total power dissipation
(two amplifiers)
P
D
V
O
= 0,
No load
3.8
mW
dB
V /V
O1 O2
Crosstalk attenuation
A
= 100 dB
120
120
VD
= ±15 V, V = ±10 V.
†
At V
= ±5 V, V = 2.3 V; at V
CC±
CC±
O
O
TL032Y operating characteristics, T = 25°C
A
TL032Y
PARAMETER
TEST CONDITIONS
V
CC±
= ±5 V
V = ±15 V
CC
±
UNIT
MIN
TYP
MAX
MIN
TYP
2.9
5.1
132
132
5%
49
MAX
†
SR+
SR–
R
= 10 kΩ,
C
= 100 pF,
L
12
V/µs
V/µs
ns
Positive slew rate at unity gain
L
†
See Figure 1 and Note 8
= ±10 V,
3.9
Negative slew rate at unity gain
t
t
Rise time
V
138
138
11%
49
r
I(PP)
= 10 kΩ,,
Fall time
R
C
= 100 pF,
L
ns
f
L
Overshoot factor
See Figures 1 and 2
f = 10 Hz
f = 1 kHz
R
= 20 Ω,
S
V
I
Equivalent input noise voltage
nV/√Hz
n
See Figure 3
41
41
Equivalent input noise current
Unity-gain bandwidth
f = 1 kHz
0.003
0.003
pA/√Hz
n
V = 10 mV,
R = 10 kΩ,
L
I
B
1
1
1.1
MHz
C
= 25 pF,
See Figure 4
R = 10 kΩ,
L
L
V = 10 mV,
I
φ
m
Phase margin at unity gain
61°
65°
C
= 25 pF,
See Figure 4
L
†
For V
= ±5 V, V
= ±1 V; for V = ±15 V, V
CC± I(PP)
= ±5 V.
CC±
I(PP)
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL034C and TL034AC electrical characteristics at specified free-air temperature
TL034C, TL034AC
= ±5 V
PARAMETER
TEST CONDITIONS
V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
6
TYP
MAX
25°C
Full range
25°C
0.91
0.7
0.79
4
6.2
1.5
3.7
TL034C
†
8.2
3.5
5.7
V
IO
Input offset voltage
mV
0.58
TL034AC
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
†
Full range
25°C to
70°C
TL034C
11.6
11.6
0.04
12
12
Temperature coefficient of
input offset voltage
α
µV/°C
VIO
25°C to
70°C
TL034AC
25
Input offset voltage
25°C
0.04
µV/mo
‡
long-term drift
25°C
70°C
25°C
70°C
1
9
100
200
200
400
1
12
2
100
200
200
400
V
= 0, V = 0,
IC
O
I
I
Input offset current
Input bias current
pA
IO
See Figure 5
2
V
O
= 0, V = 0,
IC
pA
IB
See Figure 5
50
80
–1.5
to
–3.4
to
–11.5 –13.4
25°C
to
to
4
5.4
14
15.4
Common-mode input
voltage range
V
ICR
V
–1.5
to
–11.5
to
†
Full range
4
14
25°C
0°C
3
3
4.3
4.2
13
13
13
14
14
14
Maximum positive peak
output voltage swing
V
V
R
R
R
= 10 kΩ
= 10 kΩ
= 10 kΩ
V
V
OM+
L
L
L
70°C
25°C
0°C
3
4.3
–3
–3
–3
4
–4.2
–4.1
–4.2
12
–12.5 –13.9
–12.5 –13.9
Maximum negative peak
output voltage swing
OM–
70°C
25°C
0°C
–12.5
–14
14.3
13.5
15.2
5
4
5
Large-signal differential
A
VD
3
11.1
13.3
V/mV
§
voltage amplification
70°C
25°C
25°C
25°C
0°C
4
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
5
87
87
87
96
96
96
14
94
94
94
96
96
96
pF
i
70
70
70
75
75
75
75
75
75
75
75
75
V
V
R
= V
= 0,
min,
ICR
IC
O
Common-mode
rejection ratio
CMRR
dB
dB
= 50 Ω
S
70°C
25°C
0°C
Supply-voltage
rejection ratio
k
V
O
= 0, R = 50 Ω
S
SVR
(∆V
/∆V )
CC±
IO
70°C
†
‡
Full range is 0°C to 70°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
At V
CC±
= ±5 V, V = ±2.3 V; at V = ±15 V, V = ±10 V.
CC± O
O
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL034C and TL034AC electrical characteristics at specified free-air temperature (continued)
TL034C, TL034AC
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
10
10
10
1
TYP
26
MAX
25°C
0°C
7.7
7.4
7.6
34
34
Total power dissipation
(two amplifiers)
P
D
V
= 0, No load
= 0, No load
25.3
25.2
0.87
0.85
0.84
120
mW
O
O
70°C
25°C
0°C
34
0.77
0.74
0.76
120
1.12
1.12
1.12
I
Supply current (four amplifiers)
Crosstalk attenuation
V
1
mA
dB
CC
70°C
25°C
1
V /V
O1 O2
A
VD
= 100
TL034C and TL034AC operating characteristics at specified free-air temperature
TL034C, TL034AC
PARAMETER
TEST CONDITIONS
T
V
= ±5 V
V = ±15 V
CC
±
UNIT
V/µs
V/µs
A
CC±
TYP
MIN
MAX
MIN
1.5
1
TYP
MAX
25°C
0°C
2
1.8
2.2
3.9
3.7
4
2.9
2.6
3.2
5.1
5
Positive slew rate at unity
SR+
SR–
†
gain
R
C
= 10 kΩ,
= 100 pF,
See Figure 1
L
L
70°C
25°C
0°C
1.5
1.5
1.5
1.5
Negative slew rate at unity
†
gain
70°C
25°C
0°C
5
V
R
C
= ±10 V,
= 10 kΩ,
138
134
150
138
134
150
132
127
142
132
127
142
5%
4%
6%
83
I(PP)
L
L
t
Rise time
ns
ns
r
f
= 100 pF,
See Figures 1 and 2
70°C
25°C
0°C
V
R
C
= ±10 V,
= 10 kΩ,
I(PP)
L
L
t
Fall time
= 100 pF,
See Figure 1
70°C
25°C
0°C
V
R
C
= ±10 V,
= 10 kΩ,
11%
10%
12%
83
I(PP)
L
L
Overshoot factor
= 100 pF,
See Figures 1 and 2
70°C
f = 10 Hz
TL034C
25°C
25°C
f = 1 kHz
f = 10 Hz
f = 1 kHz
43
43
R
= 20 Ω,
See Figure 3
Equivalent input
noise voltage
S
V
I
nV/√Hz
n
83
83
TL034AC
43
43
60
Equivalent input noise current
Unity-gain bandwidth
f = 1 kHz
25°C
25°C
0°C
0.003
1
0.003
1.1
1.1
1
pA/√Hz
n
V = 10 mV, R = 10 kΩ,
I
L
L
B
1
1
MHz
C
= 25 pF, See Figure 4
70°C
25°C
0°C
1
61°
61°
60°
65°
65°
64°
V = 10 mV, R = 10 kΩ,
I
L
L
φ
m
Phase margin at unity gain
C
= 25 pF, See Figure 4
70°C
†
For V
= ±5 V, V
= ±1 V; for V
CC±
= ±15 V, V
= ±5 V.
I(PP)
CC±
I(PP)
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL034I and TL034AI electrical characteristics at specified free-air temperature
TL034I, TL034AI
= ±5 V
PARAMETER
TEST CONDITIONS
V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
3.6
TYP
MAX
25°C
Full range
25°C
0.91
0.7
0.79
4
7.3
1.5
4.8
TL034I
†
9.3
V
IO
Input offset voltage
mV
3.5
0.58
TL034AI
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
†
Full range
6.8
25°C to
85°C
TL034I
11.5
11.5
0.04
11.6
11.6
0.04
Temperature coefficient
of input offset voltage
α
µV/°C
VIO
25°C to
85°C
TL034AI
25
Input offset voltage
long-term drift
25°C
µV/mo
‡
25°C
85°C
25°C
85°C
1
0.02
2
100
0.45
200
0.9
1
0.02
2
100
0.45
200
0.9
pA
nA
pA
nA
V
= 0, V = 0,
IC
O
I
I
Input offset current
Input bias current
IO
See Figure 5
V
O
= 0, V = 0,
IC
IB
See Figure 5
0.2
0.3
–1.5
to
–3.4
to
–11.5 –13.4
25°C
to
to
4
5.4
14
15.4
Common-mode input
voltage range
V
V
V
ICR
–1.5
to
–11.5
to
†
Full range
4
14
25°C
–40°C
85°C
25°C
–40°C
85°C
–40°C
85°C
25°C
25°C
25°C
–40°C
85°C
25°C
–40°C
85°C
3
3
4.3
4.1
13
13
13
14
14
14
Maximum positive peak
output voltage swing
V
V
R
= 10 kΩ
OM+
L
3
4.4
–3
–3
–3
4
–4.2
–4.1
–4.2
12
–12.5 –13.9
–12.5 –13.8
Maximum negative peak
output voltage swing
R
R
= 10 kΩ
= 10 kΩ
V
OM–
L
L
–12.5
–14
14.3
11.6
5
4
Large-signal differential
A
VD
V/mV
§
voltage amplification
3
8.4
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
5
87
87
87
96
96
96
4
94
94
94
96
96
96
pF
i
70
70
70
75
75
75
75
75
75
75
75
75
V
V
R
= V
= 0,
min,
ICR
IC
O
Common-mode
rejection ratio
CMRR
dB
dB
= 50 Ω
S
Supply-voltage
rejection ratio
k
V
O
= 0, R = 50 Ω
S
SVR
(∆V
/ ∆V )
CC±
IO
†
‡
Full range is –40°C to 85°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
At V
CC±
= ±5 V, V = ±2.3 V; at V = ±15 V, V = ±10 V.
CC± O
O
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL034I and TL034AI electrical characteristics at specified free-air temperature (continued)
TL034I, TL034AI
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
10
10
10
1
TYP
26
MAX
25°C
–40°C
85°C
7.7
5.8
7.4
34
34
Total power dissipation
(four amplifiers)
P
D
V
= 0, No load
= 0, No load
21.7
24.8
0.87
0.72
0.83
120
mW
O
O
34
25°C
0.77
0.58
0.74
120
1.12
1.12
1.12
I
Supply current (four amplifiers)
Crosstalk attenuation
V
–40°C
85°C
1
mA
dB
CC
1
V /V
O1 O2
A
VD
= 100
25°C
TL034I and TL034AI operating characteristics
TL034I, TL034AI
= ±5 V V = ±15 V
CC±
PARAMETER
TEST CONDITIONS
T
V
UNIT
V/µs
V/µs
ns
A
CC±
MIN
TYP
MAX
MIN
1.5
1
TYP
2.9
2.1
3.3
5.1
4.8
4.9
132
123
146
132
123
146
5%
5%
7%
83
MAX
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
2
Positive slew rate at unity
SR+
SR–
1.6
2.3
3.9
3.3
4.1
138
132
154
138
132
154
11%
12%
13%
83
†
gain
1.5
1.5
1.5
1.5
R
= 10 kΩ,
See Figure 1
C = 100 pF,
L
L
Negative slew rate at unity
†
gain
t
t
Rise time
r
V
R
C
= ±10 V,
= 10 kΩ,
I(PP)
L
L
Fall time
ns
f
= 100 pF,
See Figures 1 and 2
Overshoot factor
f = 10 Hz
TL034I
25°C
f = 1 kHz
f = 10 Hz
f = 1 kHz
43
43
R
= 20 Ω,
See Figure 3
Equivalent input
noise voltage
S
V
I
nV/√Hz
n
83
83
TL034AI
25°C
25°C
43
43
60
Equivalent input noise
current
f = 1 kHz
0.003
0.003
pA/√Hz
n
25°C
–40°C
85°C
1
1
1.1
1.1
1
V = 10 mV,
R = 10 kΩ,
L
I
B
Unity-gain bandwidth
MHz
1
C
= 25 pF,
See Figure 4
L
0.9
61°
61°
60°
25°C
65°
65°
64°
V = 10 mV,
R = 10 kΩ,
L
I
φ
m
Phase margin at unity gain
–40°C
85°C
C
= 25 pF,
See Figure 4
= ±1 V; for V = ±15 V, V = ±5 V.
CC± I(PP)
L
†
For V
= ±5 V, V
CC±
I(PP)
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL034M and TL034AM electrical characteristics at specified free-air temperature
TL034M, TL034AM
= ±5 V
PARAMETER
TEST CONDITIONS
V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
3.6
11
TYP
MAX
25°C
Full range
25°C
0.91
0.7
0.78
4
9
TL034M
†
V
IO
Input offset voltage
mV
3.5
8.5
0.58
1.5
6.5
TL034AM
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
†
Full range
25°C to
125°C
TL034M
10.6
10.6
0.04
10.9
10.9
0.04
Temperature coefficient of
input offset voltage
α
µV/°C
VIO
25°C to
125°C
TL034AM
Input offset voltage
25°C
µV/mo
‡
long-term drift
25°C
125°C
25°C
1
0.2
2
100
10
1
0.2
2
100
10
pA
nA
pA
nA
V
= 0, V = 0,
IC
O
I
I
Input offset current
Input bias current
IO
See Figure 5
200
20
200
20
V
O
= 0, V = 0,
IC
IB
See Figure 5
125°C
7
8
–1.5
to
–3.4
to
–11.5 –13.4
25°C
to
to
4
5.4
14
15.4
Common-mode input
voltage range
V
ICR
V
–1.5
to
–11.5
to
†
Full range
4
14
25°C
–55°C
125°C
25°C
3
3
4.3
4.1
13
13
13
14
14
14
Maximum positive peak
output voltage swing
V
V
R
R
R
= 10 kΩ
= 10 kΩ
= 10 kΩ
V
V
OM+
L
L
L
3
4.4
–3
–3
–3
4
–4.2
–4
–12.5 –13.9
–12.5 –13.8
Maximum negative peak
output voltage swing
–55°C
125°C
25°C
OM–
–4.3
12
–12.5
–14
14.3
10.4
15
5
4
4
Large-signal differential
A
VD
–55°C
125°C
25°C
3
7.1
V/mV
§
voltage amplification
3
12.9
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
25°C
5
87
87
87
96
95
96
4
94
94
94
96
95
96
pF
i
25°C
70
70
70
75
75
75
75
70
70
75
75
75
Common-mode
rejection ratio
V
V
= V
min,
ICR
S
IC
O
CMRR
–55°C
125°C
25°C
dB
dB
= 0, R = 50 Ω
Supply-voltage
rejection ratio
k
V
O
= 0, R = 50 Ω
–55°C
125°C
SVR
S
(∆V
/∆V )
CC±
IO
†
‡
Full range is –55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to T
25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
=
A
A
§
At V
CC±
= ±5 V, V = ±2.3 V; at V = ±15 V, V = ±10 V.
CC± O
O
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL034M and TL034AM electrical characteristics at specified free-air temperature (continued)
TL034M, TL034AM
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
MIN
A
MIN
MAX
10
TYP
26
MAX
25°C
–55°C
125°C
25°C
7.7
4.6
7.1
34
45
Total power dissipation
(two amplifiers)
P
D
V
= 0,
= 0,
No load
No load
12
18.7
23.6
0.87
0.62
0.79
120
mW
O
O
12
45
0.77
0.46
0.71
120
1
1.12
1.5
1.5
I
Supply current (two amplifiers)
Crosstalk attenuation
V
–55°C
125°C
25°C
1.2
1.2
mA
dB
CC
V /V
O1 O2
A
VD
= 100
TL034M and TL034AM operating characteristics at specified free-air temperature
TL034M, TL034AM
PARAMETER
TEST CONDITIONS
T
V
= ±5 V
V = ±15 V
CC±
UNIT
V/µs
V/µs
A
CC±
TYP
MIN
MAX
MIN
1.5
1
TYP
2.9
1.9
3.5
5.1
4.6
4.7
132
123
58
MAX
25°C
–55°C
125°C
25°C
2
1.4
Positive slew rate at unity
SR+
SR–
†
gain
R
C
= 10 kΩ,
= 100 pF,
See Figure 1
L
L
2.4
1
3.9
1.5
1
Negative slew rate at unity
–55°C
125°C
25°C
3.2
†
gain
4.1
1
V
R
C
= ±10 V,
= 10 kΩ,
138
142
166
138
142
166
I(PP)
L
L
–55°C
125°C
25°C
t
Rise time
ns
ns
r
f
= 100 pF,
See Figures 1 and 2
V
R
C
= ±10 V,
= 10 kΩ,
132
123
158
5%
6%
8%
83
I(PP)
L
L
–55°C
125°C
25°C
t
Fall time
= 100 pF,
See Figure 1
V
R
C
= ±10 V,
= 10 kΩ,
11%
16%
14%
83
I(PP)
L
L
–55°C
125°C
Overshoot factor
= 100 pF,
See Figures 1 and 2
f = 10 Hz
TL034M
25°C
f = 1 kHz
f = 10 Hz
f = 1 kHz
43
43
Equivalent input
noise voltage
R = 20 Ω,
S
See Figure 3
V
I
nV/√Hz
n
83
83
TL034AM
25°C
25°C
43
43
Equivalent input noise
current
f = 1 kHz
0.003
0.003
pA/√Hz
n
25°C
–55°C
125°C
25°C
1
1
1.1
1.1
0.9
65°
64°
62°
V = 10 mV,
R = 10 kΩ,
L
I
B1
Unity-gain bandwidth
MHz
C
= 25 pF,
See Figure 4
L
0.9
61°
57°
59°
V = 10 mV,
R = 10 kΩ,
L
I
L
φ
m
Phase margin at unity gain
–55°C
125°C
C
= 25 pF,
See Figure 4
= ±15 V, V = ±5 V.
I(PP)
†
For V
= ±5 V, V
= ±1 V; for V
CC±
CC±
I(PP)
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TL034Y electrical characteristics, T = 25°C
A
TL034Y
PARAMETER
TEST CONDITIONS
V
= ±5 V
CC±
TYP
V
= ±15 V
UNIT
CC±
MIN
MIN
MAX
TYP
MAX
V
Input offset voltage
0.91
0.79
mV
IO
V
R
= 0,
= 50 Ω
V
IC
= 0,
O
S
Temperature coefficient of input
offset voltage
α
11.6
12
µV/°C
VIO
1
2
2
7
1
2
2
8
V
= 0,
V
V
= 0,
= 0,
O
IC
I
Input offset current
Input bias current
pA
IO
See Figure 5
pA
nA
V
O
= 0,
IC
I
IB
See Figure 5
–3.4
to
5.4
–13.4
to
15.4
V
ICR
Common-mode input voltage range
V
Maximum positive peak output
voltage swing
V
V
R
R
R
= 10 kΩ
= 10 kΩ
= 10 kΩ
4.3
–4.2
12
14
–13.9
14.3
V
V
OM+
L
L
L
Maximum negative peak output
voltage swing
OM–
Large-signal differential voltage
A
VD
V/mV
†
amplification
12
5
12
4
r
Input resistance
10
10
Ω
i
c
Input capacitance
pF
i
V
V
= V
min,
IC
O
ICR
= 0, R = 50 Ω
CMRR
Common-mode rejection ratio
87
96
94
96
26
dB
dB
S
Supply-voltage rejection ratio
k
V
O
= 0,
R = 50 Ω
S
SVR
(∆V / ∆V )
CC± IO
Total power dissipation (four
amplifiers)
P
D
V
V
= 0,
= 0,
No load
No load
7.7
mW
O
I
Supply current (four amplifiers)
Crosstalk attenuation
0.77
120
0.87
120
mA
dB
CC
O
V /V
O1 O2
A
= 100
VD
= ±15 V, V = ±10 V.
†
At V
= ±5 V, V = ±2.3 V; at V
CC±
CC±
O
O
TL034Y operating characteristics, T = 25°C
A
TL034Y
PARAMETER
TEST CONDITIONS
V
CC±
= ±5 V
V
CC±
= ±15 V
UNIT
MIN
TYP
2
MAX
MIN
1.5
TYP
2.9
MAX
SR+ Positive slew rate at unity gain
SR– Negative slew rate at unity gain
V/µs
V/µs
ns
R
= 10 kΩ,
C
= 100 pF,
L
L
See Figure 1
3.9
1.5
5.1
t
t
Rise time
V
= ±10 V,
138
138
11%
83
132
132
5%
r
I(PP)
= 10 kΩ,
Fall time
R
C
= 100 pF,
ns
f
L
L
Overshoot factor
See Figures 1 and 2
f = 10 kHz
f = 1 kHz
83
R
= 20 Ω,
S
V
I
nV/√Hz
Equivalent input noise voltage
Equivalent input noise current
Unity-gain bandwidth
n
See Figure 3
43
43
f = 1 kHz
0.003
0.003
pA/√Hz
n
V = 10 mV,
R = 10 kΩ,
L
I
B1
1
1.1
MHz
C
= 25 pF,
See Figure 4
R = 10 kΩ,
L
L
V = 10 mV,
I
φ
m
Phase margin at unity gain
61°
65°
C
= 25 pF,
See Figure 4
L
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
PARAMETER MEASUREMENT INFORMATION
V
CC+
–
Overshoot
V
O
+
V
I
90%
V
CC–
C
R
L
L
(see Note A)
10%
t
NOTE A: C includes fixture capacitance.
L
r
Figure 1. Slew-Rate and Overshoot Test Circuit
Figure 2. Rise Time and Overshoot Waveform
10 kΩ
V
CC+
10 kΩ
–
V
I
V
L
+
O
100 Ω
V
CC+
–
V
CC–
V
O
C
R
L
(see Note A)
V
CC–
R
R
S
S
NOTE A: C includes fixture capacitance.
L
Figure 4. Unity-Gain Bandwidth and
Phase-Margin Test Circuit
Figure 3. Noise-Voltage Test Circuit
V
CC+
Ground Shield
–
+
V
CC–
Picoammeters
Figure 5. Input-Bias and Offset-Current Test Circuit
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
PARAMETER MEASUREMENT INFORMATION
typical values
Typical values presented in this data sheet represent the median (50% point) of device parametric performance.
input bias and offset current
At the picoampere bias current level typical of the TL03x and TL03xA, accurate measurement of the bias current
becomes difficult. Not only does this measurement require a picoammeter, but test-socket leakages easily can
exceed the actual device bias currents. To accurately measure these small currents, Texas Instruments uses
a two-step process. The socket leakage is measured using picoammeters with bias voltages applied but with
no device in the socket. The device is then inserted into the socket and a second test that measures both the
socket leakage and the device input bias current is performed. The two measurements are then subtracted
algebraically to determine the bias current of the device.
noise
With the increasing emphasis on low noise levels in many of today’s applications, the input noise voltage density
is performed at f = 1 kHz, unless otherwise noted.
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
6 – 11
12, 13, 14
15
Distribution of TL03x input offset voltages
Distribution of TL03x input offset-voltage temperature coefficients
Input bias current vs Common-mode input voltage
Input bias current and Input offset current vs Free-air temperature
Common-mode input voltage range vs Supply voltage
Common-mode input voltage range vs Free-air temperature
Output voltage vs Differential input voltage
16
17
18
19, 20
21
Maximum peak output voltage vs Supply voltage
Maximum peak-to-peak output voltage vs Frequency
22
Maximum peak output voltage vs Output current
23, 24
25, 26
27
Maximum peak output voltage vs Free-air temperature
Large-signal differential voltage amplification vs Load resistance
Large-signal differential voltage amplification and Phase shift vs Frequency
Large-signal differential voltage amplification and Phase shift vs Free-air temperature
28
29
Output impedance vs Frequency with V
CC
=
15 V
30
Common-mode rejection ratio vs Frequency
31, 32
33
Common-mode rejection ratio vs Free-air temperature
Supply-voltage rejection ratio vs Free-air temperature
Short-circuit output current vs Supply voltage
34
35
Short-circuit output current vs Time
36
Short-circuit output current vs Free-air temperature
Equivalent input noise voltage vs Frequency (for TL031 and TL031A)
Equivalent input noise voltage vs Frequency (for TL032 and TL032A)
Equivalent input noise voltage vs Frequency (for TL034 and TL034A)
Supply current vs Supply voltage (for TL031 and TL031A)
Supply current vs Supply voltage (for TL032 and TL032A)
Supply current vs Supply voltage (for TL034 and TL034A)
Supply current vs Free-air temperature (for TL031 and TL031A)
Supply current vs Free-air temperature (for TL032 and TL032A)
Supply current vs Free-air temperature (for TL034 and TL034A)
Slew rate vs Load resistance
37
38
39
40
41
42
43
44
45
46
47, 48
49, 50
51
Slew rate vs Free-air temperature
Overshoot factor vs Load capacitance
Total harmonic distortion vs Frequency
52
Unity-gain bandwidth vs Supply voltage
53
Unity-gain bandwidth vs Free-air temperature
Phase margin vs Supply voltage
54
55
Phase margin vs Load capacitance
56
Phase margin vs Free-air temperature
57
Voltage-follower small-signal pulse response vs Time
Voltage-follower large-signal pulse response vs Time
58
59, 60
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TL031
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TL031A
INPUT OFFSET VOLTAGE
14
12
10
8
16
14
12
10
8
1681 Units Tested From 1 Wafer Lot
1433 Units Tested From 1 Wafer Lot
V
T
A
= ±15 V
CC±
= 25°C
V
T
A
= ±15 V
CC±
= 25°C
P Package
P Package
6
6
4
4
2
2
0
0
–1.2
–0.6
0
0.6
1.2
–900
–600
–300
0
300
600
900
V
IO
– Input Offset Voltage – mV
V
IO
– Input Offset Voltage – µV
Figure 6
Figure 7
DISTRIBUTION OF TL032A
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TL032
INPUT OFFSET VOLTAGE
15
12
9
12
1321 Amplifiers Tested From 1 Wafer Lot
= ±15 V
1681 Amplifiers Tested From 1 Wafer Lot
= ±15 V
V
V
CC±
= 25°C
CC±
= 25°C
T
A
T
A
P Package
P Package
9
6
6
3
0
3
0
–900
–1.2
–0.6
0
0.6
1.2
–600
–300
0
300
600
900
V
IO
– Input Offset Voltage – mV
V
IO
– Input Offset Voltage – µV
Figure 8
Figure 9
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TL034
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TL034A
INPUT OFFSET VOLTAGE
12
9
15
12
9
1716 Amplifiers Tested From 3 Wafer Lots
1681 Amplifiers Tested From 1 Wafer Lot
V
= ±15 V
V
= ±15 V
CC±
= 25°C
CC±
= 25°C
T
A
T
A
N Package
D Package
6
6
3
3
0
0
–1.8
–1.2
–0.6
0
0.6
1.2
–1.2
V
0.6
0
0.6
1.2
1.8
V
IO
– Input Offset Voltage – mV
– Input Offset Voltage – mV
IO
Figure 10
Figure 11
DISTRIBUTION OF TL031
INPUT OFFSET-VOLTAGE
TEMPERATURE COEFFICIENT
DISTRIBUTION OF TL032
INPUT OFFSET-VOLTAGE
TEMPERATURE COEFFICIENT
24
18
12
6
76 Units Tested From 1 Wafer Lot
30
V
T
A
= ±15 V
160 Amplifiers Tested From 2 Wafer Lots
CC±
= 25°C to 125°C
V
= ±15 V
CC±
= 25°C to 125°C
P Package
T
A
25
20
15
10
5
P Package
0
0
–30
–20
–10
0
10
20
30
–40 –30 –20 –10
0
10
20
30
40
α
– Input Offset-Voltage Temperature Coefficient – µV/°C
α
– Temperature Coefficient – µV/°C
VIO
VIO
Figure 12
Figure 13
34
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TL034
INPUT OFFSET-VOLTAGE
TEMPERATURE COEFFICIENT
INPUT BIAS CURRENT
vs
COMMON-MODE INPUT VOLTAGE
30
25
20
15
10
5
10
5
160 Amplifiers Tested From 2 Wafer Lots
V
T
A
= ±15 V
CC±
= 25°C
V
T
= ±15 V
CC±
= 25°C to 125°C
A
D Package
0
–5
0
–10
–40 –30 –20 –10
0
10
20
30
40
–15
–10
–5
0
5
10
15
α
– Temperature Coefficient – µV/°C
V
IC
– Common-Mode Input Voltage – V
VIO
Figure 14
Figure 15
INPUT BIAS CURRENT AND
INPUT OFFSET CURRENT
COMMON-MODE INPUT VOLTAGE
†
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
16
12
8
10
1
T
A
= 25°C
V
V
V
= ±15 V
CC±
= 0
= 0
O
IC
Positive Limit
4
I
IB
0
0.1
–4
–8
–12
–16
Negative Limit
I
IO
0.01
0.001
25
45
65
85
105
125
0
2
4
6
8
10
12
14
16
T
A
– Free-Air Temperature – °C
|V | – Supply Voltage – V
CC±
Figure 16
Figure 17
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
35
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
†
OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE RANGE
vs
DIFFERENTIAL INPUT VOLTAGE
FREE-AIR TEMPERATURE
20
15
10
5
1.5
1
R
R
= 1 kΩ
V
CC±
= ±15 V
L
= 2 kΩ
L
R
= 5 kΩ
= 10 kΩ
Positive Limit
L
R
L
R
= 20 kΩ
L
0.5
0
0
V
T
A
= ±5 V
= 25°C
CC±
–5
–10
–0.5
R
R
R
= 20 kΩ
= 10 kΩ
= 5 kΩ
L
L
L
–1
R
= 2 kΩ
= 1 kΩ
L
L
–15
–20
R
Negative Limit
25 50
–1.5
–5 –4 –3 –2 –1
0
1
2
3
4
5
–75 –50 –25
0
75
100 125
T
A
– Free-Air Temperature –°C
V
ID
– Differential Input Voltage – V
Figure 18
Figure 19
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
1.5
16
12
8
R
= 5 kΩ
L
V
T
= ±15 V
CC±
= 25°C
R
= 10 kΩ
= 20 kΩ
= 50 kΩ
R
T
= 10 kΩ
= 25°C
L
L
L
A
A
R
1
V
OM+
R
L
0.5
4
0
0
–4
–8
–12
–16
–0.5
V
OM–
R
R
= 50 kΩ
= 20 kΩ
= 10 kΩ
L
L
–1
R
L
R
= 5 kΩ
L
–1.5
15
–15
–10
–5
0
5
10
0
2
4
|V
6
8
| – Supply Voltage – V
CC±
10
12
14
16
V
ID
– Differential Input Voltage – V
Figure 20
Figure 21
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
36
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
†
MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
vs
OUTPUT CURRENT
FREQUENCY
5
4
3
2
1
0
30
25
20
15
10
5
V
T
= ±5 V
CC±
= 25°C
R
= 10 kΩ
L
V
= ±15 V
A
CC±
V
OM+
V
OM–
T
A
= –55°C
= ±5 V
T
= 125°C
A
V
CC±
0
0
5
10
15
20
1 k
10 k
100 k
1 M
f – Frequency – Hz
|I | – Output Current – mA
O
Figure 22
Figure 23
†
MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
FREE-AIR TEMPERATURE
OUTPUT CURRENT
5
16
V
T
= ±15 V
CC±
4
3
V
= 25°C
14
12
10
8
OM+
A
2
V
OM–
1
V
R
= ±5 V
= 10 kΩ
CC±
L
0
V
OM+
–1
–2
–3
–4
–5
6
4
V
OM–
2
0
0
–75 –50 –25
0
25
50
75
100 125
5
10
15
20
25
30
|I | – Output Current – mA
O
T
A
– Free-Air Temperature – °C
Figure 24
Figure 25
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
37
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
†
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
LOAD RESISTANCE
16
12
8
40
35
30
25
20
15
10
5
V
T
A
= ±1 V
= 25°C
O
V
OM+
V
CC±
= ±15 V
= ±5 V
4
V
R
= ±15 V
CC±
= 10 kΩ
0
L
V
CC±
–4
–8
–12
–16
V
OM–
–75 –50 –25
0
25
50
75
100 125
0
10 k
100 k
1 M
T
A
– Free-Air Temperature –°C
R
– Load Resistance – Ω
L
Figure 26
Figure 27
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
100 k
10 k
1 k
0°
V
= ±15 V
CC±
R
C
= 10 kΩ
= 25 pF
L
L
30°
60°
90°
120°
T
A
= 25°C
A
VD
100
10
Phase Shift
1
150°
180°
0.1
10
100
1 k
10 k
100 k
1 M
10 M
f – Frequency – Hz
Figure 28
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
38
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL
†
OUTPUT IMPEDANCE
vs
VOLTAGE AMPLIFICATION
vs
FREQUENCY
FREE-AIR TEMPERATURE
50
10
200
R
= 10 kΩ
L
A
= 100
VD
100
80
V
CC±
= ±15 V
60
V
CC±
= ±5 V
A
VD
= 10
= 1
40
A
VD
20
10
V
= ±15 V
CC±
(open loop) ≈ 250 Ω
r
o
T
= 25°C
A
1
–75 –50 –25
0
25
50
75
100 125
1 k
10 k
100 k
T
A
– Free-Air Temperature – °C
f – Frequency – Hz
Figure 29
Figure 30
COMMON-MODE REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
vs
FREQUENCY
FREQUENCY
100
90
80
70
60
50
40
30
20
10
0
100
V
T
= ±5 V
V
T
= ±15 V
CC±
= 25°C
CC±
= 25°C
90
80
70
60
50
40
30
20
10
0
A
A
10
100
1 k
10 k
100 k
1 M
10 M
10
100
1 k
10 k
100 k
1 M
10 M
f – Frequency – Hz
f – Frequency – Hz
Figure 31
Figure 32
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
39
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
†
†
SUPPLY-VOLTAGE REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
100
98
96
94
92
90
95
90
85
80
75
V
= ±5 V to ±15 V
CC±
V
= ±15 V
= ±5 V
CC±
CC±
V
V
IC
= V
min
ICR
–75 –50 –25
0
25
50
75
100 125
–75 –50 –25
0
25
50
75
100 125
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 33
Figure 34
SHORT-CIRCUIT OUTPUT CURRENT
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
SUPPLY VOLTAGE
TIME
30
20
30
20
V
T
= 0
= 25°C
O
A
V
ID
= 100 mV
V
ID
= 100 mV
10
10
0
V
ID
= –100 mV
0
–10
–20
–30
V
= –100 mV
ID
–10
–20
V
T
A
= ±15 V
= 25°C
CC±
0
2
4
|V
6
8
10
12
14
16
0
5
10
15
t – Time – s
20
25
30
| – Supply Voltage – V
CC±
Figure 35
Figure 36
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
40
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
TL031 and TL031A
EQUIVALENT INPUT NOISE VOLTAGE
†
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
FREE-AIR TEMPERATURE
FREQUENCY
25
20
70
60
V
= ±15 V
V
R
= ±15 V
CC±
CC±
= 20 Ω
S
T
= 25°C
A
15
See Figure 3
V
V
= 100 mV
V
CC±
= ±5 V
ID
10
5
0
= –100 mV
ID
V
= ±5 V
CC±
–5
50
40
–10
–15
–20
–25
V
CC±
= ±15 V
V
O
= 0
10
100
1 k
10 k
100 k
–75 –50 –25
0
25
50
75
100 125
T
A
– Free-Air Temperature – °C
f – Frequency – Hz
Figure 37
Figure 38
TL034 and TL034A
TL032 and TL032A
EQUIVALENT INPUT NOISE VOLTAGE
EQUIVALENT INPUT NOISE VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
90
80
60
50
V
= ±15 V
V
= ±15 V
CC±
= 20 Ω
CC±
= 20Ω
R
T
R
T
S
S
= 25°C
= 25°C
A
A
See Figure 3
See Figure 3
70
60
40
30
50
40
10
100
1 k
10 k
100 k
10
100
1 k
10 k
11 k
f – Frequency – Hz
f – Frequency – Hz
Figure 39
Figure 40
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
41
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
TL031 and TL031A
†
TL032 and TL032A
SUPPLY CURRENT
vs
SUPPLY CURRENT
vs
†
SUPPLY VOLTAGE
250
200
SUPPLY VOLTAGE
500
400
300
200
100
0
V
= 0
O
V
= 0
No Load
O
No Load
T
= 25°C
A
T
A
= 25°C
150
100
50
T
= 125°C
= –55°C
A
T
A
= 125°C
= –55°C
T
A
T
A
0
0
2
4
6
8
10
12
14
16
0
2
4
|V
6
8
10
12
14
16
|V
CC±
| – Supply Voltage – V
| – Supply Voltage – V
CC±
Figure 41
Figure 42
TL031 and TL031A
SUPPLY CURRENT
vs
TL034 and TL034A
SUPPLY CURRENT
vs
†
†
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
1000
800
600
400
250
200
150
100
V
= 0
V
= 0
O
O
V
= ±15 V
= ±5 V
CC±
CC±
No Load
No Load
V
T
= 25°C
A
T
= 125°C
= –55°C
A
T
A
200
0
50
0
–75 –50 –25
0
25
50
75
100
125
0
2
4
6
8
10
12
14
16
|V |– Supply Voltage – V
CC±
T
A
– Free-Air Temperature – °C
Figure 43
Figure 44
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
42
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
TL034 and TL034A
SUPPLY CURRENT
vs
TL032 and TL032A
SUPPLY CURRENT
vs
†
†
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
1000
800
600
400
200
0
500
400
300
200
100
0
V
= 0
O
V
= ±15 V
= ±5 V
V
= 0
CC±
CC±
O
No Load
V
= ±15 V
CC±
No Load
V
V
= ±5 V
CC±
–75 –50 –25
0
25
50
75
100 125
–75 –50 –25
0
25
50
75
100 125
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 45
Figure 46
SLEW RATE
vs
SLEW RATE
vs
LOAD RESISTANCE
LOAD RESISTANCE
6
5
4
3
2
1
0
6
5
4
3
2
1
0
V
C
= ±5 V
= 100 pF
= 25°C
CC±
L
SR–
T
A
See Figure 1
SR–
SR+
SR+
V
C
= ±15 V
= 100 pF
= 25°C
CC±
L
T
A
See Figure 1
1
10
100
1
10
100
R
– Load Resistance – kΩ
R
– Load Resistance – kΩ
L
L
Figure 47
Figure 48
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
43
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
†
†
SLEW RATE
vs
SLEW RATE
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
6
5
4
3
2
1
0
6
5
4
3
2
1
0
V
R
C
= ±5 V
= 10 kΩ
= 100 pF
CC±
L
L
SR–
See Figure 1
SR–
SR+
SR+
V
R
C
= ±15 V
= 10 kΩ
= 100 pF
CC±
L
L
See Figure 1
–75 –50 –25
0
25
50
75
100 125
–75 –50 –25
0
25
50
75
100 125
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 49
Figure 50
OVERSHOOT FACTOR
vs
LOAD CAPACITANCE
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
60
50
40
30
20
10
0
0.5
0.4
V
R
= ±10 mV
I(PP)
= 10 kΩ
V
A
= ±15 V
CC±
= 1
L
VD
T
= 25°C
A
V
T
= 6 V
O(rms)
= 25°C
See Figure 1
A
0.3
0.2
V
= ±5 V
CC±
V
CC±
= ±15 V
0.1
100
0
50
100
150
200
250
1 k
10 k
100 k
C
– Load Capacitance – pF
f – Frequency – Hz
L
Figure 51
Figure 52
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
44
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
†
UNITY-GAIN BANDWIDTH
vs
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
1.3
1.2
1.1
1.0
0.9
0.8
1.1
1.05
1.0
V = 10 mV
I
V = 10 mV
I
R
C
= 10 kΩ
= 25 pF
L
L
R
C
= 10 kΩ
= 25 pF
= 25°C
L
L
See Figure 4
T
A
V
= ±15 V
See Figure 4
CC+
V
= ±5 V
CC±
0.95
0.9
–75 –50 –25
0
25
50
75 100 125
0
2
4
6
8
10
12
14
16
|V |– Supply Voltage – V
CC±
T
A
– Free-Air Temperature – °C
Figure 53
Figure 54
PHASE MARGIN
vs
LOAD CAPACITANCE
PHASE MARGIN
vs
SUPPLY VOLTAGE
70°
68°
66°
64°
62°
60°
58°
56°
54°
52°
50°
V = 10 mV
I
R
= 10 kΩ
T = 25°C
A
L
65°
63°
V
= ±15 V
CC±
V = 10 mV
I
R
C
= 10 kΩ
= 25 pF
= 25°C
See Figure 4
See Note A
L
L
T
A
See Figure 4
61°
59°
57°
V
CC±
= ±5 V
0
10 20 30 40 50 60 70 80 90 100
– Load Capacitance – pF
C
L
0
2
4
6
8
10
12
14
16
NOTE A: Values of phase margin below a load capacitance of 25 pF
were estimated.
|V | – Supply Voltage – V
CC±
Figure 55
Figure 56
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
45
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
†
PHASE MARGIN
vs
VOLTAGE-FOLLOWER
SMALL-SIGNAL
FREE-AIR TEMPERATURE
PULSE RESPONSE
67°
65°
63°
61°
59°
57°
55°
16
12
8
V
= ±15 V
CC±
V
= ±15 V
CC±
R
C
= 10 kΩ
= 100 pF
= 25°C
L
L
T
A
See Figure 1
4
V
= ±5 V
CC±
0
–4
–8
–12
–16
V = 10 mV
I
L
L
R
C
= 10 kΩ
= 25 pF
See Figure 4
–75 –50 –25
0
25
50
75
100 125
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
T
A
– Free-Air Temperature –°C
t – Time – µs
Figure 57
Figure 58
VOLTAGE-FOLLOWER
LARGE-SIGNAL
PULSE RESPONSE
VOLTAGE-FOLLOWER
LARGE-SIGNAL
PULSE RESPONSE
2
8
6
1
0
4
2
V
R
= ±5 V
= 10 kΩ
CC±
L
V
= ±15 V
CC±
0
R
C
= 10 kΩ
= 100 pF
= 25°C
C
T
= 100 pF
= 25°C
L
L
L
A
–2
T
See Figure 1
A
See Figure 1
–1
–2
–4
–6
–8
0
1
2
3
4
5
6
7
8
0
2
4
6
8
10 12 14 16 18
t – Time – µs
t – Time – µs
Figure 59
Figure 60
†
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
46
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
APPLICATION INFORMATION
input characteristics
The TL03x and TL03xA are specified with a minimum and a maximum input voltage that, if exceeded at either
input, could cause the device to malfunction.
Due to of the extremely high input impedance and resulting low bias-current requirements, the TL03x and
TL03xA are well suited for low-level signal processing; however, leakage currents on printed circuit boards and
socketseasily can exceed bias current requirements and cause degradation in system performance. It is a good
practice to include guard rings around inputs (see Figure 61). These guard rings should be driven from a
low-impedance source at the same voltage level as the common-mode input.
Unused amplifiers should be connected as grounded unity-gain followers to avoid oscillation.
V
I
+
–
V
O
–
+
V
I
V
O
–
+
V
O
V
I
(a) NONINVERTING AMPLIFIER
(b) INVERTING AMPLIFIER
(c) UNITY-GAIN AMPLIFIER
Figure 61. Use of Guard Rings
47
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
APPLICATION INFORMATION
output characteristics
All operating characteristics (except bandwidth and phase margin) are specified with 100-pF load capacitance.
The TL03x and TL03xA drive higher capacitive loads; however, as the load capacitance increases, the resulting
response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation. The value of
the load capacitance at which oscillation occurs varies with production lots. If an application appears to be
sensitive to oscillation due to load capacitance, adding a small resistance in series with the load should alleviate
the problem (see Figure 63). Capacitive loads of 1000 pF and larger can be driven if enough resistance is added
in series with the output (see Figure 62).
(a) C = 100 pF, R = 0
(b) C = 300 pF, R = 0
(c) C = 350 pF, R = 0
L
L
L
(d) C = 1000 pF, R = 0
(e) C = 1000 pF, R = 50 Ω
(f) C = 1000 pF, R = 2 kΩ
L
L
L
Figure 62. Effect of Capacitive Loads
15 V
–
R
V
O
5 V
+
–5 V
– 15 V
C
10 kΩ
L
(see Note A)
NOTE A: C includes fixture capacitance.
L
Figure 63. Test Circuit for Output Characteristics
48
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
APPLICATION INFORMATION
high-Q notch filter
In general, Texas Instruments enhanced-JFET operational amplifiers serve as excellent filters. The circuit in
Figure 64 provides a narrow notch at a specific frequency. Notch filters are designed to eliminate frequencies
that are interfering with the operation of an application. For this filter, the center frequency can be calculated as:
1
f
O
2
R1 C1
With the resistors and capacitors shown in Figure 64, the center frequency is 1 kHz. C1 = C3 = C2 + 2 and
R1 = R3 = 2 × R2. The center frequency can be modified by varying these values. When adjusting the center
frequency, ensure that the operational amplifier has sufficient gain at the frequency required.
15 V
–
R1
R3
V
O
+
V
I
TL03x
1.5 MΩ
1.5 MΩ
–15 V
C2
220 pF
R3
C1
750 kΩ
C3
110 pF
110 pF
2
1
0
–1
–2
–3
–4
–5
–6
–7
–8
0.2 0.4 0.6 0.8
1
0.2 0.4 0.6 0.8
2
f – Frequency – kHz
Figure 64. High-Q Notch Filter
49
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
APPLICATION INFORMATION
transimpedance amplifier
The low-power precision TL03x allows accurate measurement of low currents. The high input impedance and
low offset voltage of the TL03xA greatly simplify the design of a transimpedance amplifier. At room temperature,
this design achieves 10-bit accuracy with an error of less than 1/2 LSB.
Assuming that R2 is much less than R1 and ignoring error terms, the output voltage can be expressed as:
R1 R2
V
–I
R
IN
F
O
R2
Using the resistor values shown in the schematic for a 1-nA input current, the output voltage equals –0.1 V. If
theV limitfortheTL03xAismeasuredat±12V, themaximuminputcurrentfortheseresistorvaluesis±120 nA.
O
Similarly, one LSB on a 10-bit scale corresponds to 12 mV of output voltage, or 120 pA of input current.
The following equation shows the effect of input offset voltage and input bias current on the output voltage:
R1 R2
V
– V
R
I
I
O
IO
F IO
IB
R2
If the application requires input protection for the transimpedance amplifier, do not use standard PN diodes.
Instead, use low-leakage Siliconix SN4117 JFETs (or equivalent) connected as diodes across the TL03xA
inputs as shown in Figure 65.
As with all precision applications, special care must be taken to eliminate external sources of leakage and
interference. Other precautions include using high-quality insulation, cleaning insulating surfaces to remove
fluxes and other residue, and enclosing the application within a protective box.
R
F
10 MΩ
15 V
TL03xA
+
–
Input Current
V
O
R1 90 kΩ
–15 V
SN4117
R2
10 kΩ
Figure 65. Transimpedance Amplifier
50
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
APPLICATION INFORMATION
4-mA to 20-mA current loops
Often, information from an analog sensor must be sent over a distance to the receiving circuitry. For many
applications, the most feasible method involves converting voltage information to a current before transmission.
Thefollowing circuits give two variations of low-power current loops. The circuit in Figure 66 requires three wires
from the transmitting to receiving circuitry, while the second variation in Figure 67 requires only two wires, but
includes an extra integrated circuit. Both circuits benefit from the high input impedance of the TL03xA because
many inexpensive sensors do not have low output impedance.
Assuming that the voltage at the noninverting input of the TL03xA is zero, the following equation determines
the output current:
R3
R3
I
V
5V
0.16
V
4mA
O
I
I
R1
R
R2
R
S
S
The circuits presently provide 4-mA to 20-mA output current for an input voltage of 0 to 100 mV. By modifying
R1, R2, and R3, the input voltage range or the output current range can be adjusted.
Including the offset voltage of the operational amplifier in the above equation clearly illustrates why the low offset
TL03xA was chosen:
R3
R3
R3
R3
R1
I
V
5V
V
O
I
I
R1
R1
R
R2
4mA – 0.17
R
R
R2
R
R
S
S
S
S
S
0.16
V
I
V
I
For example, an offset voltage of 1 mV decreases the output current by 0.17 mA.
Due to the low power consumption of the TL03xA, both circuits have at least 2 mA available to drive the actual
sensor from the 5-V reference node.
51
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
4-mA to 20-mA current loops (continued)
V
CC+
= 10 V
100 kΩ
100 kΩ
R6
R7
TL431
5 V Ref
R2
1 MΩ
–
+
R5
R1
5 kΩ
2N3904
1N4148
V
I
3.3 kΩ
TL03xA
V
EE
= –5 V
R4
5 kΩ
R3 80 kΩ
R
S
I
O
Signal Common
100 Ω
R
50 Ω
L
Figure 66. Three-Wire 4-mA to 20-mA Current Loop
V
CC+
= 10 V
IN
OUT
LT1019-5
GND
5 V Ref
8
2
3
4
R2 1 MΩ
LTC1044
5
10 µF
–
R5
10 µF
R1
+
2N3904
V
I
3.3 kΩ
5 kΩ
TL03xA
R4 5 kΩ
R3 80 kΩ
1N4148
R
S
I
O
Signal Common
100 Ω
R
50 Ω
L
Figure 67. Two-Wire 4-mA to 20-mA Current Loop
52
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
APPLICATION INFORMATION
low-level light-detector preamplifier
Applications that need to detect small currents require high input-impedance operational amplifiers; otherwise,
the bias currents of the operational amplifier camouflage the current being monitored. Phototransistors provide
a current that is proportional to the light reaching the transistor. The TL03x allows even the small currents
resulting from low-level light to be detected.
In Figure 68, if there is no light, the phototransistor is off and the output is high. As light is detected, the
operational amplifier output begins pulling low. Adjusting R4 both compensates for offset voltage of the amplifier
and adjusts the point of light detection by the amplifier.
15 V
R6
10 kΩ
R1
10 kΩ
TL03x
+
–
R3 10 kΩ
C1
100 pF
V
O
R7
R4
10 kΩ
TIL601
10 kΩ
R5 10 kΩ
R2
5 kΩ
–15 V
Figure 68. Low-Level Light-Detector Preamplifier
53
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
APPLICATION INFORMATION
audio-distribution amplifier
This audio-distribution amplifier (see Figure 69) feeds the input signal to three separate output channels. U1A
amplifies the input signal with a gain of 10, while U1B, U1C, and U1D serve as buffers to the output channels.
The gain response of this circuit is very flat from 20 Hz to 20 kHz. The TL03x allows quick response to the input
signal while maintaining low power consumption.
R4
1 MΩ
U1B
–
V
V
OA
OB
CC+
+
C1
1 µF
–
V
I
+
U1C
U1D
U1A
–
+
V
R1
100 kΩ
R2
100 kΩ
V
CC+
R5
10 kΩ
–
+
C2
100 µF
R3
V
OC
100 kΩ
NOTE A: U1A through U1D = TL03x; V
CC+
= 5 V.
Figure 69. Audio-Distribution Amplifier Circuit
54
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL03x, TL03xA, TL03xY
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180B – FEBRUARY 1997 – REVISED FEBRUARY 1999
APPLICATION INFORMATION
instrumentation amplifier with linear gain adjust
The low offset voltage and low power consumption of the TL03x provide an accurate but inexpensive
instrumentation amplifier (see Figure 70). This particular configuration offers the advantage that the gain can
be linearly set by one resistor:
R6
V
=
× (V – V )
B A
O
R5
Adjusting R6 varies the gain. The value of R6 always should be greater than, or equal to, the value of R5 to
ensure stability. The disadvantage of this instrumentation amplifier topology is the high degree of CMRR
degradation resulting from mismatches between R1, R2, R3, and R4. For this reason, these four resistors
should be 0.1%-tolerance resistors.
V
CC+
R1
R3
10 kΩ
0.1%
10 kΩ
0.1%
–
+
V
A
U1A
U1C
–
+
V
O
R5
100 kΩ
R6
1 MΩ
U1B
U1D
–
+
–
+
V
B
R2
R4
R7
100 kΩ
10 kΩ
0.1%
10 kΩ
0.1%
V
CC–
NOTE A: U1A through U1D = TL03x; V
CC±
= ±15 V.
Figure 70. Instrumentation Amplifier With Linear Gain-Adjust Circuit
55
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
相关型号：
TL032CP
DUAL OP-AMP, 4500uV OFFSET-MAX, 1MHz BAND WIDTH, PDIP8, ROHS COMPLIANT, PLASTIC, DIP-8
ROCHESTER
©2020 ICPDF网 联系我们和版权申明