TL712CDR [TI]
DIFFERENTIAL COMPARATOR; 差分比较器
| 型号： | TL712CDR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DIFFERENTIAL COMPARATOR |
| 文件： | 总11页 (文件大小：263K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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ꢅꢆ ꢇꢇ ꢈꢉ ꢈꢊꢀ ꢆꢋ ꢁ ꢌꢍ ꢎꢏꢋ ꢉꢋꢀꢍ ꢉ
SLCS002D − JUNE 1983 − REVISED AUGUST 2003
D, P, PS, OR PW PACKAGE
(TOP VIEW)
D
D
D
D
D
D
D
Operates From a Single 5-V Supply
0-V to 5.5-V Common-Mode Input Voltage
Range
NC
IN−
IN+
OE
V
CC
1
2
3
4
8
7
6
5
Self-Biased Inputs
OUT−
OUT+
GND
Complementary 3-State Outputs
Enable Capability
Hysteresis . . . 5 mV Typ
Response Times . . . 25 ns Typ
NC−No internal connection
description/ordering information
The TL712 is a high-speed comparator fabricated with bipolar Schottky process technology. The circuit has
differential analog inputs and complementary 3-state TTL-compatible logic outputs with symmetrical switching
characteristics. When the output enable (OE) is low, both outputs are in the high-impedance state. This device
operates from a single 5-V supply and is useful as a disk memory read-chain data comparator.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP (P)
Tube of 50
TL712CP
TL712CP
Tube of 75
TL712CD
SOIC (D)
SOP (PS)
TL712C
T712
Reel of 2500
Reel of 2000
Tube of 150
Reel of 2000
TL712CDR
TL712CPSR
TL712CPW
TL712CPWR
0°C to 70°C
TSSOP (PW)
T712
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
symbol (positive logic)
4
2
3
OE
7
6
IN−
IN+
OUT−
OUT+
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃꢄ
ꢅ ꢆꢇ ꢇ ꢈꢉ ꢈꢊ ꢀ ꢆ ꢋꢁ ꢌꢍ ꢎꢏꢋꢉ ꢋꢀꢍ ꢉ
SLCS002D − JUNE 1983 − REVISED AUGUST 2003
schematics of inputs and outputs
EQUIVALENT OF EACH
DIFFERENTIAL INPUT
EQUIVALENT OF EACH ENABLE INPUT
TYPICAL OF ALL OUTPUTS
V
V
CC
CC
V
CC
85 Ω
Nom
8.3 kΩ
Nom
960 Ω
Nom
4 kΩ
Nom
OE
Input
960 Ω
Nom
Output
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
ID
Input voltage, V , any differential input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
I
Output enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Low-level output current, I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
OL
Package thermal impedance, θ (see Notes 3 and 4): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
JA
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . 149°C/W
Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated in the “recommended operating conditions” section of
this specification is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the network ground.
2. Differential voltage values are at IN+ with respect to IN−.
3. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable
J
JA
A
ambient temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.
D
J
A
JA
J
4. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄ
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SLCS002D − JUNE 1983 − REVISED AUGUST 2003
recommended operating conditions
MIN NOM
MAX
5.25
5.5
−1
UNIT
V
V
V
Supply voltage
4.75
0
5
CC
Common-mode input voltage
High-level output current
Low-level output current
Operating free-air temperature
V
IC
I
mA
mA
°C
OH
OL
I
16
T
A
0
70
electrical characteristics at V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
mV
mV
V
†
V
V
V
V
Threshold voltage (V
T+
and V
)
V
= 0 to 5 V
−100
100
T
T−
ICR
Hysteresis (V
− V
)
5
3.5
0.4
hys
OH
OL
T+ T−
High-level output voltage
Low-level output voltage
Off-state output current
Enable current
V
ID
V
ID
V
O
= 100 mV,
I
I
= −1 mA
= 16 mA
2.7
OH
= − 100 mV,
= 2.4 V
0.5
−20
100
20
V
OL
I
I
I
I
µA
µA
µA
µA
kΩ
Ω
OZ
V = 5.5 V
I
I
High-level enable current
Low-level enable current
Differential input resistance
Output resistance
V
= 2.7 V
= 0.4 V
IH
IL
IH
IL
V
−360
r
r
4
i
100
−85
20
o
I
I
Short-circuit output current
Supply current
−15
mA
mA
OS
V
ID
= 0,
No load
17
CC
†
The algebraic convention, where the more-negative limit is designated as minimum, is used in this data sheet for input threshold voltage levels
only.
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
TYP
25
UNIT
ns
t
t
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
PLH
PHL
TTL load, See Note 5 and Figure 1
25
ns
NOTE 5: The response time specified is for a 100-mV input step with 5-mV overdrive (105 mV total) and is the interval between the input step
function and the instant when the output crosses 2.5 V.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃꢄ
ꢅ ꢆꢇ ꢇ ꢈꢉ ꢈꢊ ꢀ ꢆ ꢋꢁ ꢌꢍ ꢎꢏꢋꢉ ꢋꢀꢍ ꢉ
SLCS002D − JUNE 1983 − REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
5 V
2 kΩ
Output
NOTE A: All diodes are 1N4148 or equivalent.
Figure 1. TTL Output Load Circuit
TYPICAL CHARACTERISTICS
OUTPUT RESPONSE FOR VARIOUS
INPUT OVERDRIVE VOLTAGES
OUTPUT RESPONSE FOR VARIOUS
INPUT OVERDRIVE VOLTAGES
V
= 5 V
V
= 5 V
CC
TTL Load
= 25°C
CC
TTL Load
T = 25°C
A
T
A
100 mV + Overdrive
100 mV + Overdrive
5
4
3
2
1
0
5
4
3
2
1
0
100 mV
50 mV
20 mV
100 mV
50 mV
20 mV
5 mV
5 mV
0
5
10 15 20 25 30 35 40
t − Time − ns
0
5
10 15 20 25 30 35 40
t − Time − ns
Figure 2
Figure 3
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢅꢆ ꢇꢇ ꢈꢉ ꢈꢊꢀ ꢆꢋ ꢁ ꢌꢍ ꢎꢏꢋ ꢉꢋꢀꢍ ꢉ
SLCS002D − JUNE 1983 − REVISED AUGUST 2003
TYPICAL CHARACTERISTICS
COMMON-MODE
PULSE RESPONSE
4
3
2
1
0
V
T
A
= 5 V
CC
= 25°C
50 Ω
V
O
50 Ω
1.7
1.65
1.6
V
IC
1.55
1.5
0
20 40 60 80 100 120 140 160
t − Time − ns
Figure 4
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Feb-2005
PACKAGING INFORMATION
Orderable Device
TL712CD
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
8
8
8
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
TL712CDR
TL712CP
SOIC
PDIP
D
P
2500
50
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TL712CPSR
TL712CPW
TL712CPWR
SO
PS
PW
PW
2000
150
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
TSSOP
TSSOP
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
2000
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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相关型号：
TL712CDRG4
COMPARATOR, 5000uV OFFSET-MAX, 25ns RESPONSE TIME, PDSO8, GREEN, PLASTIC, MS-012AA, SOIC-8
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