TLC279MFKB [TI]

The TLC274 and TLC279 quad operational amplifiers combine a wide range of input offset voltage grades with low offset voltage drift, high...; 该TLC274和TLC279四通道运算放大器结合了宽范围的输入失调电压等级的低失调电压漂移，高...


型号：	TLC279MFKB
厂家：	TEXAS INSTRUMENTS
描述：	The TLC274 and TLC279 quad operational amplifiers combine a wide range of input offset voltage grades with low offset voltage drift, high... 该TLC274和TLC279四通道运算放大器结合了宽范围的输入失调电压等级的低失调电压漂移，高... 运算放大器放大器电路
文件：	总53页 (文件大小：1622K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

Trimmed Offset Voltage:

TLC279 . . . 900 µV Max at 25°C,

= 5 V

D, J, N, OR PW PACKAGE

(TOP VIEW)

Input Offset Voltage Drift . . . Typically

0.1 µV/Month, Including the First 30 Days

Wide Range of Supply Voltages Over

Specified Temperature Range:

0°C to 70°C . . . 3 V to 16 V

−40°C to 85°C . . . 4 V to 16 V

−55°C to 125°C . . . 4 V to 16 V

Single-Supply Operation

1OUT

1IN−

1IN+

4OUT

13 4IN−

4IN+

GND

3IN+

3IN−

3OUT

2IN+

2IN−

2OUT

Common-Mode Input Voltage Range

Extends Below the Negative Rail (C-Suffix

and I-Suffix Versions)

FK PACKAGE

(TOP VIEW)

Low Noise . . . Typically 25 nV/√Hz

at f = 1 kHz

20 19

Output Voltage Range Includes Negative

Rail

4IN+

1IN+

High Input Impedance . . . 10 Ω Typ

GND

ESD-Protection Circuitry

3IN+

2IN+

Small-Outline Package Option Also

Available in Tape and Reel

9 10 11 12 13

Designed-In Latch-Up Immunity

description

NC − No internal connection

The TLC274 and TLC279 quad operational

amplifiers combine a wide range of input offset

voltage grades with low offset voltage drift, high

input impedance, low noise, and speeds

approaching that of general-purpose BiFET

devices.

DISTRIBUTION OF TLC279

INPUT OFFSET VOLTAGE

290 Units Tested From 2 Wafer Lots

= 5 V

= 25°C

These devices use Texas Instruments silicon-

gate LinCMOS technology, which provides

offset voltage stability far exceeding the stability

N Package

available

with

conventional

metal-gate

processes.

The extremely high input impedance, low bias

currents, and high slew rates make these

cost-effective devices ideal for applications which

have previously been reserved for BiFET and

NFET products. Four offset voltage grades are

available (C-suffix and I-suffix types), ranging

from the low-cost TLC274 (10 mV) to the high-

precision TLC279 (900 µV). These advantages, in

combination with good common-mode rejection

and supply voltage rejection, make these devices

a good choice for new state-of-the-art designs as

well as for upgrading existing designs.

−1200

−600

600

1200

− Input Offset Voltage − µV

LinCMOS is a trademark of Texas Instruments.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

description (continued)

In general, many features associated with bipolar technology are available on LinCMOS operational

amplifiers, without the power penalties of bipolar technology. General applications such as transducer

interfacing, analog calculations, amplifier blocks, active filters, and signal buffering are easily designed with the

TLC274 and TLC279. The devices also exhibit low voltage single-supply operation, making them ideally suited

for remote and inaccessible battery-powered applications. The common-mode input voltage range includes the

negative rail.

A wide range of packaging options is available, including small-outline and chip-carrier versions for high-density

system applications.

The device inputs and outputs are designed to withstand −100-mA surge currents without sustaining latch-up.

The TLC274 and TLC279 incorporate internal ESD-protection circuits that prevent functional failures at voltages

up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be exercised in handling

these devices as exposure to ESD may result in the degradation of the device parametric performance.

The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized

for operation from −40°C to 85°C. The M-suffix devices are characterized for operation over the full military

temperature range of −55°C to 125°C.

AVAILABLE OPTIONS

PACKAGED DEVICES

CHIP

max

SMALL

OUTLINE

(D)

CHIP

CARRIER

(FK)

CERAMIC

DIP

PLASTIC

DIP

FORM

(Y)

TSSOP

(PW)

AT 25°C

(J)

(N)

900 µV

2 mV

5 mV

TLC279CD

TLC274BCD

TLC274ACD

TLC274CD

—

TLC279CN

TLC274BCN

TLC274ACN

TLC274CN

—

0°C to 70°C

10 mV

TLC274CPW

TLC274Y

900 µV

2 mV

5 mV

TLC279ID

TLC274BID

TLC274AID

TLC274ID

—

TLC279IN

TLC274BIN

TLC274AIN

TLC274IN

—

−40°C to 85°C

−55°C to 125°C

10 mV

900 µV

10 mV

TLC279MD

TLC274MD

TLC279MFK

TLC274MFK

TLC279MJ

TLC274MJ

TLC279MN

TLC274MN

—

The D package is available taped and reeled. Add R suffix to the device type (e.g., TLC279CDR).

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢇ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢈ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢉꢆ ꢀꢁ ꢂꢃ ꢄꢊ

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

equivalent schematic (each amplifier)

IN−

IN+

OUT

GND

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

TLC274Y chip information

These chips, when properly assembled, display characteristics similar to the TLC274C. Thermal compression

or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with

conductive epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

(4)

(14)

(11)

(8)

(13)

(12)

(10)

(9)

(3)

(2)

−

1IN+

1IN−

(1)

1OUT

(5)

(6)

2IN+

2IN−

(7)

2OUT

−

(10)

(9)

−

3IN+

3IN−

(8)

3OUT

(12)

(13)

−

4IN+

4IN−

(14)

4OUT

(2)

(3)

(6)

(1)

(5)

(4)

108

(7)

GND

CHIP THICKNESS: 15 TYPICAL

BONDING PADS: 4 × 4 MINIMUM

T max = 150°C

TOLERANCES ARE 10%.

ALL DIMENSIONS ARE IN MILS.

PIN (11) IS INTERNALLY CONNECTED

TO BACK SIDE OF CHIP.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V

Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, V (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V

Input current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA

Output current, l (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA

Total current into V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA

Total current out of GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA

Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited

Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table

Operating free-air temperature, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C

I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C

M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C

Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or PW package . . . . . . . . . . . . 260°C

Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . . . . . . . . . . . . . . . . . . . . . 300°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.

2. Differential voltages are at the noninverting input with respect to the inverting input.

3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum

dissipation rating is not exceeded (see application section).

DISSIPATION RATING TABLE

≤ 25°C

DERATING FACTOR

= 70°C

= 85°C

T = 125°C

PACKAGE

POWER RATING

ABOVE T = 25°C

POWER RATING

494 mW

715 mW

819 mW

—

POWER RATING

950 mW

7.6 mW/°C

11.0 mW/°C

12.6 mW/°C

5.6 mW/°C

608 mW

—

275 mW

—

1375 mW

1575 mW

700 mW

880 mW

1008 mW

448 mW

—

recommended operating conditions

C SUFFIX

I SUFFIX

M SUFFIX

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

Supply voltage, V

3.5

8.5

3.5

8.5

= 5 V

−0.2

−40

3.5

Common-mode input voltage, V

= 10 V

8.5

Operating free-air temperature, T

−55

125

°C

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢀ ꢁ ꢂ ꢃꢄ ꢅ ꢇꢆ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢉꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢊ

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

electrical characteristics at specified free-air temperature, V

= 5 V (unless otherwise noted)

TLC274C, TLC274AC,

TLC274BC, TLC279C

†

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

25°C

Full range

25°C

1.1

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

TLC274C

TLC274AC

TLC274BC

TLC279C

0.9

340

320

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

25°C

6.5

Input offset voltage

2000

3000

900

1500

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

25°C

µV

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

Average temperature coefficient of input

offset voltage

25°C to

70°C

1.8

µV/°C

VIO

25°C

70°C

25°C

70°C

0.1

300

Input offset current (see Note 4)

Input bias current (see Note 4)

= 2.5 V,

= 2.5 V

0.6

600

−0.2

−0.3

4.2

25°C

Common-mode input voltage range

(see Note 5)

ICR

−0.2

Full range

3.5

25°C

0°C

3.2

3.8

High-level output voltage

Low-level output voltage

= 100 mV,

= 10 kΩ

= 0

V/mV

70°C

25°C

0°C

= −100 mV,

= 0.25 V to 2 V,

70°C

25°C

0°C

2.7

3.1

2.3

Large-signal differential voltage

amplification

= 10 kΩ

70°C

25°C

0°C

CMRR Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

70°C

25°C

0°C

= 5 V to 10 V,

= 1.4 V

SVR

(∆V

/∆V )

70°C

25°C

0°C

6.4

7.2

5.2

= 2.5 V,

Supply current (four amplifiers)

No load

70°C

†

Full range is 0°C to 70°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢇ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢈ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢉꢆ ꢀꢁ ꢂꢃ ꢄꢊ

ꢐꢑꢒ ꢂꢓꢏ ꢓꢎ ꢔ ꢕ ꢖꢇꢗ ꢎ ꢐꢒꢑ ꢇꢀ ꢓꢎ ꢔꢇꢁ ꢇꢍ ꢐ ꢁꢓ ꢘꢓ ꢒꢑ ꢏ

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

electrical characteristics at specified free-air temperature, V

= 10 V (unless otherwise noted)

TLC274C, TLC274AC,

TLC274BC, TLC279C

†

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

25°C

Full range

25°C

1.1

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

TLC274C

TLC274AC

TLC274BC

TLC279C

0.9

390

370

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

25°C

6.5

Input offset voltage

2000

3000

1200

1900

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

25°C

µV

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

Average temperature coefficient of

input offset voltage

25°C to

70°C

µV/°C

VIO

25°C

70°C

25°C

70°C

0.1

300

Input offset current (see Note 4)

Input bias current (see Note 4)

=.5 V,

= 5 V

0.7

600

−0.2

−0.3

9.2

25°C

Common-mode input voltage range

(see Note 5)

ICR

−0.2

Full range

8.5

25°C

0°C

7.8

8.5

8.4

High-level output voltage

Low-level output voltage

= 100 mV,

= −100 mV,

= 1 V to 6 V,

= 10 kΩ

V/mV

70°C

25°C

0°C

= 0

70°C

25°C

0°C

7.5

3.8

4.5

3.2

Large-signal differential voltage

amplification

= 10 kΩ

70°C

25°C

0°C

CMRR Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

70°C

25°C

0°C

= 5 V to 10 V,

= 1.4 V

SVR

(∆V

/∆V )

70°C

25°C

0°C

8.8

6.8

= 5 V,

Supply current (four amplifiers)

No load

70°C

†

Full range is 0°C to 70°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢀ ꢁ ꢂ ꢃꢄ ꢅ ꢇꢆ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢉꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢊ

ꢎ

ꢁ

ꢋ

ꢌ

ꢂ

ꢍꢎ

ꢏ 

ꢐ

ꢑ

ꢒ

ꢂ

ꢓ

ꢏ

ꢓ

ꢎ

ꢔ

ꢕ

ꢖ

ꢇ

ꢗ

ꢎ

ꢐꢒ

ꢑ

ꢇꢀ

ꢓ

ꢔ

ꢇ

ꢁ

ꢇ

ꢍ

ꢐ

ꢁ

ꢓ

ꢘ

ꢓ

ꢒ

ꢑ

ꢏ

SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

electrical characteristics at specified free-air temperature, V

= 5 V (unless otherwise noted)

TLC274I, TLC274AI,

TLC274BI, TLC279I

†

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

25°C

Full range

25°C

1.1

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

TLC274I

TLC274AI

TLC274BI

TLC279I

0.9

340

320

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

25°C

Input offset voltage

2000

3500

900

2000

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

25°C

µV

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

Average temperature coefficient of input

offset voltage

25°C to

85°C

1.8

µV/°C

VIO

25°C

85°C

25°C

85°C

0.1

1000

Input offset current (see Note 4)

Input bias current (see Note 4)

= 2.5 V,

= 2.5 V

0.6

200

2000

−0.2

−0.3

4.2

25°C

Common-mode input voltage range

(see Note 5)

ICR

−0.2

3.5

Full range

25°C

−40°C

85°C

3.2

3.8

High-level output voltage

Low-level output voltage

= 100 mV,

= 10 kΩ

= 0

25°C

−40°C

85°C

= −100 mV,

= 0.25 V to 2 V,

V/mV

25°C

3.5

2.7

3.8

2.1

Large-signal differential voltage

amplification

−40°C

85°C

= 10 kΩ

25°C

−40°C

85°C

CMRR Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

25°C

−40°C

85°C

= 5 V to 10 V,

= 1.4 V

SVR

(∆V

/∆V )

25°C

6.4

8.8

4.8

= 2.5 V,

Supply current (four amplifiers)

−40°C

85°C

No load

†

Full range is −40°C to 85°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢇ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢈ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢉꢆ ꢀꢁ ꢂꢃ ꢄꢊ

ꢐꢑꢒ ꢂꢓꢏ ꢓꢎ ꢔ ꢕ ꢖꢇꢗ ꢎ ꢐꢒꢑ ꢇꢀ ꢓꢎ ꢔꢇꢁ ꢇꢍ ꢐ ꢁꢓ ꢘꢓ ꢒꢑ ꢏ

ꢁꢋ

ꢌ

ꢂ

ꢍ

ꢎ

ꢏ



SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

electrical characteristics at specified free-air temperature, V

= 10 V (unless otherwise noted)

TLC274I, TLC274AI,

TLC274BI, TLC279I

†

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

25°C

Full range

25°C

1.1

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

TLC274I

TLC274AI

TLC274BI

TLC279I

0.9

390

370

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

25°C

Input offset voltage

2000

3500

1200

2900

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

25°C

µV

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

Full range

Average temperature coefficient of input

offset voltage

25°C to

85°C

µV/°C

VIO

25°C

85°C

25°C

85°C

0.1

1000

Input offset current (see Note 4)

Input bias current (see Note 4)

= 5 V,

= 5 V

0.7

220

2000

−0.2

−0.3

9.2

25°C

Common-mode input voltage range

(see Note 5)

ICR

−0.2

Full range

8.5

25°C

−40°C

85°C

7.8

8.5

High-level output voltage

Low-level output voltage

= 100 mV,

= −100 mV,

= 1 V to 6 V,

= 10 kΩ

= 0

V/mV

25°C

−40°C

85°C

25°C

3.8

5.5

2.9

Large-signal differential voltage

amplification

−40°C

85°C

= 10 kΩ

25°C

−40°C

85°C

CMRR Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

25°C

−40°C

85°C

= 5 V to 10 V,

= 1.4 V

SVR

(∆V

/∆V )

25°C

= 5 V,

Supply current (four amplifiers)

−40°C

85°C

No load

6.4

†

Full range is −40°C to 85°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢀ ꢁ ꢂ ꢃꢄ ꢅ ꢇꢆ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢉꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢊ

ꢎ

ꢁ

ꢋ

ꢌ

ꢂ

ꢍ

ꢎ

ꢏ 

ꢐ

ꢑ

ꢒ

ꢂ

ꢓ

ꢏꢓ

ꢎ

ꢔ

ꢕ

ꢖ

ꢇ

ꢗ

ꢎ

ꢐ

ꢒ

ꢑ

ꢇꢀ

ꢓ

ꢔ

ꢇ

ꢁ

ꢇ

ꢍ

ꢐ

ꢁ

ꢓ

ꢘ

ꢓ

ꢒ

ꢑ

ꢏ

SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

electrical characteristics at specified free-air temperature, V

= 5 V (unless otherwise noted)

TLC274M, TLC279M

†

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

25°C

Full range

25°C

1.1

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

TLC274M

TLC279M

Input offset voltage

320

900

3750

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

µV

Full range

Average temperature coefficient of input

offset voltage

25°C to

125°C

VIO

2.1

µV/°C

25°C

125°C

25°C

0.1

1.4

0.6

Input offset current (see Note 4)

Input bias current (see Note 4)

= 2.5 V,

= 2.5 V

125°C

−0.3

4.2

25°C

Common-mode input voltage range

(see Note 5)

ICR

3.5

Full range

25°C

−55°C

125°C

25°C

3.2

3.8

High-level output voltage

Low-level output voltage

= 100 mV,

= 10 kΩ

= 0

V/mV

−55°C

125°C

25°C

= −100 mV,

= 0.25 V to 2 V,

3.5

2.7

Large-signal differential voltage

amplification

−55°C

125°C

25°C

= 10 kΩ

−55°C

125°C

25°C

CMRR Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

−55°C

125°C

25°C

= 5 V to 10 V,

= 1.4 V

SVR

(∆V

/∆V )

6.4

= 2.5 V,

Supply current (four amplifiers)

−55°C

125°C

No load

1.9

4.4

†

Full range is −55°C to 125°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢇ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢈ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢉꢆ ꢀꢁ ꢂꢃ ꢄꢊ

ꢐꢑꢒ ꢂꢓꢏ ꢓꢎ ꢔ ꢕ ꢖꢇꢗ ꢎ ꢐꢒꢑ ꢇꢀ ꢓꢎ ꢔꢇꢁ ꢇꢍ ꢐ ꢁꢓ ꢘꢓ ꢒꢑ ꢏ

ꢁꢋ

ꢌ

ꢂ

ꢍ

ꢎ

ꢏ 

SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

electrical characteristics at specified free-air temperature, V

= 10 V (unless) otherwise noted)

TLC274M, TLC279M

†

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

25°C

Full range

25°C

1.1

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

TLC274M

TLC279M

Input offset voltage

370

1200

4300

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

µV

Full range

Average temperature coefficient of input

offset voltage

25°C to

125°C

VIO

2.2

µV/°C

25°C

125°C

25°C

0.1

1.8

0.7

Input offset current (see Note 4)

Input bias current (see Note 4)

= 5 V,

= 5 V

125°C

−0.3

9.2

25°C

Common-mode input voltage range

(see Note 5)

ICR

8.5

Full range

25°C

−55°C

125°C

25°C

7.8

8.5

8.4

High-level output voltage

Low-level output voltage

= 100 mV,

= −100 mV,

= 1 V to 6 V,

= 10 kΩ

= 0

V/mV

−55°C

125°C

25°C

3.8

6.0

2.5

Large-signal differential voltage

amplification

−55°C

125°C

25°C

= 10 kΩ

−55°C

125°C

25°C

CMRR Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

−55°C

125°C

25°C

= 5 V to 10 V,

= 1.4 V

SVR

(∆V

/∆V )

= 5 V,

Supply current (four amplifiers)

−55°C

125°C

No load

5.6

†

Full range is −55°C to 125°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢀ ꢁ ꢂ ꢃꢄ ꢅ ꢇꢆ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢉꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢊ

ꢎ

ꢁ

ꢋ

ꢌ

ꢂ

ꢍꢎ

ꢏ 

ꢐ

ꢑ

ꢒ

ꢂ

ꢓ

ꢏꢓ

ꢎ

ꢔ

ꢕ

ꢖ

ꢇ

ꢗ

ꢎ

ꢐ

ꢒ

ꢑ

ꢇꢀ

ꢓ

ꢔ

ꢇ

ꢁ

ꢇ

ꢍ

ꢐ

ꢁ

ꢓ

ꢘ

ꢓ

ꢒ

ꢑ

ꢏ

SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

operating characteristics at specified free-air temperature, V

= 5 V

TLC274C, TLC274AC,

TLC274AC,

TLC274BC, TLC279C

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

3.6

MAX

25°C

0°C

= 1 V

IPP

= 10 Ω,

70°C

25°C

0°C

= 20 F,

Slew rate at unity gain

V/µs

2.9

3.1

2.5

See Figure 1

= 2.5 V

IPP

70°C

f = 1 kHz,

See Figure 2

= 20 Ω,

Equivalent input noise voltage

25°C

nV/√Hz

25°C

0°C

320

340

260

1.7

= V

= 10 kΩ,

= 20 F,

Maximum output-swing bandwidth

kHz

See Figure 1

70°C

25°C

0°C

V = 10 mV,

See Figure 3

C = 20 F,

L P

Unity-gain bandwidth

Phase margin

MHz

70°C

25°C

0°C

1.3

46°

47°

44°

V = 10 mV,

f = B ,

= 20 F,

70°C

operating characteristics at specified free-air temperature, V

= 10 V

TLC274C, TLC274AC,

TLC274AC,

TLC274BC, TLC279C

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

5.3

5.9

4.3

4.6

5.1

3.8

MAX

25°C

0°C

= 1 V

IPP

= 10 Ω,

70°C

25°C

0°C

= 20 F,

Slew rate at unity gain

V/µs

See Figure 1

= 5.5 V

IPP

70°C

f = 1 kHz,

See Figure 2

= 20 Ω,

Equivalent input noise voltage

25°C

nV/√Hz

25°C

0°C

200

220

140

2.2

2.5

1.8

49°

50°

46°

= V

= 10 kΩ,

= 20 F,

Maximum output-swing bandwidth

kHz

See Figure 1

70°C

25°C

0°C

V = 10 mV,

See Figure 3

C = 20 F,

L P

Unity-gain bandwidth

Phase margin

MHz

70°C

25°C

0°C

V = 10 mV,

f = B ,

See Figure 3

= 20 F,

70°C

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢇ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢈ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢉꢆ ꢀꢁ ꢂꢃ ꢄꢊ

ꢐꢑꢒ ꢂꢓꢏ ꢓꢎ ꢔ ꢕ ꢖꢇꢗ ꢎ ꢐꢒꢑ ꢇꢀ ꢓꢎ ꢔꢇꢁ ꢇꢍ ꢐ ꢁꢓ ꢘꢓ ꢒꢑ ꢏ

ꢁ

ꢋ

ꢌ

ꢂ

ꢍ

ꢎ

ꢏ 

SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

operating characteristics at specified free-air temperature, V

= 5 V

TLC274I, TLC274AI,

TLC274BI, TLC279I

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

3.6

4.5

2.8

2.9

3.5

2.3

MAX

25°C

−40°C

85°C

= 1 V

IPP

= 10 kΩ,

= 20 F,

Slew rate at unity gain

V/µs

25°C

See Figure 1

−40°C

85°C

= 2.5 V

= 20 Ω,

f = 1 kHz,

See Figure 2

Equivalent input noise voltage

25°C

nV/√Hz

25°C

−40°C

85°C

320

380

250

1.7

2.6

1.2

46°

49°

43°

= V

= 20 F,

Maximum output-swing bandwidth

kHz

= 10 kΩ,

See Figure 1

25°C

V = 10 mV,

See Figure 3

C = 20 F,

L P

−40°C

85°C

Unity-gain bandwidth

Phase margin

MHz

25°C

= 10 mV,

f = B ,

See Figure 3

−40°C

85°C

= 20 F,

operating characteristics at specified free-air temperature, V

= 10 V

TLC274I, TLC274AI,

TLC274BI, TLC279I

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

5.3

6.7

MAX

25°C

−40°C

85°C

= 1 V

IPP

= 10 Ω,

= 20 F,

Slew rate at unity gain

V/µs

25°C

4.6

5.8

3.5

See Figure 1

−40°C

85°C

= 5.5 V

f = 1 kHz,

See Figure 2

= 20 Ω,

Equivalent input noise voltage

25°C

nV/√Hz

25°C

−40°C

85°C

200

260

130

2.2

3.1

1.7

49°

52°

46°

= V

= 20 F,

Maximum output-swing bandwidth

kHz

= 10 kΩ,

See Figure 1

25°C

V = 10 mV,

See Figure 3

C = 20 F,

L P

−40°C

85°C

Unity-gain bandwidth

Phase margin

MHz

25°C

= 10 mV,

f = B ,

See Figure 3

−40°C

85°C

= 20 F,

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢀ ꢁ ꢂ ꢃꢄ ꢅ ꢇꢆ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢉꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢊ

ꢎ

ꢁ

ꢋ

ꢌ

ꢂ

ꢍꢎ

ꢏ 

ꢐ

ꢑ

ꢒ

ꢂ

ꢓ

ꢏꢓ

ꢎ

ꢔ

ꢕ

ꢖ

ꢇ

ꢗ

ꢎ

ꢐ

ꢒ

ꢑ

ꢇ

ꢀ

ꢓ

ꢔ

ꢇ

ꢁ

ꢇ

ꢍ

ꢐ

ꢁ

ꢓ

ꢘ

ꢓ

ꢒ

ꢑ

ꢏ

SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

operating characteristics at specified free-air temperature, V

= 5 V

TLC274M, TLC279M

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

3.6

4.7

2.3

2.9

3.7

MAX

25°C

−55°C

125°C

25°C

= 1 V

IPP

= 10 kΩ,

= 20 F,

Slew rate at unity gain

V/µs

See Figure 1

−55°C

125°C

= 2.5 V

f = 1 kHz,

See Figure 2

= 20 Ω,

Equivalent input noise voltage

25°C

nV/√Hz

25°C

−55°C

125°C

25°C

320

400

230

1.7

2.9

1.1

46°

49°

41°

= V

= 10 kΩ,

= 20 F,

kHz

Maximum output-swing bandwidth

See Figure 1

= 10 mV,

C = 20 F,

L P

−55°C

125°C

25°C

MHz

Unity-gain bandwidth

Phase margin

See Figure 3

= 10 mV,

= 20 F,

f = B ,

See Figure 3

−55°C

125°C

operating characteristics at specified free-air temperature, V

= 10 V

TLC274M, TLC279M

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

5.3

7.1

3.1

4.6

6.1

2.7

MAX

25°C

−55°C

125°C

25°C

= 1 V

IPP

= 10 Ω ,

= 20 F,

Slew rate at unity gain

V/µs

See Figure 1

−55°C

125°C

= 5.5 V

f = 1 kHz,

See Figure 2

= 20 Ω,

Equivalent input noise voltage

25°C

nV/√Hz

25°C

−55°C

125°C

25°C

200

280

110

2.2

3.4

1.6

49°

52°

44°

= V

= 10 kΩ,

= 20 F,

Maximum output-swing bandwidth

kHz

See Figure 1

= 10 mV,

C = 20 F,

L P

−55°C

125°C

25°C

Unity-gain bandwidth

Phase margin

MHz

See Figure 3

= 10 mV,

= 20 F,

f = B ,

See Figure 3

−55°C

125°C

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢇ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢈ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅꢉꢆ ꢀꢁ ꢂꢃ ꢄꢊ

ꢐꢑꢒ ꢂꢓꢏ ꢓꢎ ꢔ ꢕ ꢖꢇꢗ ꢎ ꢐꢒꢑ ꢇꢀ ꢓꢎ ꢔꢇꢁ ꢇꢍ ꢐ ꢁꢓ ꢘꢓ ꢒꢑ ꢏ

ꢁ

ꢋ

ꢌ

ꢂ

ꢍ

ꢎ

ꢏ 

SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

electrical characteristics, V

= 5 V, T = 25°C (unless otherwise noted)

TLC274Y

TYP

PARAMETER

Input offset voltage

TEST CONDITIONS

UNIT

MIN

MAX

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

1.1

Input offset current (see Note 4)

Input bias current (see Note 4)

0.1

0.6

= 2.5 V,

= 2.5 V

−0.2

−0.3

4.2

ICR

Common-mode input voltage range (see Note 5)

High-level output voltage

= 100 mV,

= 10 kΩ

= 0

3.2

3.8

V/mV

Low-level output voltage

= −100 mV,

= 0.25 V to 2 V,

Large-signal differential voltage amplification

= 10 kΩ

CMRR Common-mode rejection ratio

= V

min

= 5 V to 10 V,

ICR

Supply-voltage rejection ratio (∆V

/∆V

)

= 1.4 V

SVR

= 2.5 V,

Supply current (four amplifiers)

2.7

6.4

No load

electrical characteristics, V

= 10 V, T = 25°C (unless otherwise noted)

TLC274Y

TYP

PARAMETER

Input offset voltage

TEST CONDITIONS

UNIT

MIN

MAX

= 1.4 V,

= 50 Ω,

= 0,

= 10 kΩ

1.1

Input offset current (see Note 4)

Input bias current (see Note 4)

0.1

0.7

= 5 V,

= 5 V

−0.2

−0.3

9.2

ICR

Common-mode input voltage range (see Note 5)

High-level output voltage

= 100 mV,

= −100 mV,

= 1 V to 6 V,

= 10 kΩ

= 0

8.5

V/mV

Low-level output voltage

Large-signal differential voltage amplification

= 10 kΩ

CMRR Common-mode rejection ratio

= V

min

= 5 V to 10 V,

ICR

Supply-voltage rejection ratio (∆V

/∆V

)

= 1.4 V

SVR

= 5 V,

Supply current (four amplifiers)

3.8

No load

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

operating characteristics, V

= 5 V, T = 25°C

TLC274Y

TYP

3.6

PARAMETER

TEST CONDITIONS

UNIT

MIN

MAX

= 1 V

= 10 kΩ,

= 20 F,

IPP

Slew rate at unity gain

V/µs

nV/√Hz

kHz

See Figure 1

= 2.5 V

2.9

IPP

Equivalent input noise voltage

f = 1 kHz,

= 20 Ω,

See Figure 2

R = 10 kΩ,

= V

= 20 F,

Maximum output-swing bandwidth

Unity-gain bandwidth

Phase margin

320

1.7

46°

See Figure 1

= 10 mV,

= 20 F,

See Figure 3

MHz

f = B ,

= 20 F,

L P

See Figure 3

operating characteristics, V

= 10 V, T = 25°C

TLC274Y

TYP

5.3

PARAMETER

TEST CONDITIONS

UNIT

MIN

MAX

= 1 V

= 10 kΩ,

= 20 F,

IPP

Slew rate at unity gain

V/µs

nV/√Hz

kHz

See Figure 1

= 5.5 V

4.6

IPP

Equivalent input noise voltage

f = 1 kHz,

= 20 Ω,

See Figure 2

R = 10 kΩ,

= V

= 20 F,

Maximum output-swing bandwidth

Unity-gain bandwidth

Phase margin

200

2.2

49°

See Figure 1

= 10 mV,

= 20 F,

See Figure 3

C = 20 F,

MHz

f = B ,

See Figure 3

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

PARAMETER MEASUREMENT INFORMATION

single-supply versus split-supply test circuits

Because the TLC274 and TLC279 are optimized for single-supply operation, circuit configurations used for the

various tests often present some inconvenience since the input signal, in many cases, must be offset from

ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to

the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either

circuit gives the same result.

−

(a) SINGLE SUPPLY

(b) SPLIT SUPPLY

Figure 1. Unity-Gain Amplifier

2 kΩ

20 Ω

−

1/2 V

20 Ω

−

(a) SINGLE SUPPLY

(b) SPLIT SUPPLY

Figure 2. Noise-Test Circuit

10 kΩ

100 Ω

−

1/2 V

−

(a) SINGLE SUPPLY

(b) SPLIT SUPPLY

Figure 3. Gain-of-100 Inverting Amplifier

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

PARAMETER MEASUREMENT INFORMATION

input bias current

Because of the high input impedance of the TLC274 and TLC279 operational amplifiers, attempts to measure

the input bias current can result in erroneous readings. The bias current at normal room ambient temperature

is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are

offered to avoid erroneous measurements:

1. Isolate the device from other potential leakage sources. Use a grounded shield around and between the

device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away.

2. Compensate for the leakage of the test socket by actually performing an input bias current test (using

a picoammeter) with no device in the test socket. The actual input bias current can then be calculated

by subtracting the open-socket leakage readings from the readings obtained with a device in the test

socket.

One word of caution: many automatic testers as well as some bench-top operational amplifier testers use the

servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage

drop across the series resistor is measured and the bias current is calculated). This method requires that a

device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not

feasible using this method.

V = V

Figure 4. Isolation Metal Around Device Inputs (J and N packages)

low-level output voltage

To obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise

results in the device low-level output being dependent on both the common-mode input voltage level as well

as the differential input voltage level. When attempting to correlate low-level output readings with those quoted

in the electrical specifications, these two conditions should be observed. If conditions other than these are to

be used, please refer to Figures 14 through 19 in the Typical Characteristics of this data sheet.

input offset voltage temperature coefficient

Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This

parameter is actually a calculation using input offset voltage measurements obtained at two different

temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device

and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input

offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the

moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these

measurements be performed at temperatures above freezing to minimize error.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

PARAMETER MEASUREMENT INFORMATION

full-power response

Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage

swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is

generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal

input signal until the maximum frequency is found above which the output contains significant distortion. The

full-peak response is defined as the maximum output frequency, without regard to distortion, above which full

peak-to-peak output swing cannot be maintained.

Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified

in this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal

input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is

increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same

amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained

(Figure 5). A square wave is used to allow a more accurate determination of the point at which the maximum

peak-to-peak output is reached.

(a) f = 1 kHz

(b) BOM > f > 1 kHz

(d) f > BOM

Figure 5. Full-Power-Response Output Signal

test time

Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume,

short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET

devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more

pronounced with reduced supply levels and lower temperatures.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

6, 7

Input offset voltage

Distribution

VIO

Temperature coefficient of input offset voltage

Distribution

8, 9

vs High-level output current

vs Supply voltage

vs Free-air temperature

10, 11

High-level output voltage

vs Common-mode input voltage

vs Differential input voltage

vs Free-air temperature

14, 15

Low-level output voltage

vs Low-level output current

18, 19

vs Supply voltage

vs Free-air temperature

vs Frequency

32, 33

Large-signal differential voltage amplification

Input bias current

vs Free-air temperature

vs Supply voltage

Input offset current

Common-mode input voltage

vs Supply voltage

vs Free-air temperature

Supply current

Slew rate

vs Supply voltage

vs Free-air temperature

Normalized slew rate

vs Free-air temperature

vs Frequency

Maximum peak-to-peak output voltage

O(PP)

vs Free-air temperature

vs Supply voltage

Unity-gain bandwidth

Phase margin

vs Supply voltage

vs Free-air temperature

vs Load capacitance

Equivalent input noise voltage

Phase shift

vs Frequency

32, 33

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

TYPICAL CHARACTERISTICS

DISTRIBUTION OF TLC274

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLC274

INPUT OFFSET VOLTAGE

753 Amplifiers Tested From 6 Wafer Lots

= 5 V

= 10 V

= 25°C

T = 25°C

N Package

−5 −4 −3 −2 −1

− Input Offset Voltage − mV

Figure 6

Figure 7

DISTRIBUTION OF TLC274 AND TLC279

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLC274 AND TLC279

INPUT OFFSET VOLTAGE

TEMPERATURE COEFFICIENT

324 Amplifiers Tested From 8 Wafer Lots

= 5 V

= 25°C to 125°C

= 10 V

= 25°C to 125°C

N Package

Outliers:

(1) 20.5 V/°C

N Package

Outliers:

(1) 21.2 V/C

−10 −8 −6 −4 −2

VIO

− Temperature Coefficient − µV/°C

VIO

− Temperature Coefficient − µV/°C

Figure 8

Figure 9

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

†

TYPICAL CHARACTERISTICS

HIGH-LEVEL OUTPUT VOLTAGE

HIGH-LEVEL OUTPUT CURRENT

= 100 mV

= 25°C

T = 25°C

= 16 V

= 5 V

= 4 V

= 10 V

= 3 V

−2

−4

−6

−8

−10

−5

−10 −15 −20 −25 −30 −35 −40

− High-Level Output Current − mA

Figure 10

Figure 11

HIGH-LEVEL OUTPUT VOLTAGE

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

−1.6

−1.7

−1.8

−1.9

= −5 mA

= 100 mV

= 100 mA

= 10 kΩ

= 25°C

= 5 V

−2

= 10 V

−2.1

−2.2

−2.3

−2.4

−75 −50 −25

100 125

− Free-Air Temperature − °C

− Supply Voltage − V

Figure 12

Figure 13

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

†

TYPICAL CHARACTERISTICS

LOW-LEVEL OUTPUT VOLTAGE

COMMON-MODE INPUT VOLTAGE

700

650

500

450

400

350

300

250

= 5 V

= 10 V

= 5 mA

= 25°C

600

550

= −100 mV

= −1 V

500

450

= −2.5 V

400

350

= −1 V

300

− Common-Mode Input Voltage − V

Figure 14

Figure 15

LOW-LEVEL OUTPUT VOLTAGE

DIFFERENTIAL INPUT VOLTAGE

FREE-AIR TEMPERATURE

800

700

600

500

400

300

200

100

900

800

700

600

500

400

300

200

100

= 5 mA

= −1 V

= 0.5 V

= 5 mA

= |V /2|

= 25°C

= 5 V

= 10 V

−75 −50 −25

100 125

−1 −2 −3 −4 −5 −6 −7 −8 −9 −10

− Free-Air Temperature − °C

− Differential Input Voltage − V

Figure 16

Figure 17

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

†

TYPICAL CHARACTERISTICS

LOW-LEVEL OUTPUT VOLTAGE

LOW-LEVEL OUTPUT CURRENT

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

2.5

= −1 V

= 0.5 V

= 25°C

= −1 V

= 0.5 V

= 25°C

= 16 V

= 5 V

= 4 V

= 10 V

= 3 V

1.5

0.5

− Low-Level Output Current − mA

Figure 18

Figure 19

LARGE-SIGNAL

DIFFERENTIAL VOLTAGE AMPLIFICATION

LARGE-SIGNAL

DIFFERENTIAL VOLTAGE AMPLIFICATION

SUPPLY VOLTAGE

FREE-AIR TEMPERATURE

= −55°C

= 10 kΩ

= 0°C

= 10 V

= 5 V

= 25°C

= 85°C

= 125°C

−75 −50 −25

100 125

− Supply Voltage − V

− Free-Air Temperature − °C

Figure 20

Figure 21

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

†

TYPICAL CHARACTERISTICS

INPUT BIAS CURRENT AND INPUT OFFSET CURRENT

COMMON-MODE

INPUT VOLTAGE POSITIVE LIMIT

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

10000

1000

100

= 10 V

= 5 V

= 25°C

See Note A

0.1

105

125

− Free-Air Temperature − °C

− Supply Voltage − V

NOTE A: The typical values of input bias current and input offset

current below 5 pA were determined mathematically.

Figure 22

Figure 23

SUPPLY CURRENT

SUPPLY VOLTAGE

SUPPLY CURRENT

FREE-AIR TEMPERATURE

= V /2

V = V /2

O DD

No Load

= −55°C

= 0°C

= 25°C

= 10 V

= 5 V

= 70°C

= 125°C

−75 −50 −25

100 125

− Free-Air Temperature − °C

− Supply Voltage − V

Figure 24

Figure 25

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

†

TYPICAL CHARACTERISTICS

SLEW RATE

SUPPLY VOLTAGE

SLEW RATE

FREE-AIR TEMPERATURE

= 1

= 10 kΩ

= 20 pF

= 1

= 1 V

IPP

= 10 V

= 5.5 V

IPP

= 10 kΩ

= 20 pF

= 25°C

See Figure 1

= 10 V

= 1 V

See Figure 1

IPP

= 5 V

= 1 V

IPP

= 5 V

= 2.5 V

IPP

−75 −50 −25

100 125

− Supply Voltage − V

− Free-Air Temperature − °C

Figure 26

Figure 27

NORMALIZED SLEW RATE

FREE-AIR TEMPERATURE

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE

FREQUENCY

1.5

1.4

1.3

1.2

1.1

= 1

= 10 V

= 1 V

= 10 kΩ

= 20 pF

IPP

= 10 V

= 125°C

= 25°C

= −55°C

= 5 V

0.9

0.8

0.7

0.6

0.5

= 10 kΩ

See Figure 1

100

1000

10000

−75 −50 −25

100 125

f − Frequency − kHz

− Free-Air Temperature − °C

Figure 28

Figure 29

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

†

TYPICAL CHARACTERISTICS

UNITY-GAIN BANDWIDTH

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

2.5

= 5 V

V = 10 mV

= 20 pF

= 25°C

= 20 pF

See Figure 3

1.5

−75 −50 −25

100 125

− Supply Voltage − V

− Free-Air Temperature − °C

Figure 30

Figure 31

LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE SHIFT

FREQUENCY

= 5 V

= 10 kΩ

= 25°C

106

0°

30°

60°

90°

Phase Shift

120°

150°

180°

0.1

100

1 k

10 k 100 k

1 M

10 M

f − Frequency − Hz

Figure 32

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

†

TYPICAL CHARACTERISTICS

LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE SHIFT

FREQUENCY

= 10 V

= 10 kΩ

= 25°C

0°

30°

60°

90°

120°

Phase Shift

150°

180°

0.1

100

1 k

10 k 100 k

1 M

10 M

f − Frequency − Hz

Figure 33

PHASE MARGIN

SUPPLY VOLTAGE

PHASE MARGIN

FREE-AIR TEMPERATURE

53°

52°

50°

48°

46°

= 5 V

V = 10 mV

= 20 pF

51°

50°

See Figure 3

49°

48°

47°

44°

42°

40°

V = 10 mV

= 20 pF

= 25°C

46°

45°

See Figure 3

−75 −50 −25

100 125

− Free-Air Temperature − °C

− Supply Voltage − V

Figure 34

Figure 35

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

TYPICAL CHARACTERISTICS

PHASE MARGIN

LOAD CAPACITANCE

EQUIVALENT INPUT NOISE VOLTAGE

FREQUENCY

400

300

200

100

50°

45°

40°

= 5 V

= 20 Ω

= 25°C

= 5 V

V = 10 mV

= 25°C

See Figure 2

See Figure 3

35°

30°

25°

10 20 30 40 50 60 70 80 90 100

100

1000

− Capacitive Load − pF

f − Frequency − Hz

Figure 36

Figure 37

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

APPLICATION INFORMATION

single-supply operation

While the TLC274 and TLC279 perform well using dual power supplies (also called balanced or split supplies),

the design is optimized for single-supply operation. This design includes an input common-mode voltage range

that encompasses ground as well as an output voltage range that pulls down to ground. The supply voltage

range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonly available for

TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation is recommended.

Many single-supply applications require that a voltage be applied to one input to establish a reference level that

is above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38).

The low input bias current of the TLC274 and TLC279 permits the use of very large resistive values to implement

the voltage divider, thus minimizing power consumption.

The TLC274 and TLC279 work well in conjunction with digital logic; however, when powering both linear devices

and digital logic from the same power supply, the following precautions are recommended:

1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise the linear

device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital

logic.

2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive

decoupling is often adequate; however, high-frequency applications may require R decoupling.

R1 + R3

= V

REF

−

+ V

REF

= (V − V )

REF I

REF

0.01 µF

Figure 38. Inverting Amplifier With Voltage Reference

−

Power

Supply

Logic

(a) COMMON SUPPLY RAILS

−

Power

Supply

Logic

(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)

Figure 39. Common Versus Separate Supply Rails

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

APPLICATION INFORMATION

input characteristics

The TLC274 and TLC279 are specified with a minimum and a maximum input voltage that, if exceeded at either

input, could cause the device to malfunction. Exceeding this specified range is a common problem, especially

in single-supply operation. Note that the lower range limit includes the negative rail, while the upper range limit

is specified at V

− 1 V at T = 25°C and at V

− 1.5 V at all other temperatures.

The use of the polysilicon-gate process and the careful input circuit design gives the TLC274 and TLC279 very

good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage drift

in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus

dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate)

alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude.

The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of

operation.

Because of the extremely high input impedance and resulting low bias current requirements, the TLC274 and

TLC279 are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and

sockets can easily exceed bias current requirements and cause a degradation in device performance. It is good

practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement

Information section). These guards should be driven from a low-impedance source at the same voltage level

as the common-mode input (see Figure 40).

Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.

noise performance

The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage

differential amplifier. The low input bias current requirements of the TLC274 and TLC279 result in a very low

noise current, which is insignificant in most applications. This feature makes the devices especially favorable

over bipolar devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibit

greater noise currents.

−

(a) NONINVERTING AMPLIFIER

(b) INVERTING AMPLIFIER

Figure 40. Guard-Ring Schemes

output characteristics

The output stage of the TLC274 and TLC279 is designed to sink and source relatively high amounts of current

(see typical characteristics). If the output is subjected to a short-circuit condition, this high current capability can

cause device damage under certain conditions. Output current capability increases with supply voltage.

All operating characteristics of the TLC274 and TLC279 were measured using a 20-pF load. The devices drive

higher capacitive loads; however, as output load capacitance increases, the resulting response pole occurs at

lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In many cases, adding

a small amount of resistance in series with the load capacitance alleviates the problem.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

APPLICATION INFORMATION

output characteristics (continued)

(a) C = 20 pF, R = NO LOAD

(b) C = 130 pF, R = NO LOAD

L L

2.5 V

−

T = 25°C

f = 1 kHz

= 1 V

IPP

−2.5 V

(d) TEST CIRCUIT

Figure 41. Effect of Capacitive Loads and Test Circuit

Although the TLC274 and TLC279 possess excellent high-level output voltage and current capability, methods

for boosting this capability are available, if needed. The simplest method involves the use of a pullup resistor

(R ) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages to the

use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a comparatively

large amount of current. In this circuit, N4 behaves like a linear resistor with an on-resistance between

approximately 60 Ω and 180 Ω, depending on how hard the op amp input is driven. With very low values of R ,

a voltage offset from 0 V at the output occurs. Second, pullup resistor R acts as a drain load to N4 and the gain

of the operational amplifier is reduced at output voltage levels where N5 is not supplying the output current.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

APPLICATION INFORMATION

output characteristics (continued)

−

− V

+ I + I

Figure 43. Compensation for

Input Capacitance

Rp =

= Pullup current required

by the operational amplifier

(typically 500 µA)

Figure 42. Resistive Pullup to Increase V

feedback

Operational amplifier circuits nearly always employ feedback, and since feedback is the first prerequisite for

oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads

(discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with

the feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically.

electrostatic discharge protection

The TLC274 and TLC279 incorporate an internal electrostatic discharge (ESD) protection circuit that prevents

functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care should be

exercised, however, when handling these devices as exposure to ESD may result in the degradation of the

device parametric performance. The protection circuit also causes the input bias currents to be

temperature-dependent and have the characteristics of a reverse-biased diode.

latch-up

Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC274 and

TLC279 inputs and outputs were designed to withstand −100-mA surge currents without sustaining latch-up;

however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection

diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply

voltage by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators.

Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the

supply rails as close to the device as possible.

The current path established if latch-up occurs is usually between the positive supply rail and ground and can

be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply

voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the

forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of

latch-up occurring increases with increasing temperature and supply voltages.

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

APPLICATION INFORMATION

10 kΩ

0.016 µF

10 kΩ

−

10 kΩ

−

1/4

TLC274

5 V

−

10 kΩ

1/4

TLC274

1/4

TLC274

Low Pass

HIgh Pass

Band Pass

5 kΩ

R = 5 kΩ (3/d−1)

(see Note A)

NOTE A: d = damping factor, 1/Q

Figure 44. State-Variable Filter

12 V

H.P.

5082-2835

1/4

TLC274

1/4

−

TLC274

0.5 µF

Mylar

−

N.O.

Reset

100 kΩ

Figure 45. Positive-Peak Detector

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

APPLICATION INFORMATION

(see Note A)

100 kΩ

0.47 µF

1.2 kΩ

20 kΩ

4.7 kΩ

0.1 µF

−

TL431

1/4

TLC274

1 kΩ

TIP31

15 Ω

TIS193

−

250 µF,

25 V

(see Note B)

10 kΩ

47 kΩ

0.01 µF

22 kΩ

110 Ω

NOTES: B. V = 3.5 V to 15 V

= 2 V, 0 to 1 A

Figure 46. Logic-Array Power Supply

(see Note A)

9 V

0.1 µF

9 V

10 kΩ

1/4

TLC274

100 kΩ

−

1/4

TLC274

(see Note B)

100 kΩ

4C(R2) R2

47 kΩ

NOTES: A.

= 8 V

= 4 V

O(PP)

Figure 47. Single-Supply Function Generator

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SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

APPLICATION INFORMATION

5 V

V −

10 kΩ

100 kΩ

1/4

TLC279

−

1/4

TLC279

10 kΩ

−

R1, 10 kΩ

(see Note A)

10 kΩ

95 kΩ

1/4

TLC279

V +

−5 V

NOTE C: CMRR adjustment must be noninductive.

Figure 48. Low-Power Instrumentation Amplifier

5 V

−

1/4

TLC274

10 MΩ

540 pF

NOTCH

2pRC

R/2

5 MΩ

270 pF

Figure 49. Single-Supply Twin-T Notch Filter

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PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

PACKAGING INFORMATION

Orderable Device

TLC274ACD

Status Package Type Package Pins Package Qty

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

0 to 70

Top-Side Markings

Samples

Drawing

(1)

(2)

(3)

(4)

ACTIVE

SOIC

PDIP

SOIC

PDIP

SOIC

PDIP

Green (RoHS

& no Sb/Br)

Call TI

Level-1-260C-UNLIM

N / A for Pkg Type

TLC274AC

TLC274ACN

TLC274AI

TLC274ACDG4

TLC274ACDR

TLC274ACDRG4

TLC274ACN

ACTIVE

Green (RoHS

& no Sb/Br)

Call TI

0 to 70

2500

Green (RoHS

& no Sb/Br)

CU NIPDAU

Call TI

0 to 70

Green (RoHS

& no Sb/Br)

0 to 70

Pb-Free

(RoHS)

0 to 70

TLC274ACNE4

TLC274AID

Pb-Free

(RoHS)

N / A for Pkg Type

0 to 70

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

N / A for Pkg Type

-40 to 85

0 to 70

TLC274AIDG4

TLC274AIDR

TLC274AIDRG4

TLC274AIN

Green (RoHS

& no Sb/Br)

Call TI

TLC274AI

2500

Green (RoHS

& no Sb/Br)

CU NIPDAU

TLC274AI

Green (RoHS

& no Sb/Br)

TLC274AI

Pb-Free

(RoHS)

TLC274AIN

TLC274BC

TLC274BCN

TLC274AINE4

TLC274BCD

Pb-Free

(RoHS)

N / A for Pkg Type

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

N / A for Pkg Type

TLC274BCDG4

TLC274BCDR

TLC274BCDRG4

TLC274BCN

Green (RoHS

& no Sb/Br)

0 to 70

2500

Green (RoHS

& no Sb/Br)

0 to 70

Green (RoHS

& no Sb/Br)

0 to 70

Pb-Free

(RoHS)

0 to 70

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

Orderable Device

Status Package Type Package Pins Package Qty

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

0 to 70

Top-Side Markings

Samples

Drawing

(1)

(2)

(3)

(4)

TLC274BCNE4

TLC274BID

ACTIVE

OBSOLETE

PDIP

SOIC

PDIP

SOIC

SSOP

SOIC

PDIP

Pb-Free

(RoHS)

CU NIPDAU

Call TI

N / A for Pkg Type

Level-1-260C-UNLIM

N / A for Pkg Type

Level-1-260C-UNLIM

N / A for Pkg Type

Call TI

TLC274BCN

TLC274BI

TLC274BIN

TLC274C

P274

Green (RoHS

& no Sb/Br)

-40 to 85

0 to 70

TLC274BIDG4

TLC274BIDR

TLC274BIDRG4

TLC274BIN

Green (RoHS

& no Sb/Br)

2500

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

Pb-Free

(RoHS)

TLC274BINE4

TLC274CD

Pb-Free

(RoHS)

Green (RoHS

& no Sb/Br)

TLC274CDB

Green (RoHS

& no Sb/Br)

0 to 70

TLC274CDBG4

TLC274CDBR

TLC274CDBRG4

TLC274CDG4

TLC274CDR

TLC274CDRG4

TLC274CN

Green (RoHS

& no Sb/Br)

0 to 70

P274

2000

Green (RoHS

& no Sb/Br)

0 to 70

P274

Green (RoHS

& no Sb/Br)

0 to 70

P274

Green (RoHS

& no Sb/Br)

0 to 70

TLC274C

TLC274CN

2500

Green (RoHS

& no Sb/Br)

0 to 70

Green (RoHS

& no Sb/Br)

0 to 70

Pb-Free

(RoHS)

0 to 70

TLC274CNE4

TLC274CNSLE

Pb-Free

(RoHS)

0 to 70

TBD

0 to 70

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

Orderable Device

Status Package Type Package Pins Package Qty

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

Top-Side Markings

Samples

Drawing

(1)

(2)

(3)

(4)

TLC274CNSR

TLC274CNSRG4

TLC274CPW

ACTIVE

2000

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

0 to 70 TLC274

Green (RoHS

& no Sb/Br)

0 to 70

TLC274

P274

TSSOP

Green (RoHS

& no Sb/Br)

0 to 70

TLC274CPWG4

Green (RoHS

& no Sb/Br)

0 to 70

P274

TLC274CPWLE

TLC274CPWR

OBSOLETE

ACTIVE

TSSOP

TBD

Call TI

0 to 70

2000

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

P274

TLC274CPWRG4

TLC274ID

ACTIVE

TSSOP

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

N / A for Pkg Type

0 to 70

P274

Green (RoHS

& no Sb/Br)

-40 to 85

TLC274I

TLC274IN

P274

TLC274IDG4

TLC274IDR

SOIC

Green (RoHS

& no Sb/Br)

SOIC

2500

Green (RoHS

& no Sb/Br)

TLC274IDRG4

TLC274IN

SOIC

Green (RoHS

& no Sb/Br)

PDIP

Pb-Free

(RoHS)

TLC274INE4

TLC274IPW

TLC274IPWG4

TLC274IPWR

TLC274IPWRG4

TLC274MD

PDIP

Pb-Free

(RoHS)

N / A for Pkg Type

TSSOP

SOIC

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

Green (RoHS

& no Sb/Br)

P274

2000

Green (RoHS

& no Sb/Br)

Y274

Green (RoHS

& no Sb/Br)

Y274

Green (RoHS

& no Sb/Br)

-55 to 125 TLC274M

Addendum-Page 3

PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

Orderable Device

Status Package Type Package Pins Package Qty

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

Top-Side Markings

Samples

Drawing

(1)

(2)

(3)

(4)

TLC274MDG4

ACTIVE

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

-55 to 125 TLC274M

TLC274MDR

OBSOLETE

ACTIVE

SOIC

TBD

Call TI

-55 to 125 TLC274M

TLC274MDRG4

2500

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

TLC274MFKB

TLC274MJ

OBSOLETE

ACTIVE

LCCC

CDIP

SOIC

TBD

Call TI

-55 to 125

TLC279C

TLC274MJB

TLC279CD

Call TI

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

TLC279CDG4

TLC279CDR

TLC279CDRG4

TLC279CN

ACTIVE

SOIC

PDIP

SOIC

PDIP

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

N / A for Pkg Type

Level-1-260C-UNLIM

N / A for Pkg Type

TLC279C

TLC279CN

TLC279I

2500

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

Pb-Free

(RoHS)

TLC279CNE4

TLC279ID

Pb-Free

(RoHS)

Green (RoHS

& no Sb/Br)

TLC279IDG4

TLC279IDR

TLC279IDRG4

TLC279IN

Green (RoHS

& no Sb/Br)

TLC279I

2500

Green (RoHS

& no Sb/Br)

TLC279I

Green (RoHS

& no Sb/Br)

TLC279I

Pb-Free

(RoHS)

TLC279IN

TLC279INE4

Pb-Free

(RoHS)

TLC279MFKB

TLC279MJB

OBSOLETE

LCCC

CDIP

TBD

Call TI

-55 to 125

Addendum-Page 4

PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾Only one of markings shown within the brackets will appear on the physical device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 5

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Mar-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TLC274ACDR

TLC274AIDR

TLC274BCDR

TLC274BIDR

TLC274CDBR

TLC274CDR

TLC274CNSR

TLC274CPWR

TLC274IDR

SOIC

SSOP

SOIC

2500

2000

2500

2000

2500

2000

2500

330.0

16.4

12.4

16.4

12.4

16.4

6.5

8.2

6.5

8.2

6.9

6.5

6.9

6.5

9.0

6.6

9.0

10.5

5.6

9.0

5.6

9.0

2.1

2.5

2.1

2.5

1.6

2.1

1.6

2.1

8.0

12.0

8.0

12.0

8.0

16.0

12.0

16.0

12.0

16.0

TSSOP

SOIC

TSSOP

SOIC

TLC274IPWR

TLC274MDRG4

TLC279CDR

TLC279IDR

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Mar-2013

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TLC274ACDR

TLC274AIDR

TLC274BCDR

TLC274BIDR

TLC274CDBR

TLC274CDR

TLC274CNSR

TLC274CPWR

TLC274IDR

SOIC

SSOP

SOIC

2500

2000

2500

2000

2500

2000

2500

367.0

333.2

367.0

345.9

367.0

38.0

28.6

38.0

35.0

38.0

35.0

38.0

TSSOP

SOIC

TSSOP

SOIC

TLC274IPWR

TLC274MDRG4

TLC279CDR

TLC279IDR

Pack Materials-Page 2

MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

DB (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

28 PINS SHOWN

0,38

0,22

0,65

0,15

0,25

0,09

5,60

5,00

8,20

7,40

Gage Plane

0,25

0°–ā8°

0,95

0,55

Seating Plane

0,10

2,00 MAX

0,05 MIN

PINS **

DIM

6,50

5,90

6,50

5,90

7,50

8,50

7,90

10,50

9,90

10,50 12,90

A MAX

A MIN

6,90

9,90

12,30

4040065 /E 12/01

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-150

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other

changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest

issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and

complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale

supplied at the time of order acknowledgment.

TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms

and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary

to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily

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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and

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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or

other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information

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Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service

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No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties

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non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.

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Applications

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www.ti.com/audio

amplifier.ti.com

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DLP® Products

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interface.ti.com

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power.ti.com

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TI E2E Community

e2e.ti.com

www.ti.com/wirelessconnectivity

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

TLC279MFKB [TI]

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TLC27L1A

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TLC27L1ACDG4

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TLC27L1ACP

TLC27L1ACP

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